SI4511DY_09

Si4511DY Vishay Siliconix N- and P-Channel 20-V (D-S) MOSFET PRODUCT SUMMARY VDS (V) N-Channel 20 RDS(on) (Ω) 0.0145 at VGS = 10 V 0.017 at VGS = 4.5 V 0.033 at VGS = - 4.5 V 0.050 at VGS = - 2.5 V ID (A) 9.6 8.6 - 6.2 -5 FEATURES • Halogen-free According to IEC 61249-2-21 Definition • TrenchFET® Power MOSFET • Compliant to RoHS directive 2002/95/EC P-Channel - 20 APPLICATIONS • Level Shift • Load Switch SO-8 S1 G1 S2 G2 1 2 3 4 Top View 8 7 6 5 D1 D1 D2 D2 G1 G2 D1 S2 Ordering Information: Si4511DY-T1-E3 (Lead (Pb)-free) Si4511DY-T1-GE3 (Lead (Pb)-free and Halogen-free) S1 D2 ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (TJ = 150 °C)a, b Pulsed Drain Current Continuous Source Current (Diode Conduction) a Symbol VDS VGS TA = 25 °C TA = 70 °C ID IDM IS PD TJ, Tstg 10 s 9.6 7.7 1.7 2 1.3 TA = 25 °C Maximum Power Dissipationa TA = 70 °C Operating Junction and Storage Temperature Range N-Channel P-Channel Steady State 10 s Steady State 20 - 20 ± 16 ± 12 7.2 - 6.2 - 4.6 5.8 - 4.9 - 3.7 40 - 40 0.9 - 1.7 - 0.9 1.1 2 1.1 0.7 1.3 0.7 - 55 to 150 Unit V A W °C THERMAL RESISTANCE RATINGS Parameter Maximum Junction-to-Ambienta Maximum Junction-to-Foot (Drain) Notes: a. Surface Mounted on 1" x 1" FR4 board. b. t ≤ 10 s. t ≤ 10 s Steady State Steady State Symbol RthJA RthJF N-Channel Typ. Max. 50 62.5 85 110 30 40 P-Channel Typ. Max. 50 62.5 90 110 30 35 Unit °C/W Document Number: 72223 S09-0867-Rev. E, 18-May-09 www.vishay.com 1 Si4511DY Vishay Siliconix SPECIFICATIONS TJ = 25 °C, unless otherwise noted Parameter Static Gate Threshold Voltage Gate-Body Leakage VGS(th) IGSS VDS = VGS, ID = 250 µA VDS = VGS, ID = - 250 µA VDS = 0 V, VGS = ± 16 V VDS = 0 V, VGS = ± 12 V VDS = 20 V, VGS = 0 V Zero Gate Voltage Drain Current IDSS VDS = - 20 V, VGS = 0 V VDS = 20 V, VGS = 0 V, TJ = 55 °C VDS = - 20 V, VGS = 0 V, TJ = 55 °C On-State Drain Currentb ID(on) VDS = 5 V, VGS = 10 V VDS = - 5 V, VGS = - 4.5 V VGS = 10 V, ID = 9.6 A Drain-Source On-State Resistanceb RDS(on) VGS = - 4.5 V, ID = - 6.2 A VGS = 4.5 V, ID = 8.6 A VGS = - 2.5 V, ID = - 5 A Forward Transconductanceb Diode Forward Voltagb Dynamica Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Source-Drain Reverse Recovery Time Qg Qgs Qgd td(on) tr td(off) tf trr P-Channel VDS = - 10 V, VGS = - 4.5 V, ID = - 6.2 A N-Ch N-Channel VDS = 10 V, VGS = 4.5 V, ID = 9.6 A P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch N-Channel VDD = 10 V, RL = 10 Ω ID ≅ 1 A, VGEN = 10 V, Rg = 6 Ω P-Channel VDD = - 10 V, RL = 10 Ω ID ≅ - 1 A, VGEN = - 4.5 V, Rg = 6 Ω IF = 1.7 A, dI/dt = 100 A/µs IF = - 1.7 A, dI/dt = 100 A/µs P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch 11.5 17 3.7 4.1 3.3 4.3 12 25 12 30 55 70 15 50 50 40 20 40 20 45 85 105 25 75 100 80 ns 18 20 nC gfs VSD VDS = 15 V, ID = 9.6 A VDS = - 15 V, ID = - 6.2 A IS = 1.7 A, VGS = 0 V IS = - 1.7 A, VGS = 0 V N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch N-Ch P-Ch 40 - 40 0.0115 0.022 0.0135 0.035 33 17 0.8 - 0.8 1.2 - 1.2 0.0145 0.033 0.017 0.050 S V Ω 0.6 - 0.6 1.8 - 1.4 ± 100 ± 100 1 -1 5 -5 A µA V nA Symbol Test Conditions Min. Typ. Max. Unit Notes: a. Guaranteed by design, not subject to production testing. b. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. www.vishay.com 2 Document Number: 72223 S09-0867-Rev. E, 18-May-09 Si4511DY Vishay Siliconix N-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 40 VGS = 10 V thru 4 V 32 ID - Drain Current (A) ID - Drain Current (A) 3V 32 40 24 24 16 16 TC = 125 °C 8 25 °C - 55 °C 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 8 2V 0 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 VDS - Drain-to-Source Voltage (V) VGS - Gate-to-Source Voltage (V) Output Characteristics 0.020 2000 Transfer Characteristics RDS(on) - On-Resistance ( Ω ) 0.015 1600 VGS = 10 V C - Capacitance (pF) VGS = 4.5 V Ciss 1200 0.010 800 Coss Crss 400 0.005 0.000 0 8 16 24 32 40 0 0 4 8 12 16 20 ID - Drain Current (A) VDS - Drain-to-Source Voltage (V) On-Resistance vs. Drain Current 10 1.6 Capacitance VGS - Gate-to-Source Voltage (V) 8 6 R DS(on) - On-Resistance (Normalized) VDS = 10 V ID = 9.6 A 1.4 VGS = 10 V ID = 9.6 A 1.2 4 1.0 2 0.8 0 0 3 6 9 12 15 18 21 24 0.6 - 50 - 25 0 25 50 75 100 125 150 Qg - Total Gate Charge (nC) TJ - Junction Temperature (°C) Gate Charge On-Resistance vs. Junction Temperature Document Number: 72223 S09-0867-Rev. E, 18-May-09 www.vishay.com 3 Si4511DY Vishay Siliconix N-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 40 0.05 RDS(on) - On-Resistance ( ) 0.04 ID = 9.6 A 0.03 ID = 3 A 0.02 IS - Source Current (A) 10 TJ = 150 °C TJ = 25 °C 0.01 1 0.00 0.2 0.4 0.6 0.8 1.0 1.2 0.00 0 1 2 3 4 5 VSD - Source-to-Drain Voltage (V) VGS - Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage 0.4 ID = 250 µA 30 25 20 Power (W) On-Resistance vs. Gate-to-Source Voltage 0.2 V GS(th) Variance (V) 0.0 - 0.2 15 - 0.4 10 - 0.6 5 - 0.8 - 50 - 25 0 25 50 75 100 125 150 0 10-2 10-1 1 Time (s) 10 100 600 TJ - Temperature (°C) Threshold Voltage 100 Limited by RDS(on)* IDM Limited P(t) = 0.0001 10 ID - Drain Current (A) P(t) = 0.001 P(t) = 0.01 P(t) = 0.1 TC = 25 °C Single Pulse BVDSS Limited 0.01 0.1 1 10 100 P(t) = 1 P(t) = 10 DC Single Pulse Power 1 ID(on) Limited 0.1 VDS - Drain-to-Source Voltage (V) * VDS > minimum VGS at which RDS(on) is specified Safe Operating Area www.vishay.com 4 Document Number: 72223 S09-0867-Rev. E, 18-May-09 Si4511DY Vishay Siliconix N-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 2 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 Notes: 0.1 0.1 0.05 t1 P DM 0.02 Single Pulse 0.01 10 -4 10 -3 10 -2 10 -1 1 Square Wave Pulse Duration (s) t2 1. Duty Cycle, D = 2. Per Unit Base = RthJA = 85 °C 3. TJM − TA = PDMZthJA(t) 4. Surface Mounted t1 t2 10 100 600 Normalized Thermal Transient Impedance, Junction-to-Ambient 2 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10 -4 10 -3 10 -2 10 -1 Square Wave Pulse Duration (s) 1 10 Normalized Thermal Transient Impedance, Junction-to-Foot Document Number: 72223 S09-0867-Rev. E, 18-May-09 www.vishay.com 5 Si4511DY Vishay Siliconix P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 40 VGS = 5 V thru 3.5 V 32 ID - Drain Current (A) ID - Drain Current (A) 3V 32 40 TC = - 55 °C 25 °C 24 2.5 V 24 125 °C 16 2V 8 1.5 V 0 0.0 16 8 0.4 0.8 1.2 1.6 2.0 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VDS - Drain-to-Source Voltage (V) VGS - Gate-to-Source Voltage (V) Output Characteristics 0.10 Transfer Characteristics 3000 R DS(on) - On-Resistance (Ω) C - Capacitance (pF) 0.08 2500 Ciss 2000 0.06 VGS = 2.5 V 0.04 VGS = 4.5 V 0.02 1500 1000 Coss 500 Crss 0.00 0 8 16 24 32 40 0 0 4 8 12 16 20 ID - Drain Current (A) VDS - Drain-to-Source Voltage (V) On-Resistance vs. Drain Current 5 VDS = 10 V ID = 6.2 A 4 R DS(on) - On-Resistance (Normalized) 1.4 1.6 VGS = 4.5 V ID = 6.2 A Capacitance VGS - Gate-to-Source Voltage (V) 3 1.2 2 1.0 1 0.8 0 0 3 6 9 12 15 18 Qg - Total Gate Charge (nC) 0.6 - 50 - 25 0 25 50 75 100 125 150 TJ - Junction Temperature (°C) Gate Charge On-Resistance vs. Junction Temperature www.vishay.com 6 Document Number: 72223 S09-0867-Rev. E, 18-May-09 Si4511DY Vishay Siliconix P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 40 0.10 TJ = 150 °C 10 R DS(on) - On-Resistance (Ω) 0.08 I S - Source Current (A) 0.06 ID = 6.2 A 0.04 TJ = 25 °C 0.02 1 0.0 0.00 0.3 0.6 0.9 1.2 1.5 0 1 2 3 4 5 VSD - Source-to-Drain Voltage (V) VGS - Gate-to-Source Voltage (V) Source-Drain Diode Forward Voltage 0.6 30 25 On-Resistance vs. Gate-to-Source Voltage 0.4 V GS(th) Variance (V) Power (W) 0.2 ID = 250 µA 20 15 0.0 10 - 0.2 5 - 0.4 - 50 - 25 0 25 50 75 100 125 150 0 10 -2 10 -1 1 Time (s) 10 100 600 TJ - Temperature (°C) Threshold Voltage 100 Limited by RDS(on)* IDM Limited Single Pulse Power 10 ID - Drain Current (A) P(t) = 0.001 P(t) = 0.01 1 ID(on) Limited TC = 25 °C Single Pulse BVDSS Limited 0.01 0.1 1 10 100 P(t) = 0.1 P(t) = 1 P(t) = 10 DC 0.1 VDS - Drain-to-Source Voltage (V) * VDS > minimum VGS at which RDS(on) is specified Safe Operating Area Document Number: 72223 S09-0867-Rev. E, 18-May-09 www.vishay.com 7 Si4511DY Vishay Siliconix P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 2 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 Notes: 0.1 0.1 0.05 t1 P DM 0.02 t2 1. Duty Cycle, D = 2. Per Unit Base = RthJA = 85 °C t1 t2 Single Pulse 0.01 10 -4 10 -3 10 -2 10 -1 1 Square Wave Pulse Duration (s) 3. TJM − TA = PDMZthJA(t) 4. Surface Mounted 10 100 600 Normalized Thermal Transient Impedance, Junction-to-Ambient 2 1 Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Single Pulse 0.01 10 -4 10 -3 10 -2 10 -1 Square Wave Pulse Duration (s) 1 10 Normalized Thermal Transient Impedance, Junction-to-Foot Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?72223. www.vishay.com 8 Document Number: 72223 S09-0867-Rev. E, 18-May-09 Package Information Vishay Siliconix SOIC (NARROW): 8-LEAD JEDEC Part Number: MS-012 8 7 6 5 E 1 2 3 4 H S D 0.25 mm (Gage Plane) A h x 45 C All Leads q L 0.101 mm 0.004" e B A1 MILLIMETERS DIM A A1 B C D E e H h L q S 5.80 0.25 0.50 0° 0.44 Min 1.35 0.10 0.35 0.19 4.80 3.80 1.27 BSC 6.20 0.50 0.93 8° 0.64 0.228 0.010 0.020 0° 0.018 Max 1.75 0.20 0.51 0.25 5.00 4.00 Min 0.053 0.004 0.014 0.0075 0.189 0.150 INCHES Max 0.069 0.008 0.020 0.010 0.196 0.157 0.050 BSC 0.244 0.020 0.037 8° 0.026 ECN: C-06527-Rev. I, 11-Sep-06 DWG: 5498 Document Number: 71192 11-Sep-06 www.vishay.com 1 VISHAY SILICONIX TrenchFET® Power MOSFETs Application Note 808 Mounting LITTLE FOOT®, SO-8 Power MOSFETs Wharton McDaniel Surface-mounted LITTLE FOOT power MOSFETs use integrated circuit and small-signal packages which have been been modified to provide the heat transfer capabilities required by power devices. Leadframe materials and design, molding compounds, and die attach materials have been changed, while the footprint of the packages remains the same. See Application Note 826, Recommended Minimum Pad Patterns With Outline Drawing Access for Vishay Siliconix MOSFETs, (http://www.vishay.com/ppg?72286), for the basis of the pad design for a LITTLE FOOT SO-8 power MOSFET. In converting this recommended minimum pad to the pad set for a power MOSFET, designers must make two connections: an electrical connection and a thermal connection, to draw heat away from the package. In the case of the SO-8 package, the thermal connections are very simple. Pins 5, 6, 7, and 8 are the drain of the MOSFET for a single MOSFET package and are connected together. In a dual package, pins 5 and 6 are one drain, and pins 7 and 8 are the other drain. For a small-signal device or integrated circuit, typical connections would be made with traces that are 0.020 inches wide. Since the drain pins serve the additional function of providing the thermal connection to the package, this level of connection is inadequate. The total cross section of the copper may be adequate to carry the current required for the application, but it presents a large thermal impedance. Also, heat spreads in a circular fashion from the heat source. In this case the drain pins are the heat sources when looking at heat spread on the PC board. 0.288 7.3 0.288 7.3 0.050 1.27 0.088 2.25 0.027 0.69 0.078 1.98 0.088 2.25 0.2 5.07 Figure 2. Dual MOSFET SO-8 Pad Pattern With Copper Spreading The minimum recommended pad patterns for the single-MOSFET SO-8 with copper spreading (Figure 1) and dual-MOSFET SO-8 with copper spreading (Figure 2) show the starting point for utilizing the board area available for the heat-spreading copper. To create this pattern, a plane of copper overlies the drain pins. The copper plane connects the drain pins electrically, but more importantly provides planar copper to draw heat from the drain leads and start the process of spreading the heat so it can be dissipated into the ambient air. These patterns use all the available area underneath the body for this purpose. Since surface-mounted packages are small, and reflow soldering is the most common way in which these are affixed to the PC board, “thermal” connections from the planar copper to the pads have not been used. Even if additional planar copper area is used, there should be no problems in the soldering process. The actual solder connections are defined by the solder mask openings. By combining the basic footprint with the copper plane on the drain pins, the solder mask generation occurs automatically. A final item to keep in mind is the width of the power traces. The absolute minimum power trace width must be determined by the amount of current it has to carry. For thermal reasons, this minimum width should be at least 0.020 inches. The use of wide traces connected to the drain plane provides a low impedance path for heat to move away from the device. www.vishay.com 1 APPLICATION NOTE 0.050 1.27 0.196 5.0 0.027 0.69 0.078 1.98 0.2 5.07 Figure 1. Single MOSFET SO-8 Pad Pattern With Copper Spreading Document Number: 70740 Revision: 18-Jun-07 Application Note 826 Vishay Siliconix RECOMMENDED MINIMUM PADS FOR SO-8 0.172 (4.369) 0.028 (0.711) (6.248) 0.022 (0.559) 0.050 (1.270) Recommended Minimum Pads Dimensions in Inches/(mm) Return to Index Return to Index APPLICATION NOTE www.vishay.com 22 (1.194) 0.047 (3.861) 0.246 0.152 Document Number: 72606 Revision: 21-Jan-08 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. 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Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1