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SI9135LG-T1-E3

SI9135LG-T1-E3

  • 厂商:

    VISHAY

  • 封装:

  • 描述:

    SI9135LG-T1-E3 - SMBus Multi-Output Power-Supply Controller - Vishay Siliconix

  • 数据手册
  • 价格&库存
SI9135LG-T1-E3 数据手册
Not recommended for new designs, please refer to Si9138 Si9135 Vishay Siliconix SMBus Multi-Output Power-Supply Controller DESCRIPTION The Si9135 is a current-mode PWM and PSM converter controller, with two synchronous buck converters (3.3 V and 5 V) and a flyback (non-isolated buck-boost) converter (12 V). Designed for portable devices, it offers a total five power outputs (three tightly regulated dc/dc converter outputs, a precision 3.3 V reference and a 5 V LDO output). It requires minimum external components and is capable of achieving conversion efficiencies approaching 95 %. Along with the SMBUS interface, the Si9135 provides programmable output selection capability. The Si9135 is available in both standard and lead (Pb)-free 28-pin SSOP packages and specified to operate over the extended commercial (0 °C to 90 °C) temperature range. FEATURES • • • • • • • • • • • • • • • Up to 95 % Efficiency 3 % Total Regulation (Each Controller) 5.5 V to 30 V Input Voltage Range 3.3 V, 5 V, and 12 V Outputs 200 kHz/300 kHz Low-Noise Frequency Operation Precision 3.3 V Reference Output 30 mA Linear Regulator Output SMBUS Interface High Efficiency Pulse Skipping Mode Operation at Light Load Only Three Inductors Required - No Transformer LITTLE FOOT® Optimized Output Drivers Internal Soft-Start Synchronizable Minimal External Control Components 28-Pin SSOP Package FUNCTIONAL BLOCK DIAGRAM VIN VL (5.0 V) 5-V Linear Regulator 3.3 - V Voltage Reference VREF (+ 3.3 V) + 3.3 V 3.3-V SMPS 5-V SMPS +5V 12-V SMPS + 12 V SMBUS Clock Line On/Off Control SMBUS Data Line Document Number: 70817 S11-0975-Rev. D, 16-May-11 www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9135 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Parameter VIN to GND PGND to GND VL to GND BST3, BST5, BSTFY to GND VL Short to GND LX3 to BST3; LX5 to BST5; LXFY to BST Inputs/Outputs to GND (SYNC, CS3, CS5, CSP, CSN) SDA, SCL DL3, DL5, DLFY to PGND DH3 to LX3, DH5 to LX5, DHFY to LXFY Continuous Power Dissipation (TA = 90 °C)a Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10 Sec.) Notes: a. Device Mounted with all leads soldered or welded to PC board. b. Derate 9.52 mW/°C above 90 °C. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Limit - 0.3 to + 36 ±2 - 0.3 to + 6.5 - 0.3 to + 36 Continuous - 6.5 to 0.3 - 0.3 V to (VL + 0.3) - 0.3 to + 5.5 - 0.3 V to (VL + 0.3) - 0.3 V to (BSTX + 0.3) 28-Pin SSOPb 572 0 to 90 - 40 to 125 300 Unit V V mW °C SPECIFICATIONS Parameter 3.3 V Buck Controller Total Regulation (Line, Load, and Temperature) Line Regulation Load Regulation Current Limit Bandwidth Phase Margin 5 V Buck Controller Total Regulation (Line, Load, and Temperature) Line Regulation Load Regulation Current Limit Bandwidth Phase Margin 12 V Flyback Controller Total Regulation (Line, Load, and Temperature) Line Regulation Load Regulation Current Limit Bandwidth Phase Margin VIN = 6 to 30, 0 < VCSP - VCSN < 300 mV VIN = 6 to 30 V 0 < VCSP - VFBN < 300 mV VCSP - VCSN L = 10 µH, C = 100 µF RSENSE = 100 m, Ccomp = 120 pF 330 410 10 65 11.4 12.0 12.6 ± 0.5 ± 0.5 510 V % mV kHz ° VIN = 6 to 30, 0 < VCS5 - VFB5 < 90 mV VIN = 6 to 30 V 0 < VCS5 - VFB5 < 90 mV VCS5 - VFB5 L = 10 µH, C = 330 µF RSENSE = 20 m 90 125 50 60 4.88 5.03 5.18 ± 0.5 ± 0.5 160 V % mV kHz ° VIN = 6 to 30, 0 < VCS3 - VFB3 < 90 mV VIN = 6 to 30 V 0 < VCS3 - VFB3 < 90 mV VCS3 - VFB3 L = 10 µH, C = 330 µF RSENSE = 20 m 90 125 50 65 3.23 3.33 3.43 ± 0.5 ± 0.5 160 V % mV kHz ° Specific Test Conditions VIN = 15 V, IVL = IREF = 0 mA TA = 0 °C to 90 °C, All Converters ON Limits Min.a Typ.b Max.a Unit www.vishay.com 2 Document Number: 70817 S11-0975-Rev. D, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9135 Vishay Siliconix SPECIFICATIONS Parameter Internal Regulator VL Output VL Fault Lockout Voltage VL Fault Lockout Hysteresis VL /FB5 Switchover Voltage VL /FB5 Switchover Hysteresis Reference REF Output REF Load Regulation Supply Current Supply Current - Shutdown Supply Current - Operation Oscillator Oscillator Frequency SYNC High-Pulse Width SYNC Low-Pulse Width SYNC Rise/Fall Range SYNC VIL SYNC VIH Oscillator SYNC Range Maximum Duty Cycle Outputs Gate Driver Sink/Source Current (Buck) Gate Driver On-Resistance (Buck) Gate Driver Sink/Source Current (Flyback) Gate Driver On-Resistance (Flyback) SCL, SDA VIL VIH Notes: a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. 1.4 0.6 V DL3, DH3, DL5, DH5 Forced to 2 V High or Low DHFY, DLFY Forced to 2 V High or Low 1 2 0.2 15 7 A  A  SYNC tied to GND or VL SYNC tied to REF VL - 0.5 250 92 89 95 92 400 SYNC tied to REF SYNC tied to GND or VL 270 180 200 200 200 0.8 V kHz % nsec 300 200 330 220 kHz All Converters OFF, No Load All Converters ON, No Load, FOCS = 200 kHz 35 1100 60 1800 µA No External Load 0 to 1 mA 3.24 3.30 30 3.36 75 V mV 4.2 75 All Converters OFF, VIN > 5.5 V, 0 < IL < 30 mA 4.7 3.6 75 4.7 5.5 4.2 V mV V mV Specific Test Conditions VIN = 15 V, IVL = IREF = 0 mA TA = 0 °C to 90 °C, All Converters ON Limits Min.a Typ.b Max.a Unit Document Number: 70817 S11-0975-Rev. D, 16-May-11 www.vishay.com 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9135 Vishay Siliconix PIN CONFIGURATION SSOP-28 CS3 FBFY BSTFY DHFY LXFY DLFY CSP CSN GND COMP REF SYNC SCL SDA 1 2 3 4 5 6 7 8 9 10 11 12 12 14 Top View 28 27 26 25 24 23 22 21 20 19 18 17 16 15 FB3 DH3 LX3 BST3 DL3 VIN VL FB5 PGND DL5 BST5 LX5 DH5 CS5 ORDERING INFORMATION Part Number Si9135LG Si9135LG-T1 Si9135LG-T1-E3 Lead (Pb)-free Part Number Temperature Range 0 to 90 °C VOUT 3.3 V, 5 V, 12 V PIN DESCRIPTION Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Symbol CS3 FBFY BSTFY DHFY LXFY DLFY CSP CSN GND COMP REF SYNC SCL SDA CS5 DH5 LX5 BST5 DL5 PGND FB5 VL VIN DL3 BST3 LX3 DH3 FB3 Current sense input for 3.3 V buck. Feedback for flyback. Boost capacitor connection for flyback converter. Gate-drive output for flyback high-side MOSFET. Inductor connection for flyback converter. Gate-drive output for flyback low-side MOSFET. Current sense positive input for flyback converter. Current sense negative input for flyback converter. Analog ground. Flyback compensation connection, if required. 3.3 V internal reference. Oscillator synchronization inputs. SMBUS clock line. SMBUS data line. Current sense input for 5 V buck controller. Inductor connection for buck 5 V. Gate-drive output for 5 V buck high-side MOSFET. Boost capacitor connection for 5 V buck converter. Gate-drive output for 5 V buck low-side MOSFET. Power ground. Feedback for 5 V buck. 5 V logic supply voltage for internal circuitry. Input voltage Gate-drive output for 3.3 V buck low-side MOSFET. Boost capacitor connection for 3.3 V buck converter. Inductor connection for 3.3 V buck low-side MOSFET. Gate-drive output for 3.3 V buck high-side MOSFET. Feedback for 3.3 V buck. Description www.vishay.com 4 Document Number: 70817 S11-0975-Rev. D, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9135 Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C unless otherwise noted) 100 Frequency = 200 kHz 90 VIN = 6 V Efficiency (%) 80 30 V 70 5 V On, 12 V Off 60 Efficiency (%) 15 V 100 Frequency = 200 kHz 90 VIN = 6 V 15 V 80 30 V 70 3.3 V Off, 12 V Off 60 50 0.001 0.01 0.1 Current (A) 1 10 50 0.001 0.01 0.1 Current (A) 1 10 Efficiency vs. 3.3 V Output Current Efficiency vs. 5.0 V Output Current 85 Frequency = 200 kHz 80 6V 75 Efficiency (%) 30 V VIN = 15 V 70 65 5 V On, 3.3 V Off 60 55 0.001 0.01 Current (A) 0.1 1 Efficiency vs. 12 V Output Current Document Number: 70817 S11-0975-Rev. D, 16-May-11 www.vishay.com 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9135 Vishay Siliconix TYPICAL WAVEFORMS Ch1: VOUT Ch1: VOUT Ch2: Load Current (1 A/div) Ch2: Load Current (1 A/div) PWM Loading PWM Unloading 5 V Converter (VIN = 10 V) 5 V Converter (VIN = 10 V) Ch1: VOUT Ch1: VOUT Ch2: Load Current (1 A/div) Ch2: Load Current (1 A/div) PSM Õ PWM PWM Õ PSM 5 V Converter (VIN = 10 V) 5 V Converter (VIN = 10 V) Ch2: VOUT Ch2: VOUT Ch3: Inductor Node (L X5) Ch3: Inductor Node (L X5) Ch4: Inductor Current (1 A/div) Ch4: Inductor Current (1 A/div) PSM Operation PWM Operation 5 V Converter (VIN = 10 V) 5 V Converter (VIN = 10 V) www.vishay.com 6 Document Number: 70817 S11-0975-Rev. D, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9135 Vishay Siliconix TYPICAL WAVEFORMS Ch1: VOUT Ch1: VOUT Ch2: Load Current (1 A/div) Ch2: Load Current (1 A/div) PWM, Loading PWM, Unloading 3 V Converter (VIN = 10 V) 3 V Converter (VIN = 10 V) Ch1: VOUT Ch1: VOUT Ch2: Load Current (1 A/div) Ch2: Load Current (1 A/div) PSM Õ PWM PWM Õ PSM 3 V Converter (VIN = 10 V) 3 V Converter (VIN = 10 V) 3.3 V Output 5 V Output Ch1: VOUT 12 V Output Inductor Current, 5 V Converter (2 A/div) Ch4: Load Current (100 mA/div) 250 - mA Transient 12 V Converter (VIN = 10 V) Start-Up Document Number: 70817 S11-0975-Rev. D, 16-May-11 www.vishay.com 7 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9135 Vishay Siliconix STANDARD APPLICATION CIRCUIT V IN C7 33 µF CMPD2836 VIN C1 0.1 µF BST3 BST5 DH5 Q1 Si4416DY DH3 LX3 R1 Rcs2 0.02 Ω Q4 Si4812DY LX5 C3 330 µF VL + 5 V up to 30 mA D1 CMPD2836 D2 C4 33 µF C2 0.1 µF Q2 Si4416DY L1, 10 µH R7 Rcs1 0.02 Ω C5 4.7 µF +5V + 3.3 V L2 10 µH DL5 Q3 Si4812DY C6 330 µF DL3 CS5 FB5 D3 CMPD2836 BSTFY DHFY LXFY D5, D1FS4 FB3 DLFY SMBUS Clock Line SCL CSP Q6 Si2304DS C10 100 µF C8 0.1 µF Q5 Si2304DS L3, 10 µH C9 4.7 µF CS3 D4, D1FS4 + 12 V 0 to 250 mA SMBUS Data Line SDA R6 Rcs3 CSN FBFY OSC SYNC SYNC + 3.3 V up to 1 mA C11 1 µF REF GND COMP PGND C12 120 pF Figure 1. www.vishay.com 8 Document Number: 70817 S11-0975-Rev. D, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9135 Vishay Siliconix SMBUS Specification SMBus: The System Management Bus is a two-wire interface through which simple power related chips can communicate with the rest of the system. It uses I2C as its backbone. Both SDA and SCL are bidirectional lines, connected to a positive voltage via a pull-up resistor. When the bus is free, both lines are high. The output stages of devices connected to the bus must have an open drain or open collector in order to perform the wired AND function. Data on the SMBus can be transferred at a clock rate up to 100 kHz. Si9135 is a slave with SMBus address of 0110000. SMBUS TRUTH TABLE State Shutdown Buck3 On Buck5 On Flyback On Buck3, Buck5 On Buck3, Flyback On Buck5, Flyback on All On Notes: 1. Positive logic level is used. 2. X: don’t care. D7 0 1 0 0 1 1 0 1 D6 0 0 1 0 1 0 1 1 D5 0 0 0 1 0 1 1 1 D4 X X X X X X X X D3 X X X X X X X X D2 X X X X X X X X D1 X X X X X X X X D0 X X X X X X X X SMBUS ELECTRICAL SPECIFICATION (Test Conditions: V+ = 5.5 V to 30 V, TA = 0 °C) Symbol VIL VIH VOL ILEAK Parameter Data, Clock Input Low Voltage Data, Clock Input High Voltage Data, Clock Output Low Voltage Input Leakage Min - 0.5 1.4 Max 0.6 5.5 0.4 ±1 µA V Units SMBUS AC SPECIFICATIONS Symbol FSMB TBUF THD TSU TLOW THIGH TF TR Parameter SMBus Operation Frequency Bus free time between Stop and Start Data Hold Time Data Setup Time Clock Low Period Clock High Period Clock/Data Fall Time Clock/Data Rise Time Min 10 4.7 300 250 4.7 4.0 50 300 1000 Max 100 Units kHz µs ns µs ns Document Number: 70817 S11-0975-Rev. D, 16-May-11 www.vishay.com 9 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9135 Vishay Siliconix TIMING DIAGRAMS VIN 4V 5.2 V 3.8 V VL 5V 3.8 V 5V 3.6 V 3.3 V VREF UVLO OSC End of SMBus Transmission SCL SDA SS/Enable DH BBM DL Figure 2. Start-Up Timing Sequence www.vishay.com 10 Document Number: 70817 S11-0975-Rev. D, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9135 Vishay Siliconix DETAILED FUNCTIONAL BLOCK DIAGRAMS FB5 + 1X CS_ FB_ RX Internal voltage divider is only used on 5 V output. − REF + Error Amplifier SMBUS Control PWMCMP − + Pulse Skipping Control 20 mV Current Limit DL Logic Control LX_ BBM VL DL DH BST_ DH RY SLC V Soft-Start t SYNC Rectifier Control Figure 3. Buck Block Diagram FBFY R1 Error Amplifier − REF + − + COMP SMBUS Control PWM Comparator Logic Control BSTY DH LXFY R2 DHFY C/S Amplifier ICSP ICSN − + − 100 mV + Current Limit V Soft-Start t Pulse Skipping Control DL DLFY Figure 4. PWM Flyback Block Diagram Document Number: 70817 S11-0975-Rev. D, 16-May-11 www.vishay.com 11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9135 Vishay Siliconix VIN 5V Linear Regulator FB5 5V Buck Controller CS5 BST5 DH5 LX5 DL5 SMBUS Interface Controller 3.3 V Reference 2.4 V 300 kHz/ 200 kHz Oscillator 3.3 V Buck Controller VL 4V 4.5 V FB3 CS3 BST3 DH3 LX3 DL3 FYBFY ICSP 12 V Flyback Controller ICSN BSTFY DHFY LXFY DLFY Figure 5. Complete Si9135 Block Diagram DESCRIPTION OF OPERATION Start-up Sequence Si9135 is normally controlled by its SMBus interface after VIN is applied. Initially, if there is no incoming SMBus control command, it comes up in its default power on sequence, first the LDO 5 V will come up within its tolerance, and then the precision 3.3 V reference will come up. Immediately afterwards, the oscillator will begin and 3.3 V BUCK converter will turn on and then 5 V BUCK converter and at last 12 V FLYBACK converter. If Si9135 receives any SMBus controlling command after LDO 5 V is established, the designated converters will be allowed to turn on or off independently depending on the command received. In the event of all three converters are turned off, the oscillator will be turned off, the total system would only draw 35 µA supply current. Each converter can soft-start separately. The integrated internal soft-start circuitry for each converter gradually increases the inductor maximum peak current during softstart period (approximately 4 msec), preventing excessive currents being drawn from the input during startup. The softstart is controlled by initial default start up sequence or incoming SMBus command. Si9135 converters a 5.5 V to 30 V input voltage to five outputs, two BUCK (step-down) high current, PWM, switchmode supplies, one at 3.3 V and one at 5 V, one FLYBACK 12 V PWM switch-mode supply, one precision 3.3 V reference and one 5 V Low Drop Out linear regulator output. Switch-mode supply output current capabilities depend on external components (can exceed 10 A). With typical application shown on the application diagram, the two BUCK converters deliver 4 A and the FLYBACK converters deliver 0.25 A. The recommended load current for precision 3.3 V reference output is less than 1 mA, the recommended load current for 5 V LDO output current is less than 30 mA. In order to maximize the power efficiency, when the 5 V BUCK converter supply is above 4.5 V, the BUCK converter’s output is internal connected to LDO output. www.vishay.com 12 Document Number: 70817 S11-0975-Rev. D, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9135 Vishay Siliconix DESCRIPTION OF OPERATION (CONT’D) Buck Converter Operation The 3.3 V and 5 V buck converters are both current-mode PWM and PSM (during light load operation) regulators using high-side bootstrap N-Channel and low-side N-Channel MOSFETs. At light load conditions, the converters switch at a lower frequency than the clock frequency, seen like some clock pulses between the actual switching are skipped, this operating condition is defined as pulse-skipping. The operation of the converter(s) switching at clock frequency is defined as normal operation. Normal Operation: Buck Converters In normal operation, the buck converter high-side MOSFET is turned on with a delay (known as break-before-make time - tBBM), after the rising edge of the clock. After a certain on time, the high-side MOSFET is turned off and then after a delay (tBBM), the low-side MOSFET is turned on until the next rising edge of the clock, or the inductor current reaches zero. The tBBM (approximately 25 ns to 60 ns), has been optimized to guarantee the efficiency is not adversely affected at the high switching frequency and a specified minimum to account for variations of possible MOSFET gate capacitances. During the normal operation, the high-side MOSFET switch on-time is controlled internally to provide excellent line and load regulation over temperature. Both buck converters should have load, line, regulation to within 0.5 % tolerance. Pulse Skipping: Buck Converters When the buck converter switching frequency is less than the internal clock frequency, its operation mode is defined as pulse skipping mode. During this mode, the high-side MOSFET is turned on until VCS - VFB reaches 20 mV, or the on time reaches its maximum duty ratio. After the high-side MOSFET is turned off, the low-side MOSFET is turned on after the tBBM delay, which will remain on until the inductor current reaches zero. The output voltage will rise slightly above the regulation voltage after this sequence, causing the controller to stay idle for the next one, or several clock cycles. When the output voltage falls slightly below the regulation level, the high-side MOSFET will be turned on again at the next clock cycle. With the converter remaining idle during some clock cycles, the switching losses are reduced in order to preserve conversion efficiency during the light output current condition. Current Limit: Buck Converters When the buck converter inductor current is too high, the voltage across pin CS3(5) and pin FB3(5) exceeds approximately 120 mV, the high-side MOSFET would be turned off instantaneously regardless of the input, or output condition. The Si9135 features clock cycle by clock cycle current limiting capability. Flyback Converter Operation Designed mainly for PCMCIA or EEPROM programming, the Si9135 has a 12 V output non-isolated buck boost converter, called for brevity a flyback. It consists of two N-Channel MOSFET switches that are turned on and off in phase, and two diodes. Similar to the buck converter, during the light load conditions, the flyback converter will switch at a frequency lower than the internal clock frequency, which can be defined as pulse skipping mode (PSM); otherwise, it is operating in normal PWM mode. Normal Operation: Flyback Converter In normal operation mode, the two MOSFETs are turned on at the rising edge of the clock, and then turned off. The on time is controlled internally to provide excellent load, line, and temperature regulation. The flyback converter has load, line and temperature regulation well within 0.5 %. Pulse Skipping: Flyback Converter Under the light load conditions, similar to the buck converter, the flyback converter will enter pulse skipping mode. The MOSFETs will be turned on until the inductor current increases to such a level that the voltage across the pin CSP and pin CSN reaches 100 mV, or the on time reaches the maximum duty cycle. After the MOSFETs are turned off, the inductor current will conduct through two diodes until it reaches zero. At this point, the flyback converter output will rise slightly above the regulation level, and the converter will stay idle for one or several clock cycle(s) until the output falls back slightly below the regulation level. The switching losses are reduced by skipping pulses and so the efficiency during light load is preserved. Current Limit: Flyback Converter Similar to the buck converter; when the voltage across pin CSP and pin CSN exceeds 410 mV typical, the two MOSFETs will be turned off regardless of the input and output conditions. Document Number: 70817 S11-0975-Rev. D, 16-May-11 www.vishay.com 13 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9135 Vishay Siliconix DESCRIPTION OF OPERATION (CONT’D) SMBus Commands individually or as a group commanded on or off using a code word on the SMBus, as detailed in the SMBus Truth Table. The command sequence is: 1. Receive a start bit, which is a falling edge on the SDA line while the SCL line is high. 2. Receive a one-byte address, which for Si9135 is 01100000. 3. Send an acknowledge bit. 4. Receive a one-byte command. 5. Send an acknowledge bit. 6. Receive a stop bit, which is a rising edge on the SDA line while the SCL line is high. This is a total of 20 bits, which at the maximum clock frequency of 100 kHz translates into 200 µsec before any change in the status of Si9135 ban be accomplished. If Si9135 receives a command to turn on (respectively, off) a converter that is already on (respectively, off) it shall not falsely command the converter off (respectively, on). Si9135 must be able to receive a stop command at any time during a command sequence. If Si9135 receives a stop command during a command sequence, it must not change the state of any converter, and must be ready to receive the next command sequence. Grounding There are two separate grounds on the Si9135, analog signal ground (GND) and power ground (PGND). The purpose of two separate grounds is to prevent the high currents on the power devices (both external and internal) from interfering with the analog signals. The internal components of Si9135 have their grounds tied (internally) together. These two grounds are then tied together (externally) at a single point, to ensure Si9135 noise immunity. This separation of grounds should be maintained in the external circuitry, with the power ground of all power devices being returned directly to the input capacitors, and the small signal ground being returned to the GND pin of Si9135. ON/OFF Function Logic-low shuts off the appropriate section by disabling the gate drive stage. High-side and low-side gate drivers are turned off when ON/OFF pins are logic-low. Logic-high enables the DH and DL pins. Stability Buck Converters: In order to simplify designs, the Si9135 requires no specified external components except load capacitors for stability control. Meanwhile, it achieves excellent regulation and efficiency. The converters are current mode control, with a bandwidth substantially higher than the LC tank dominant pole frequency of the output filter. To ensure stability, the minimum capacitance and maximum ESR values are: CLOAD VREF 2π x VOUT x R CS x BW ESR V OUT x Rcs VREF Where VREF = 3.3 V, VOUT is the output voltage (5 V or 3.3 V), Rcs is the current sensing resistor in ohms and BW = 50 khz. With the components specified in the application circuit (L = 10 µH, RCS = 0.02 , COUT = 330 µF, ESR approximately 0.1 , the converter should have a bandwidth at approximately 50 kHz, with minimum phase margin of 65°, and dc gain above 50 dB. Other Outputs The Si9135 also provides a 3.3 V reference which can be external loaded up to 1 mA, as well as, a 5 V LDO output which can be loaded 30 mA, or even more depending on the system application. When the 5 V buck converter is turned on, the 5 V LDO output is shorted with the 5 V buck converter output, so its loading capability is substantially increased. For stability, the 3.3 V reference output requires a 1 µF capacitor, and 5 V LDO output requires a 4.7 µF capacitor. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?70817. www.vishay.com 14 Document Number: 70817 S11-0975-Rev. D, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix SSOP: 28-LEAD (5.3 MM) (POWER IC ONLY) 28 15 −B− E1 E 1 14 −A− e D GAUGE PLANE R A2 A − C− c 0.25 L SEATING PLANE L1 A1 0.076 C SEATING PLANE b 0.12 M A B C S MILLIMETERS Dim A A1 A2 b c D E E1 e L L1 R Min 1.73 0.05 1.68 0.25 0.09 10.07 7.60 5.20 0.63 0.09 0_ Nom 1.88 0.13 1.75 0.30 0.15 10.20 7.80 5.30 0.65 BSC 0.75 1.25 BSC 0.15 4_ Max 1.99 0.21 1.78 0.38 0.20 10.33 8.00 5.40 0.95 −−− 8_ ECN: S-40080—Rev. A, 02-Feb-04 DWG: 5915 Document Number: 72810 28-Jan-04 www.vishay.com 1 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. 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Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1
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