SI9181DQ-20-T1-E3

Si9181 Vishay Siliconix Micropower 350-mA CMOS LDO Regulator With Error Flag/Power-On-Reset FEATURES Low 150-mV Dropout at 350-mA Load Guaranteed 350-mA Output Current 600-mA Peak Output Current Capability Uses Low ESR Ceramic Output Capacitor Fast Load and Line Transient Response Only 100-mV(rms) Noise With Noise Bypass Capacitor D 1-mA Maximum Shutdown Current D Built-in Short Circuit and Thermal Protection D Out-Of-Regulation Error Flag (Power Good or POR) D D D D D D D Fixed 1.5-V, 1.8-V, 2.0-V, 2.5-V, 2.8-V, 2.85-V, 2.9 V, 3.0-V, 3.3-V, 5.0-V, or Adjustable Output Voltage Options D Other Output Voltages Available by Special Order APPLICATIONS D Cellular Phones D Laptop and Palm Computers D PDA, Digital Still Cameras DESCRIPTION The Si9181 is a 350-mA CMOS LDO (low dropout) voltage regulator. The device features ultra low ground current and dropout voltage to prolong battery life in portable electronics. The Si9181 offers line/load transient response and ripple rejection superior to that of bipolar or BiCMOS LDO regulators. The device is designed to maintain regulation while delivering 600-mA peak current. This is useful for systems that have high surge current upon turn-on. The Si9181 is designed to drive the lower cost ceramic, as well as tantalum, output capacitors. The device is guaranteed stable from maximum load current down to 0-mA load. In addition, an external noise bypass capacitor connected to the device’s CNOISE pin will lower the LDO’s output noise for low noise applications. The Si9181 also includes an out-of-regulation error flag. When the output voltage is 5% below its nominal output voltage, the error flag output goes low. If a capacitor is connected to the device’s delay pin, the error flag output pin will generate a delayed power-on-reset signal. The Si9181 is available in both standard and lead (Pb)-free packages. TYPICAL APPLICATIONS CIRCUITS 1 2 3 VIN 2.2 mF GND 4 8 7 6 5 2.2 mF VOUT VIN 2.2 mF GND 1 2 3 4 8 7 6 5 VOUT 2.2 mF CNOISE DELAY GND VIN SD ERROR SENSE/ADJ VOUT CNOISE DELAY GND VIN SD ERROR SENSE/ADJ VOUT Si9181 FIGURE 1. Fixed Output Si9181 FIGURE 2. Adjustable Output 1 0.1 mF 2 0.1 mF 3 4 CNOISE DELAY GND VIN SD ERROR 8 7 6 5 2.2 mF 1 MW ON/OFF POR VOUT SENSE/ADJ VOUT VIN 2.2 mF GND Si9181 FIGURE 3. Low Noise, Full Features Application Document Number: 71119 S-40694—Rev. D, 19-Apr-04 www.vishay.com 1 Si9181 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5 V SD Input Voltage, VSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VIN Output Current, IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protected Output Voltage, VOUT . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VO(nom) + 0.3 V Maximum Junction Temperature, TJ(max) . . . . . . . . . . . . . . . . . . . . . . . 150_C Storage Temperature, TSTG . . . . . . . . . . . . . . . . . . . . . . . . . . −55_C to 150_C ESD (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV Power Dissipation (Package)a 8-Pin TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 833 mW Thermal Impedance (QJA) 8-Pin TSSOPb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120_C/W Notes a. Device mounted with all leads soldered or welded to PC board. b. Derate 8.3 mW/_C above TA = 25_C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 V to 6 V Output Voltage, VOUT (Adjustable Version) . . . . . . . . . . . . . . . . . . 1.5 V to 5 V SD Input Voltage, VSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VIN CIN = 2.2 mF, COUT = 2.2 mF (ceramic, X5R or X7R type) , CNOISE = 0.1 mF (ceramic) COUT Range = 1 mF to 10 mF ("10%, x5R or x7R type) CIN w COUT Operating Ambient Temperature, TA . . . . . . . . . . . . . . . . . . . . −40_C to 85_C Operating Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . −40_C to 125_C SPECIFICATIONS Test Conditions Unless Otherwise Specified Parameter Output Voltage Range Output Voltage Accuracy Output Voltage Accuracy (Fixed Versions) Feedback Voltage (ADJ Version) Line Regulation (Except 5-V Version) Line Regulation (5-V Version) Line Regulation (ADJ Version) VIN DVOUT 100 VOUT(nom) VOUT Limits −40 to 85_C Symbol VIN = VOUT(nom) + 1 V, IOUT = 1 mA CIN = 2.2 mF, COUT = 2.2 mF, VSD = 1.5 V Tempa Full Room Full Room Full Minb 1.5 −1.5 −2.5 1.191 1.179 −0.18 −0.18 −0.18 −0.18 Typc Maxb 5 1.5 2.5 Unit V % VO( O(nom) ) V Adjustable Version 1 mA v IOUT v 350 mA VADJ From VIN = VOUT(nom) + 1 V to VOUT(nom) + 2 V From VIN = 5.5 V to 6 V VOUT = 1.5 V, From VIN = 2.5 V to 3.5 V VOUT = 5 V, From VIN = 5.5 V to 6 V IOUT = 10 mA 1.215 1.239 1.251 0.18 0.18 0.18 0.18 Full Full Full Full Room Room Room Full Room Room Full Room Room Full Room Full %/V 5 85 150 20 180 400 550 mV Dropout Voltage Dropout Voltaged (@VOUT w 2 V) VIN − VOUT Dropout Voltaged (@V (@VOUT t 2 V, VIN w 2 V) IOUT = 200 mA IOUT = 350 mA IOUT = 200 mA IOUT = 350 mA IOUT = 0 mA IOUT = 200 mA IOUT = 350 mA 170 290 250 425 575 150 1000 1500 1500 2800 Document Number: 71119 S-40694—Rev. D, 19-Apr-04 mA Ground Pin Current IGND www.vishay.com 2 Si9181 Vishay Siliconix SPECIFICATIONS Test Conditions Unless Otherwise Specified Parameter Shutdown Supply Current ADJ Pin Current Peak Output Current Output Noise Voltage Limits −40 to 85_C Symbol IIN(off) IADJ IO(peak) eN VIN = VOUT(nom) + 1 V, IOUT = 1 mA CIN = 2.2 mF, COUT = 2.2 mF, VSD = 1.5 V Tempa Room Room Room Room Room Room Room Room Room Room Room Room Minb Typc 0.1 5 Maxb 1 100 Unit mA nA mA VSD = 0 V ADJ = 1.2 V VOUT w 0.95 x VOUT(nom), tpw = 2 ms BW = 50 Hz to 100 kHz IOUT = 150 mA w/o CNOISE CNOISE = 0.1 mF f = 1 kHz f = 10 kHz f = 100 kHz 600 200 100 60 60 40 10 30 5 2 mV (rms) Ripple Rejection pp j DVOUT/DVIN IOUT = 150 mA dB Dynamic Line Regulation Dynamic Load Regulation VOUT Turn On Time urn-On-Time DVO(line) DVO(load) tON VIN : VOUT(nom) + 1 V to VOUT(nom) + 2 V tR/tF = 5 ms, IOUT = 350 mA IOUT : 1 mA to 150 mA, tR/tF = 2 ms VIN = 4.3 V .3 VOUT = 3.3 V w/o CNOISE Cap CNOISE = 0.1 mF mV ms mS Thermal Shutdown Thermal Shutdown Junction Temp Thermal Hysteresis Short Circuit Current tJ(s/d) tHYST ISC VOUT = 0 V Room Room Room 165 20 800 _C mA Shutdown Input SD Input Voltage VIH VIL IIH IIL VHYST High = Regulator ON (Rising) Low = Regulator OFF (Falling) VSD = 0 V, Regulator OFF VSD = 6 V, Regulator ON Full Full Room Room Full 0.01 1.0 100 1.5 VIN 0.4 V SD Input Currente Shutdown Hysteresis mA mV Error Output Output High Leakage Output Low Voltageg Power_Good Trip Thresholdf, h (Rising) Hysteresis f Delay Pin Current Source IOFF VOL VTH VHYST IDELAY ERROR = VOUT(nom) ISINK = 2 mA Full Full Full Room Room 1.2 0.93 x VOUT 0.95 x VOUT 2% x VOUT 2.2 3.0 mA 0.01 2 0.4 0.97 x VOUT V mA Notes a. Room = 25_C, Full = −40 to 85_C. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at VOUT w 2 V are measured at VOUT = 3.3 V, while typical values for dropout voltage at VOUT < 2 V are measured at VOUT = 1.8 V. d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-V differential, provided that VIN does not not drop below 2.0 V. e. The device’s shutdown pin includes a typical 6-MW internal pull-down resistor connected to ground. f. VOUT is defined as the output voltage of the DUT at 1 mA. g. The Error Output (Low) function is guaranteed from VOUT = 2.0 V to VOUT = 5.0 V. h. The Power_Good trip threshold function is guaranteed from VOUT = 1.5 V to VOUT = 5.0 V and VIN w 2.0 V. Document Number: 71119 S-40694—Rev. D, 19-Apr-04 www.vishay.com 3 Si9181 Vishay Siliconix TIMING WAVEFORMS VIN tON VNOM 0.95 VNOM VOUT ERROR tDELAY FIGURE 4. Timing Diagram for Power-Up PIN CONFIGURATION TSSOP-8 CNOISE DELAY GND VIN 1 2 3 4 Top View 8 7 6 5 SD ERROR SENSE or ADJ VOUT PIN DESCRIPTION Pin Number 1 2 3 4 5 6 7 8 www.vishay.com Name CNOISE DELAY GND VIN VOUT SENSE or ADJ ERROR SD Function Noise bypass pin. For low noise applications, a 0.01-mF or larger ceramic capacitor should be connected from this pin to ground. Capacitor connected from this pin to ground will allow a delayed power-on-reset signal at the ERROR (Pin 7) output. Refer to Figure 4. Ground pin. Local ground for CNOISE and COUT. Input supply pin. Bypass this pin with a 2.2-mF ceramic or tantalum capacitor to ground. Output voltage. Connect COUT between this pin and ground. For fixed output voltage versions, this pin should be connected to VOUT (Pin 5). For adjustable output voltage version, this voltage feedback pin sets the output voltage via an external resistor divider. This open drain output is an error flag output which goes low when VOUT drops 5% below its nominal voltage. This pin also provides a power-on-reset signal if a capacitor is connected to the DELAY pin. By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused. Document Number: 71119 S-40694—Rev. D, 19-Apr-04 4 Si9181 Vishay Siliconix ORDERING INFORMATION Part Number Si9181DQ-15-T1 Si9181DQ-18-T1 Si9181DQ-20-T1 Si9181DQ-25-T1 Si9181DQ-28-T1 Si9181DQ-285-T1 Si9181DQ-29-T1 Si9181DQ-30-T1 Si9181DQ-33-T1 Si9181DQ-50-T1 Si9181DQ-AD-T1 Lead (Pb)-Free Part Number Si9181DQ-15-T1—E3 Si9181DQ-18-T1—E3 Si9181DQ-20-T1—E3 Si9181DQ-25-T1—E3 Si9181DQ-28-T1—E3 Si9181DQ-285-T1—E3 Si9181DQ-29-T1—E3 Si9181DQ-30-T1—E3 Si9181DQ-33-T1—E3 Si9181DQ-50-T1—E3 Si9181DQ-AD-T1—E3 Marking 115 118 120 125 128 285 129 130 133 150 1AD Voltage 1.5 V 1.8 V 2.0 V 2.5 V 2.8 V 2.85 V 2.9 V 3.0 V 3.3 V 5.0 V Adjustable Temperature Range Package −40 to 85_C TSSOP-8 * Additional voltage options are available. Eval Kit Si9181DB Temperature Range −40 to 85_C Board Type Surface Mount TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED) Dropout Voltage vs. Load Current 300 250 200 V OUT (V) 150 100 50 0 0 100 200 300 ILOAD (mA) 400 500 600 VOUT = 3.3 V 3.5 3.0 RLOAD = 16.5 W 2.5 2.0 1.5 1.0 0.5 0.0 0 1 2 3 VIN (V) 4 5 6 Dropout Characteristic V DROP (mV) Dropout Voltage vs. Temperature 200 175 150 V DROP (mV) 125 100 75 50 25 0 −50 50 IOUT = 10 mA IOUT = 0 mA −25 0 25 50 75 100 125 150 Junction Temperature (_C) Document Number: 71119 S-40694—Rev. D, 19-Apr-04 VOUT = 3.3 V IOUT = 350 mA IOUT = 300 mA Dropout Voltage (mV) 250 200 300 Dropout Voltage vs. VOUT IOUT = 350 mA 150 100 IOUT = 300 mA IOUT = 10 mA 0 1.0 1.5 2.0 2.5 3.0 VOUT www.vishay.com 3.5 4.0 4.5 5.0 5 Si9181 Vishay Siliconix TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED) Normalized Output Voltage vs. Load Current 0.30 0.15 0.00 −0.15 −0.30 −0.45 −0.60 −0.75 0 50 100 150 200 250 300 350 400 Load Current (mA) V OUT (%) −0.0 −0.2 −0.4 −0.6 IOUT = 200 mA −0.8 −1.0 −1.2 −40 IOUT = 300 mA IOUT = 350 mA IOUT = 100 mA Normalized VOUT vs. Temperature IOUT = 0 mA Output Voltage (%) −20 0 20 40 60 80 100 120 140 Junction Temperature (_C) GND Current vs. Load Current 0.0 VOUT = 5 V −0.3 250 200 I GND ( m A) I GND ( m A) −0.6 25_C −0.9 300 No Load GND Pin Current vs. Input Voltage 85_C 150 100 25_C −40_C −1.2 50 0 0 50 100 150 200 250 300 350 0 1 −1.5 Load Current (mA) 2 3 4 5 6 7 Input Voltage (V) 0 Power Supply Rejection CIN = 10 mF COUT = 2.2 mF ILOAD = 150 mA 2000 GND Pin Current vs. Temperature and Load VOUT = 5 V IOUT = 350 mA −20 1500 I GND ( m A) Gain (dB) −40 1000 IOUT = 200 mA −60 500 IOUT = 0 mA −80 10 100 1000 10000 100000 1000000 0 −40 −20 0 20 40 60 80 100 120 140 Frequency (Hz) Junction Temperature (_C) Document Number: 71119 S-40694—Rev. D, 19-Apr-04 www.vishay.com 6 Si9181 Vishay Siliconix TYPICAL WAVEFORMS Load Transient Response-1 Load Transient Response-2 VOUT 10 mV/div VOUT 10 mV/div ILOAD 100 mA/div ILOAD 100 mA/div 5.00 ms/div VOUT = 3.3 V COUT = 2.2 mF ILOAD = 1 to 150 mA trise = 2 msec 5.00 ms/div VOUT = 3.3 V COUT = 2.2 mF ILOAD = 150 to 1 mA tfall = 2 msec Load Transient Response-3 Load Transient Response-4 VOUT 10 mV/div VOUT 10 mV/div ILOAD 100 mA/div ILOAD 100 mA/div 5.00 ms/div VOUT = 3.3 V COUT = 1.0 mF ILOAD = 1 to 150 mA trise = 2 msec 5.00 ms/div VOUT = 3.3 V COUT = 1.0 mF ILOAD = 150 to 1 mA tfall = 2 msec LineTransient Response-1 VOUT 1 V/div VIN 2 V/div LineTransient Respons-2 VOUT 10 mV/div VOUT 10 mV/div 5.00 ms/div VINSTEP = 4.3 to 5.3 V VOUT = 3.3 V COUT = 2.2 mF CIN = 10 mF ILOAD = 350 mA trise = 5 msec 5.00 ms/div VINSTEP = 5.3 to 4.3 V VOUT = 3.3 V COUT = 2.2 mF CIN = 10 mF ILOAD = 350 mA tfall = 5 msec Document Number: 71119 S-40694—Rev. D, 19-Apr-04 www.vishay.com 7 Si9181 Vishay Siliconix TYPICAL WAVEFORMS Turn-On Sequence Turn-Off Sequence VIN CH-3 2 V/div VIN 2 V/div VOUT 2 V/div VOUT CH-1 2 V/div Cdelay 2 V/div ERROR 2 V/div Cdelay CH-4 2 V/div ERROR CH-2 2 V/div VIN = 4.2 V VOUT = 3.3 V Cdelay = 0.1 mF CNOISE = 0.1 mF ILOAD = 350 mA 5.00 ms/div VIN = 4.2 V VOUT = 3.3 V Cdelay = 0.1 mF CNOISE = 0.1 mF ILOAD = 350 mA 10.00 ms/div Output Noise 10.0 Noise Spectrum mV 500 mV/div Hz 0.01 1 ms/div VIN = 4.2 V VOUT = 3.3 V IOUT = 150 mA CNOISE = 0.1 mF BW = 10 Hz to 1 MHz 100 Hz VIN = 4.1 V VOUT = 3.3 V/10 mA CNOISE = 0.1 mF 1 MHz www.vishay.com 8 Document Number: 71119 S-40694—Rev. D, 19-Apr-04 Si9181 Vishay Siliconix BLOCK DIAGRAMS Switches shown for device in normal operating mode (SD = HIGH) 6 VIN CIN 2.2 mF 4 SENSE 1 CNOISE SD ON OFF 8 RFB2 6 MW RFB1 + + − 60 mV + − 2 mA To VIN 5 COUT 2.2 mF 2 CDELAY 0.1 mF 7 REXT VOUT ERROR GND 3 1.215 V VREF + − − + FIGURE 5. 350-mA CMOS LDO Regulator (Fixed Output) 6 VIN CIN 2.2 mF 4 ADJ 1 CNOISE R2 8 VADJ R1 SD ON OFF + − 6 MW 60 mV + + − 2 mA To VIN 5 COUT 2.2 mF 2 CDELAY 0.1 mF 7 REXT VOUT ERROR GND 3 1.215 V VREF + − − + FIGURE 6. 350-mA CMOS LDO Regulator (Adjustable Output) Document Number: 71119 S-40694—Rev. D, 19-Apr-04 www.vishay.com 9 Si9181 Vishay Siliconix DETAILED DESCRIPTION The Si9181 is a low drop out, low quiescent current, and very linear regulator family with very fast transient response. It is primarily designed for battery powered applications where battery run time is at a premium. The low quiescent current allows extended standby time while low drop out voltage enables the system to fully utilize battery power before recharge. The Si9181 is a very fast regulator with bandwidth exceeding 50 kHz while maintaining low quiescent current at light load conditions. With this bandwidth, the Si9181 is the fastest LDO available today. The Si9181 is stable with any output capacitor type from 1 mF to 10.0 mF. However, X5R or X7R ceramic capacitors are recommended for best output noise and transient performance. VIN VIN is the input supply pin. The bypass capacitor for this pin is not critical as long as the input supply has low enough source impedance. For practical circuits, a 1.0-mF or larger ceramic capacitor is recommended. When the source impedance is not low enough and/or the source is several inches from the Si9181, then a larger input bypass capacitor is needed. It is required that the equivalent impedance (source impedance, wire, and trace impedance in parallel with input bypass capacitor impedance) must be smaller than the input impedance of the Si9181 for stable operation. When the source impedance, wire, and trace impedance are unknown, it is recommended that an input bypass capacitor be used of a value that is equal to or greater than the output capacitor. VOUT VOUT is the output voltage of the regulator. Connect a bypass capacitor from VOUT to ground. The output capacitor can be any value from 1.0 mF to 10.0 mF. A ceramic capacitor with X5R or X7R dielectric type is recommended for best output noise, line transient, and load transient performance. GND Ground is the common ground connection for VIN and VOUT. It is also the local ground connection for CNOISE, DELAY, SENSE or ADJ, and SD. SENSE or ADJ SENSE is used to sense the output voltage. Connect SENSE to VOUT for the fixed voltage version. For the adjustable output version, use a resistor divider R1 and R2, connect R1 from VOUT to ADJ and R2 from ADJ to ground. R2 should be in the 25-kW to 150-kW range for low power consumption, while maintaining adequate noise immunity. www.vishay.com The formula below calculates the value of R1, given the desired output voltage and the R2 value, V OUT * VADJ R2 VADJ (1) R1 + VADJ is nominally 1.215 V. SHUTDOWN (SD) SD controls the turning on and off of the Si9181. VOUT is guaranteed to be on when the SD pin voltage equals or is greater than 1.5 V. VOUT is guaranteed to be off when theSD pin voltage equals or is less than 0.4 V. During shutdown mode, the Si9181 will draw less than 2-mA current from the source. To automatically turn on VOUT whenever the input is applied, tie the SD pin to VIN. ERROR ERROR is an open drain output that goes low when VOUT is less than 5% of its normal value. As with any open drain output, an external pull up resistor is needed. When a capacitor is connected from DELAY to GROUND, the error signal transition from low to high is delayed (see Delay section). This delayed error signal can be used as the power-on reset signal for the application system. (Refer to Figure 4.) The ERROR pin is disconnected if not used. DELAY A capacitor from DELAY to GROUND sets the time delay for ERROR going from low to high state. The time delay can be calculated using the following formula: Tdelay + VADJ Cdelay Idelay (2) The DELAY pin should be an open circuit if not used. CNOISE For low noise application, connect a high frequency ceramic capacitor from CNOISE to ground. A 0.01-mF or a 0.1-mF X5R or X7R is recommended. Document Number: 71119 S-40694—Rev. D, 19-Apr-04 10