SI9200EY-T1-E3

Si9200 Vishay Siliconix CAN Bus Driver and Receiver DESCRIPTION The Si9200EY is designed to interface between the Intel 82526 CAN controller and the physical bus to provide drive capability to the bus and differential receive capability to the controller. It is designed to absorb typical electrical transients on the bus which may occur in an automotive or industrial application, and protect itself against any abnormal bus conditions. The transmitter will be disabled during these conditions and will be re-enabled when the abnormal condition is cleared. The Si9200EY is built using the Siliconix BiC/DMOS process. This process supports CMOS, DMOS, and isolated bipolar transistors and uses an epitaxial layer to prevent latchup. The bus line pins are diode protected and can be driven beyond the VDD to ground range. The Si9200EY is offered in the space efficient 8-pin highdensity surface-mount plastic package and is specified over the automotive temperature range (- 40 °C to 125 °C). The Si9200EY is available in lead free. FEATURES • Survives Ground Shorts and Transients on Multiplexed Bus in Automotive and Industrial Applications • Single Power Supply • Compatible with Intel 82526 CAN Controller • Direct Interface - No External Components Required • Automotive Temperature Range (- 40 °C to 125 °C) PIN CONFIGURATION AND FUNCTIONAL BLOCK DIAGRAM VDD SO-8 TX GND VDD RX 1 2 3 4 Top View 8 7 6 5 GND CAN_H CAN_L REF REF CAN_L Bus Ordering Information: Si9200EY-T1 Si9200EY-T1—E3 (Lead Free) TX RX CAN_H GND Document Number: 70015 S11-0975-Rev. D, 16-May-11 www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9200 Vishay Siliconix ABSOLUTE MAXIMUM RATINGSa Parameter Operating Temperature (TA) Junction and Storage Temperature Voltage On Any Pin (except CAN_H and CAN_L) with Respect to Ground Voltage On CAN_H and CAN_L with Respect to Ground Supply Voltage, VDD Continuous Output Current Thermal Ratingsb: RthJA Limit - 40 to 125 - 55 to 150 - 0.3 to VDD + 0.3 - 3 to 16 - 0.3 to 12 ± 100 62.5 (no airflow) mA °C V Unit °C Notes: a. Extended exposure to the absolute maximum ratings or stresses beyond these ratings may affect device reliability or may cause permanent damage to the device. Functional operation at conditions other than the recommended operating conditions is not implied. b. Mounted on 1-IN2, FR4 PC Board. RECOMMENDED OPERATING RANGE Parameter VDD Bus Load Resistance Limit 4.75 to 5.25 60 Unit V  SPECIFICATIONS Parameter Input TX Input Voltage High TX Input Voltage Low TX Input Current Low TX Input Current High Output VCAN_HR, VCAN_LR Bus Recessive VDIF = VCAN_HR - VCAN_LR VCAN_HD Bus Dominant VCAN_LD VDIF = VCAN_HD - VCAN_LD VREF VRXH TX = VINL, RL = 60  TX = VINH, RL =  2 - 0.5 2.75 0.5 1.5 - 25 µA  IREF  25 µA TX = VINH - 2  VCAN_H, VCAN_L  7 - 1  VCAN_H - VCAN_L  0.5 (Bus Recessive) TX = VINH - 0.8  VCAN_H  7 - 2  VCAN_L  5.8 0.9  VCAN_H - VCAN_L  5 ( Bus Dominant) IOUT = - 10 µA IOUT = - 100 µA IOUT = - 2 mA IOUT = 10 µA IOUT = 100 µA IOUT = 2 mA 5 5 TX = VINH (Recessive) 10 0.5 VDD - 0.2 VDD - 0.3 VDD - 1 VDD - 1.75 Symbol Test Conditions Unless Otherwise Specified VDD = 4.75 V to 5.25 V Min.b Limits TA = - 40 V to 125 °C Typ.c Max.b Unit VINH VINL IIL IIH TX = 0 V TX = VDD 4 1 - 50 -1 2.5 0 3.5 1.5 2 0.5 VDD VDD - 0.05 VDD - 0.2 VDD - 1 V µA -2 1 3 0.05 4.5 2.25 3 0.5 VDD + 0.2 Reference Output Receive Output (Bus Recessive Conditions) V 0.05 0.2 1 0.3 1 1.75 50 50 100 50 pF k Receive Output (Bus Dominant Conditions) VRXL RIN, BUS_L Internal Resistance from Bus Pins Internal Capacitance from Bus Pinsc RIN, BUS_H RDIFF CIN (CAN_H, CAN_L) www.vishay.com 2 Document Number: 70015 S11-0975-Rev. D, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9200 Vishay Siliconix SPECIFICATIONS Parameter Dynamic Propagation Delay TX to VDIFF High Propagation Delay TX to VDIFF Low Propagation Delay TX to Receive Low Propagation Delay TX to Receive High Supply Suppply Current Transientc Electrostatic Discharge Human Body Model Bus Transient Voltage Protection Thermal Trip Pointc Thermal Hysteresisc TTRP THYS 150 10 165 20 180 30 °C VESD VTRANS CL = 100 pF, RL = 1500  MIL-STD-883D, Method 3015 RS = 1000 , 1 ms - 60 2000 60 V IDD TX = VINH, VDD = 5.25 V, RL = 60 (Recessive) TX = VINL, VDD = 5.25 V, RL = 60 (Dominant) 40 25 75 mA tON-TX tOFF-TX tON-RX tOFF-RX 50 50 ns 120 120 Symbol Test Conditions Unless Otherwise Specified VDD = 4.75 V to 5.25 V Min.b Limits TA =- 40 V to 125 °C Typ.c Max.b Unit Notes: a. Typical values are for DESIGN AID ONLY at TA = 25 °C, not guaranteed nor subject to production testing. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. Guaranteed by design, not subject to production test. Truth Table TX Low High (or Floating) High (or Floating) Mode Transmit Transmit and Receive Receive Bus State Dominant Recessive Recessive CAN_H High Floating High CAN_L Low Floating Low RX Low High Low Document Number: 70015 S11-0975-Rev. D, 16-May-11 www.vishay.com 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Si9200 Vishay Siliconix SWITCHING TIME TEST CIRCUIT VDD TX tr, tf 10 ns 5V 50% 0V TX CAN_H CL 100 pF VDIFF = VCAN_H − VCAN_L CAN_L 1V 30 pF tON-TX tOFF-TX RX VRX − VREF 0 100 mV 100 mV REF 30 pF tON-RX tOFF-RX RL = 60 CIRCUIT SCHEMATIC VDD TX VDD 10 CAN_H 120 RX 1 Mbit CAN Bus 120 Host Controller REF Fault CAN_L 10 Current Limit Protection 2 Wire Twisted Pair (Shielded) Temp Sense Delay VREF GND www.vishay.com 4 Document Number: 70015 S11-0975-Rev. D, 16-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix SOIC (NARROW): 8-LEAD JEDEC Part Number: MS-012 8 7 6 5 E 1 2 3 4 H S D 0.25 mm (Gage Plane) A h x 45 C All Leads q L 0.101 mm 0.004" e B A1 MILLIMETERS DIM A A1 B C D E e H h L q S 5.80 0.25 0.50 0° 0.44 Min 1.35 0.10 0.35 0.19 4.80 3.80 1.27 BSC 6.20 0.50 0.93 8° 0.64 0.228 0.010 0.020 0° 0.018 Max 1.75 0.20 0.51 0.25 5.00 4.00 Min 0.053 0.004 0.014 0.0075 0.189 0.150 INCHES Max 0.069 0.008 0.020 0.010 0.196 0.157 0.050 BSC 0.244 0.020 0.037 8° 0.026 ECN: C-06527-Rev. I, 11-Sep-06 DWG: 5498 Document Number: 71192 11-Sep-06 www.vishay.com 1 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1