SIHFB17N50L

IRFB17N50L, SiHFB17N50L Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 130 33 59 Single D FEATURES 500 0.28 • Low Gate Charge Qg results in Simple Drive Requirement • Improved Gate, Avalanche and Dynamic dV/dt Ruggedness • Fully Characterized Capacitance Avalanche Voltage and Current • Low Trr and Soft Diode Recovery • Lead (Pb)-free Available and Available RoHS* COMPLIANT TO-220 APPLICATIONS G • Switch Mode Power Supply (SMPS) • Uninterruptible Power Supply • High Speed Power Switching S N-Channel MOSFET S G D • ZVS and High Frequency Circuit • PWM Inverters ORDERING INFORMATION Package Lead (Pb)-free SnPb TO-220 IRFB17N50LPbF SiHFB17N50L-E3 IRFB17N50L SiHFB17N50L ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID IDM EAS IAR EAR TC = 25 °C PD dV/dt TJ, Tstg for 10 s 6-32 or M3 screw LIMIT 500 ± 30 16 11 64 1.8 390 16 22 220 13 - 55 to + 150 300d 10 1.1 W/°C mJ A mJ W V/ns °C lbf · in N·m A UNIT V Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 3.0 mH, RG = 25 Ω, IAS = 16 A (see fig. 12). c. ISD ≤ 16 A, dI/dt ≤ 347 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91098 S-81263-Rev. A, 21-Jul-08 www.vishay.com 1 IRFB17N50L, SiHFB17N50L Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) SYMBOL RthJA RthCS RthJC TYP. 0.50 MAX. 62 0.56 °C/W UNIT SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time IS ISM VSD trr MOSFET symbol showing the integral reverse p - n junction diode D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS ΔVDS/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss Coss Coss eff. Qg Qgs Qgd td(on) tr td(off) tf VGS = 0 V, ID = 250 µA Reference to 25 °C, ID = 1 mA VDS = VGS, ID = 250 µA VGS = ± 30 V VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 9.9 Ab VDS = 50 V, ID = 9.9 Ab 500 3.0 11 0.6 0.28 - 5.0 ± 100 50 2.0 0.32 - V V/°C V nA µA mA Ω S VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VGS = 0 V VGS = 0 V VGS = 0 V VDS = 1.0 V , f = 1.0 MHz VDS = 400 V , f = 1.0 MHz VDS = 0 V to 400 Vc ID = 16 A, VDS = 400 V, see fig. 6 and 13b - 2760 325 37 3690 84 159 21 51 50 28 130 33 59 ns nC pF VGS = 10 V - VDD = 250 V, ID = 16 A, RG = 7.5 Ω, see fig. 10b - - 170 220 470 810 7.3 16 A 64 1.5 250 330 710 1210 11 V ns G S TJ = 25 °C, IS = 16 A, VGS = 0 Vb TJ = 25 °C TJ = 125 °C TJ = 25 °C TJ = 125 °C IF = 16 A, dI/dt = 100 A/µsb - Body Diode Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time Qrr IRRM ton nC A Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. www.vishay.com 2 Document Number: 91098 S-81263-Rev. A, 21-Jul-08 IRFB17N50L, SiHFB17N50L Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 100 Top VGS 15 V 12 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 100 TJ = 150 °C ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 10 Bottom 10 TJ = 25 °C 1 5.0 V 0.1 20 μs PULSE WIDTH TJ = 25 °C 0.01 0.1 1 10 100 VDS, Drain-to-Source Voltage (V) 1 0.1 4.0 5.0 6.0 7.0 VDS = 50 V 20 μs PULSE WIDTH 8.0 9.0 10.0 VGS, Gate-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics Fig. 3 - Typical Transfer Characteristics RDS(on), Drain-to-Source On Resistance (Normalized) 100 Top VGS 15 V 12 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V Bottom 5.0 V 3.0 ID = 16 A 2.5 ID, Drain-to-Source Current (A) 10 2.0 5.0 V 1.5 1 1.0 20 μs PULSE WIDTH TJ = 125 °C 0.1 0.1 1 10 100 0.5 VGS = 10 V - 60 - 40 - 20 0 20 40 60 80 100 120 140 160 0.0 TJ, Junction Temperature VDS, Drain-to-Source Voltage (V) Fig. 2 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91098 S-81263-Rev. A, 21-Jul-08 www.vishay.com 3 IRFB17N50L, SiHFB17N50L Vishay Siliconix 1 000 000 VGS = 0 V, Ciss = Cgs + Cgd, Cds Crss = Cgd Coss = Cds + Cgd f = 1 MHz Shorted TJ = 150 °C ISD, Reverse Drain Current (A) 100 10 000 C, Capacitance (pF) Ciss 1000 Coss 100 Crss 10 1 10 100 1000 10 TJ = 25 °C 1 0.1 0.2 VGS = 0 V 0.6 0.9 1.3 1.6 VDS, Drain-to-Source Voltage (V) VSD, Source-to-Drain Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage 20 ID = 16 A 16 VDS = 400 V VDS = 250 V VDS = 100 V 1000 OPERATING IN THIS AREA LIMITED BY RDS(on) 100 ID, Drain Current (A) 10 μs 10 100 μs 1 ms 1 10 ms TC = 25 °C TJ = 150 °C Single Pulse 100 1000 10000 VGS, Gate-to-Source Voltage (V) 12 8 4 0 0 30 120 60 90 QG, Total Gate Charge (nC) 150 0.1 10 VDS, Drain-to-Source Voltage (V) Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area www.vishay.com 4 Document Number: 91098 S-81263-Rev. A, 21-Jul-08 IRFB17N50L, SiHFB17N50L Vishay Siliconix RD 20 VGS RG 16 ID, Drain Current (A) 10 V 12 Pulse width ≤ 1 µs Duty factor ≤ 0.1 % VDS D.U.T. + - VDD Fig. 10a - Switching Time Test Circuit 8 VDS 4 90 % 0 25 50 75 100 125 150 TC, Case Temperature (°C) 10 % VGS td(on) tr td(off) tf Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms 1 D = 0.50 Thermal Response (ZthJC) 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t1/ t2 2. Peak TJ = PDM x ZthJC + TC 0.01 0.001 0.00001 0.0001 0.001 0.01 0.1 1 t , Rectangular Pulse Duration (sec) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case VDS 15 V tp VDS L Driver RG 20 V tp D.U.T IAS 0.01 Ω + A - VDD A IAS Fig. 12b - Unclamped Inductive Waveforms Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91098 S-81263-Rev. A, 21-Jul-08 www.vishay.com 5 IRFB17N50L, SiHFB17N50L Vishay Siliconix 800 TOP EAS, Single Pulse Avalanche Energy (mJ) 640 BOTTOM ID 7A 10 A 16 A 480 320 160 0 25 50 75 100 125 150 Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ 12 V VGS QGS QG 0.2 µF 0.3 µF QGD D.U.T. + - VDS VG VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 91098 S-81263-Rev. A, 21-Jul-08 IRFB17N50L, SiHFB17N50L Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + + - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91098. Document Number: 91098 S-81263-Rev. A, 21-Jul-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1