SIHFD310-E3

SIHFD310-E3

  • 厂商:

    VISHAY

  • 封装:

  • 描述:

    SIHFD310-E3 - Power MOSFET - Vishay Siliconix

  • 详情介绍
  • 数据手册
  • 价格&库存
SIHFD310-E3 数据手册
IRFD310, SiHFD310 Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 17 3.4 8.5 Single D FEATURES 400 3.6 • Dynamic dV/dt Rating • Repetitive Avalanche Rated • For Automatic Insertion • End Stackable • Fast Switching • Ease of Paralleling • Simple Drive Requirements • Lead (Pb)-free Available Available RoHS* COMPLIANT HEXDIP DESCRIPTION G S D G S N-Channel MOSFET Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The 4 pin DIP package is a low cost machine-insertiable case style which can be stacked in multiple combinations on standard 0.1" pin centers. The dual drain serveres as a thermal link to the mounting surface for power dissipation levels up to 1 W. ORDERING INFORMATION Package Lead (Pb)-free SnPb HEXDIP IRFD310PbF SiHFD310-E3 IRFD310 SiHFD310 ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) for 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 41 mH, RG = 25 Ω, IAS = 1.4 A (see fig. 12). c. ISD ≤ 2.0 A, dI/dt ≤ 40 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91133 S-Pending-Rev. A, 23-Jun-08 TC = 25 °C Energyb EAS IAR EAR PD dV/dt TJ, Tstg VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID IDM LIMIT 400 ± 20 0.35 0.22 2.8 0.0083 46 0.35 0.10 1.0 4.0 - 55 to + 150 300d W/°C mJ A mJ W V/ns °C A UNIT V WORK-IN-PROGRESS www.vishay.com 1 IRFD310, SiHFD310 Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient SYMBOL RthJA TYP. MAX. 62 UNIT °C/W SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS ΔVDS/TJ VGS(th) IGSS IDSS RDS(on) gfs VGS = 0 V, ID = 250 µA Reference to 25 °C, ID = 1 mA VDS = VGS, ID = 250 µA VGS = ± 20 V VDS = 400 V, VGS = 0 V VDS = 320 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 0.38 Ab VDS = 50 V, ID = 1.2 A 400 2.0 1.0 0.47 - 4.0 ± 100 25 250 1.1 - V V/°C V nA µA Ω S Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf LD LS VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 170 34 6.3 8.0 9.9 21 11 4.0 6.0 17 3.4 8.5 nH ns nC pF VGS = 10 V ID = 2.0 A, VDS = 320 V, see fig. 6 and 13b - VDD = 200 V, ID = 2.0 A, RG = 24 Ω, RD = 95 Ω, see fig. 10b - Between lead, 6 mm (0.25") from package and center of die contact D - G S - 240 0.85 0.35 A 2.8 1.6 540 1.6 V ns µC G S TJ = 25 °C, IS = 0.35 A, VGS = 0 Vb TJ = 25 °C, IF = 2.0 A, dI/dt = 100 A/µsb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. www.vishay.com 2 Document Number: 91133 S-Pending-Rev. A, 23-Jun-08 IRFD310, SiHFD310 Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91133 S-Pending-Rev. A, 23-Jun-08 www.vishay.com 3 IRFD310, SiHFD310 Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area www.vishay.com 4 Document Number: 91133 S-Pending-Rev. A, 23-Jun-08 IRFD310, SiHFD310 Vishay Siliconix RD VDS VGS RG D.U.T. + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) tr td(off) tf Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91133 S-Pending-Rev. A, 23-Jun-08 www.vishay.com 5 IRFD310, SiHFD310 Vishay Siliconix L Vary tp to obtain required IAS RG VDS tp VDD D.U.T. I AS 10 V tp 0.01 Ω IAS + V DD VDS VDS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ 12 V 0.2 µF 0.3 µF 10 V QGS QG QGD D.U.T. + - VDS VG VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 91133 S-Pending-Rev. A, 23-Jun-08 IRFD310, SiHFD310 Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + + - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91133. Document Number: 91133 S-Pending-Rev. A, 23-Jun-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1
SIHFD310-E3
物料型号: - IRFD310PbF(无铅) - SiHFD310-E3 - IRFD310(含铅) - SiHFD310

器件简介: 第三代Power MOSFETs,提供快速开关、坚固的器件设计、低电阻和成本效益的最佳组合。4引脚DIP封装是一种低成本的机器插入式封装样式,可以在标准的0.1"管脚中心上进行堆叠组合。双引脚作为热链接到安装表面,用于高达1W的功耗水平。

引脚分配: - 4引脚DIP封装

参数特性: - 漏源电压(Vps):400V - 栅源电压(VGs):±20V - 连续漏电流(ID):在10V下,25°C时为0.35A,100°C时为0.22A - 脉冲漏电流(IDM):2.8A - 单脉冲雪崩能量(EAS):46mJ - 雪崩电流(IAR):0.35A - 重复雪崩能量(EAR):0.10mJ - 最大功耗(PD):1.0W - 峰值二极管恢复dV/dt(dV/dt):4.0V/ns

功能详解: - 动态dV/dt额定值 - 重复雪崩额定值 - 自动插入 - 端堆叠 - 快速开关 - 易于并联 - 简单的驱动要求 - 无铅版本可用

应用信息: 该器件适用于需要快速开关、高耐压和低导通电阻的应用场合,如电源管理、电机控制和变频器等。

封装信息: - HEXDIP封装
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