SIHFL210

IRFL210, SiHFL210 Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 8.2 1.8 4.5 Single D FEATURES 200 1.5 • Surface Mount • Available in Tape and Reel • Dynamic dV/dt Rating • Repetitive Avalanche Rated • Fast Switching • Ease of Paralleling • Simple Drive Requirements • Lead (Pb)-free Available Available RoHS* COMPLIANT SOT-223 G DESCRIPTION Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SOT-223 package is designed for surface-mounting using vapor phase, infrared, or wave soldering techniques. Its unique package design allows for easy automatic pick-and-place as with other SOT or SOIC packages but has the added advantage of improved thermal performace due to an enlarged tab for heatsinking. Power dissipation of greater than 1.25 W is possible in a typical surface mount application. S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free SOT-223 IRFL210PbF SiHFL210-E3 IRFL210 SiHFL210 SOT-223 IRFL210TRPbFa SiHFL210T-E3a IRFL210TRa SiHFL210Ta SnPb Note a. See device orientation. ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID IDM LIMIT 200 ± 20 0.96 0.6 7.7 0.025 0.017 EAS IAR EAR 50 0.96 0.31 W/°C mJ A mJ A UNIT V Linear Derating Factor Linear Derating Factor (PCB Mount)e Single Pulse Avalanche Energyb Repetitive Avalanche Repetitive Avalanche Currenta Energya * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91193 S-81377-Rev. A, 30-Jun-08 www.vishay.com 1 IRFL210, SiHFL210 Vishay Siliconix ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Maximum Power Dissipation Maximum Power Dissipation (PCB Mount)e Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) for 10 s TC = 25 °C TA = 25 °C SYMBOL PD dV/dt TJ, Tstg LIMIT 3.1 2.0 5.0 - 55 to + 150 300d UNIT W V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 81 mH, RG = 25 Ω, IAS = 0.96 A (see fig. 12). c. ISD ≤ 3.3 A, dI/dt ≤ 70 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient (PCB Mount)a Maximum Junction-to-Case (Drain) SYMBOL RthJA RthJC MIN. TYP. MAX. 40 60 UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance www.vishay.com 2 Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf LD LS Between lead, 6 mm (0.25") from package and center of die contact D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS ΔVDS/TJ VGS(th) IGSS IDSS RDS(on) gfs VGS = 0 V, ID = 250 µA Reference to 25 °C, ID = 1 mA VDS = VGS, ID = 250 µA VGS = ± 20 V VDS = 200 V, VGS = 0 V VDS = 160 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 0.58 Ab 200 2.0 0.51 0.30 - 4.0 ± 100 25 250 1.5 - V V/°C V nA µA Ω S VDS = 50 V, ID = 0.58 A VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 140 53 15 8.2 17 14 8.9 4.0 6.0 8.2 1.8 4.5 nH ns nC pF VGS = 10 V ID = 3.3 A, VDS = 160 V, see fig. 6 and 13b - VDD = 100 V, ID = 3.3 A, RG = 24 Ω, RD = 30 Ω, see fig. 10b - G S Document Number: 91193 S-81377-Rev. A, 30-Jun-08 IRFL210, SiHFL210 Vishay Siliconix SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT - 150 0.60 0.96 A 7.7 2.0 310 1.4 V ns µC G S TJ = 25 °C, IS = 0.96 A, VGS = 0 Vb TJ = 25 °C, IF = 3.3 A, dI/dt = 100 A/µsb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 101 Top VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V ID, Drain Current (A) ID, Drain Current (A) 100 150 °C 25 °C 100 10-1 10-1 4.5 V 20 µs Pulse Width TC = 25 °C 10-2 20 µs Pulse Width VDS = 50 V 4 5 6 7 8 9 10 10-1 91193_01 100 101 91193_03 VDS, Drain-to-Source Voltage (V) VGS, Gate-to-Source Voltage (V) Fig. 3 - Typical Transfer Characteristics Fig. 1 - Typical Output Characteristics, TC = 25 °C ID, Drain Current (A) 100 VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V Bottom 4.5 V Top RDS(on), Drain-to-Source On Resistance (Normalized) 3.5 ID = 3.3 A 3.0 VGS = 10 V 2.5 2.0 1.5 1.0 0.5 0.0 - 60 - 40 - 20 4.5 V 10-1 20 µs Pulse Width TC = 150 °C 10-1 100 101 0 20 40 60 80 100 120 140 160 91193_02 VDS, Drain-to-Source Voltage (V) 91193_04 TJ, Junction Temperature (°C) Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91193 S-81377-Rev. A, 30-Jun-08 www.vishay.com 3 IRFL210, SiHFL210 Vishay Siliconix 300 250 200 Ciss 150 Coss 100 50 0 100 101 Crss ISD, Reverse Drain Current (A) Capacitance (pF) VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd 101 100 150 °C 25 °C 10-1 0.4 91193_07 VGS = 0 V 0.8 1.2 1.6 2.0 91193_05 VDS, Drain-to-Source Voltage (V) VSD, Source-to-Drain Voltage (V) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage 20 VGS, Gate-to-Source Voltage (V) ID = 3.3 A VDS = 160 V VDS = 100 V 102 5 Operation in this area limited by RDS(on) ID, Drain Current (A) 16 VDS = 40 V 2 10 5 12 2 100 µs 1 ms TC = 25 °C TJ = 150 °C Single Pulse 1 2 5 8 1 5 4 For test circuit see figure 13 2 10 ms 2 5 2 5 0 0 91193_06 0.1 2 4 6 8 10 91193_08 10 102 103 QG, Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) Fig. 8 - Maximum Safe Operating Area Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 Document Number: 91193 S-81377-Rev. A, 30-Jun-08 IRFL210, SiHFL210 Vishay Siliconix VDS VGS 1.0 RG RD D.U.T. + - VDD ID, Drain Current (A) 0.8 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 0.6 Fig. 10a - Switching Time Test Circuit 0.4 VDS 0.2 90 % 0.0 25 91193_09 50 75 100 125 150 10 % VGS td(on) tr td(off) tf TC, Case Temperature (°C) Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms 102 Thermal Response (ZthJC) 0 - 0.5 10 0.2 0.1 0.05 0.02 0.01 Single Pulse (Thermal Response) PDM t1 t2 Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC 10-4 10-3 10-2 0.1 1 10 102 103 1 0.1 10-2 10-5 91193_11 t1, Rectangular Pulse Duration (S) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91193 S-81377-Rev. A, 30-Jun-08 www.vishay.com 5 IRFL210, SiHFL210 Vishay Siliconix L Vary tp to obtain required IAS RG VDS tp VDD D.U.T I AS 10 V tp 0.01 Ω IAS Fig. 12b - Unclamped Inductive Waveforms VDS + - V DD VDS Fig. 12a - Unclamped Inductive Test Circuit 120 EAS, Single Pulse Energy (mJ) 100 80 60 40 20 0 VDD = 50 V 25 50 75 100 ID 0.43 A 0.61 A Bottom 0.90 A Top 125 150 91193_12C Starting TJ, Junction Temperature (°C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ 12 V 0.2 µF 0.3 µF VGS QGS QG QGD D.U.T. + - VDS VG VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 91193 S-81377-Rev. A, 30-Jun-08 IRFL210, SiHFL210 Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + + - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91193. Document Number: 91193 S-81377-Rev. A, 30-Jun-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1