SIHFZ48RL

IRFZ48RS, IRFZ48RL, SiHFZ48RS, SiHFZ48RL Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 110 29 36 Single D FEATURES 60 0.018 • Advanced Process Technology • Dynamic dV/dt • 175 °C Operating Temperature • Fast Switching • Fully Avalanche Rated • Drop in Replacement of the IRFZ48/SiHFZ48 for Linear/Audio Applications • Lead (Pb)-free Available Available RoHS* COMPLIANT I2PAK (TO-262) D2PAK (TO-263) DESCRIPTION Advanced Power MOSFETs from Vishay utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2PAK is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2PAK is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2 W in a typical surface mount application. G G D S S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free SnPb D2PAK (TO-263) IRFZ48RSPbF SiHFZ48RS-E3 IRFZ48RS SiHFZ48RS I2PAK (TO-262) IRFZ48RLPbF SiHFZ48RL-E3 - ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Currente Pulsed Drain Currenta, e VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID IDM Energyb, e TC = 25 °C LIMIT 60 ± 20 50 50 290 1.3 EAS PD dV/dt TJ, Tstg for 10 s 100 190 4.5 - 55 to + 175 300d W/°C mJ W V/ns °C A UNIT V Linear Derating Factor Single Pulse Avalanche Maximum Power Dissipation Peak Diode Recovery dV/dtc, e Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature)d * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91296 S-Pending-Rev. A, 22-Jul-08 WORK-IN-PROGRESS www.vishay.com 1 IRFZ48RS, IRFZ48RL, SiHFZ48RS, SiHFZ48RL Vishay Siliconix ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Mounting Torque 6-32 or M3 screw SYMBOL LIMIT 10 1.1 UNIT lbf · in N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 25 V, Starting TJ = 25 °C, L = 22 µH, RG = 25 Ω, IAS = 72 A (see fig. 12). c. ISD ≤ 72 A, dI/dt ≤ 200 A/µs, VDD ≤ VDS, TJ ≤ 175 °C. d. 1.6 mm from case. e. Current limited by the package, (Die Current = 72 A). THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) SYMBOL RthJA RthCS RthJC TYP. 0.50 MAX. 62 0.8 °C/W UNIT SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf LD LS Between lead, 6 mm (0.25") from package and center of die contact D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS ΔVDS/TJ VGS(th) IGSS IDSS RDS(on) gfs VGS = 0 V, ID = 250 µA Reference to 25 °C, ID = 1 mAc VDS = VGS, ID = 250 µA VGS = ± 20 V VDS = 60 V, VGS = 0 V VDS = 48 V, VGS = 0 V, TJ = 150 °C VGS = 10 V ID = 4 3 A b Ab VDS = 25 V, ID = 43 60 2.0 27 0.60 - 4.0 ± 100 25 250 0.018 - V V/°C V nA µA Ω S VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5c - 2400 1300 190 8.1 250 210 250 4.5 7.5 110 29 36 nH ns nC pF VGS = 10 V ID = 72 A, VDS = 48 V, see fig. 6 and 13b, c - VDD = 30 V, ID = 72 A, RG = 9.1 Ω, RD = 0.34 Ω, see fig. 10b, c - G S www.vishay.com 2 Document Number: 91296 S-Pending-Rev. A, 22-Jul-08 IRFZ48RS, IRFZ48RL, SiHFZ48RS, SiHFZ48RL Vishay Siliconix SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT - 120 0.50 50c A 290 2.0 180 0.80 V ns µC G S TJ = 25 °C, IS = 72 A, VGS = 0 Vb TJ = 25 °C, IF = 72 A, dI/dt = 100 A/µsb, c Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. c. Current limited by the package, (Die Current = 72 A). TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted Fig. 1 - Typical Output Characteristics Fig. 2 - Typical Output Characteristics Document Number: 91296 S-Pending-Rev. A, 22-Jul-08 www.vishay.com 3 IRFZ48RS, IRFZ48RL, SiHFZ48RS, SiHFZ48RL Vishay Siliconix Fig. 3 - Typical Transfer Characteristics Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage RDS(on) , Drain-to-Source On Resistance (Normalized) 2.5 ID = 72A 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 0 VGS = 10V 20 40 60 80 100 120 140 160 180 TJ , Junction Temperature ( ° C) Fig. 4 - Normalized On-Resistance vs. Temperature Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 Document Number: 91296 S-Pending-Rev. A, 22-Jul-08 IRFZ48RS, IRFZ48RL, SiHFZ48RS, SiHFZ48RL Vishay Siliconix 80 LIMITED BY PACKAGE ID , Drain Current (A) 60 40 20 0 25 50 75 100 125 150 175 TC , Case Temperature ( ° C) Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 9 - Maximum Drain Current vs. Case Temperature 1000 VDS RD OPERATION IN THIS AREA LIMITED BY RDS(on) 10us RG VGS D.U.T. + - VDD ID , Drain Current (A) 100 100us 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 1ms Fig. 10a - Switching Time Test Circuit 10 10ms VDS 90 % 1 0.1 TC = 25 °C TJ = 175 °C Single Pulse 1 10 100 1000 Fig. 8 - Maximum Safe Operating Area VDS , Drain-to-Source Voltage (V) 10 % VGS td(on) tr td(off) tf Fig. 10b - Switching Time Waveforms Document Number: 91296 S-Pending-Rev. A, 22-Jul-08 www.vishay.com 5 IRFZ48RS, IRFZ48RL, SiHFZ48RS, SiHFZ48RL Vishay Siliconix 1 Thermal Response (Z thJC ) D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.01 0.1 1 10 PDM t1 t2 0.01 0.00001 0.0001 0.001 t1 , Rectangular Pulse Duration (sec) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case 15 V VDS tp VDS L Driver RG 20 V tp D.U.T. IAS 0.01 Ω + A - VDD IAS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms EAS , Single Pulse Avalanche Energy (mJ) 250 200 ID 29A 51A BOTTOM 72A TOP 150 100 50 0 25 50 75 100 125 150 175 Starting T J, Junction Temperature ( ° C) Fig. 12c - Maximum Avalanche Energy vs. Drain Current www.vishay.com 6 Document Number: 91296 S-Pending-Rev. A, 22-Jul-08 IRFZ48RS, IRFZ48RL, SiHFZ48RS, SiHFZ48RL Vishay Siliconix Current regulator Same type as D.U.T. 50 kΩ 12 V 0.2 µF 0.3 µF 10 V QGS QG QGD D.U.T. + - VDS VG VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Maximum Avalanche Energy vs. Drain Current Fig. 13b - Gate Charge Test Circuit Peak Diode Recovery dV/dt Test Circuit D.U.T. + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + + - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91296. Document Number: 91296 S-Pending-Rev. A, 22-Jul-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1