SIP824TEU

SiP823/SiP824/SiP825 Vishay Siliconix 5-Pin mP Reset Circuits with Watchdog Timer and Manual Reset FEATURES D D D D D D D D Precision Power Supply Monitoring with "1.5% Accuracy Low Quiescent Current: 3 mA max. Low Threshold Voltage Temperature Coefficient: 100 ppm max. Guaranteed RESET Valid Dow to VCC = 1 V Seven Reset Threshold Options Small SOT23-5 Packages No External Components Power Supply Transient Immunity APPLICATIONS D Portable Intelligent Electronics D Computers and Controllers D Automotive Electronics D Critical mP/mC Power Supply Monitoring DESCRIPTION The SiP823/SiP824/SiP825 series are mProcessor supervisory circuits in a 5-pin SOT23 package, that combine the functions of power supply and mProcessor monitoring. If the power supply voltage drops, or has been, below a safe level or the mProcessor shows signs of problematic inactivity, the circuit will generate a reset signal at it’s output. The SiP823 and SiP825 have an input to accommodate manual reset. Seven pre-programmed reset threshold voltage levels are available as standard options. Specially configured options are available upon request, allowing for further customization of reset voltage, reset time-out, and watchdog time-out periods. The SiP823 has a reset output that is “active low” and the SiP824 and SiP825 have complementary outputs for both “active high” and “active low” resets. Both output drives are push/pull configurations. Space saving SOT23-5 packages and low quiescent current make this family of products ideally suited for portable battery operated equipment. These circuits fully ignore fast negative VCC transients and have valid reset output signals with power supply levels down to 1 V. PACKAGING AND PIN DEFINITION SOT-23 RESET GND MR 1 2 3 5 VCC RESET GND 4 WDI RESET 1 2 3 SOT-23 5 VCC RESET GND 4 WDI RESET 1 2 3 SOT-23 5 VCC SiP823 SiP824 SiP825 4 MR Top View Top View See page 2 for ordering and marking information. Top View TYPICAL APPLICATION CIRCUIT VCC VCC RESET VCC RESET mProcessor I/O GND SiP823 MANUAL RESET MR GND WDI Document Number: 72397 S-41150—Rev. B, 14-Jun-04 www.vishay.com 1 SiP823/SiP824/SiP825 Vishay Siliconix ORDERING INFORMATION SiP823 SiP824 SiP825 Watchdog time-out Period Default: 1.76 Sec Reset time-out Period Default: 210 mS Threshold Voltage Options L: 4.63 V M: 4.38 V T: 3.08 V S: 2.93 V R: 2.63 V Z: 2.32 V Y: 2.19 V Please contact your local Vishay Semiconductor Sales Office for information on customization of reset voltage, reset time-out, and watchdog time-out options. x EU x x DT-TR1 MARKING INFORMATION SiP823 SiP823LEU SiP823MEU SiP823TEU SiP823SEU SiP823REU SiP823ZEU SiP823YEU AAxxx ABxxx ACxxx ADxxx AExxx AGxxx AHxxx SiP824LEU SiP824MEU SiP824TEU SiP824SEU SiP824REU SiP824ZEU SiP824YEU SiP824 AIxxx AKxxx ALxxx AMxxx ANxxx AOxxx APxxx SiP825LEU SiP825MEU SiP825TEU SiP825SEU SiP825REU SiP825ZEU SiP825YEU SiP825 ARxxx ASxxx ATxxx AVxxx AWxxx AXxxx AYxxx Last two characters denote date code. ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED) Parameter Supply Voltage All Other Pins Input/Output Current, All Pins Operating Temperature Range Storage Temperature Range Junction Temperature Range Power Dissipation (TA v 70_C) SOT-23 (Derate 4 mW/_C above 70_C) Symbol VCC VMAX IIN(max) TA Tstg TJ PD Limit −0.3 to 6.0 −0.3 to (VCC + 0.3) 20 −40 to 85 −65 to 150 −40 to 125 310 Unit V mA _C mW Notes a. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. www.vishay.com 2 Document Number: 72397 S-41150—Rev. B, 14-Jun-04 SiP823/SiP824/SiP825 Vishay Siliconix SPECIFICATIONS Test Conditions Unless Specified Parameter Supply Voltage Supply Current (No Load) RESET Threshold Threshold Hysteresis RESET Threshold Temperature Coefficient VOL VOH VOL VOH VCC to RESET Delay RESET Time-out Period TD1 TD2 Sip82_L/M/J: VCC t VTH, ISINK = 1.2 mA Sip82_R/S/T/Y/Z: VCC t VTH, ISINK = 0.5 mA VCC u VTH, ISOURCE = 0.5 mA Sip82_L/M/J: VCC u VTH, ISINK = 1.2 mA Sip82_R/S/T/Y/Z: VCC u VTH, ISINK = 0.5 mA VCC t VTH, ISOURCE = 0.5 mA VCC = VTH − 100 mV 140 0.8 VCC 40 210 280 mS mS 0.8 VCC 0.5 0.4 Limits Mina Typb Maxa Unit Symbol VCC ICC VTH VTH(hys) TA = −40_C to 85_C, Typical Values @ TA = 25_C 1 VCC = VTH + 10% TA = 25_C TA = 25_C VTH −1.5% 0.4 40 5.5 10.0 3.0 VTH 1.5% V mA V %VTH PPM/_C 0.5 0.4 V RESET Output Voltage p g RESET Output Voltage p g Watchdog Input (SiP823/SiP824) Watchdog Time-out Period WD1 Pulse Width WDI Input Voltagec WDI Input Current tWD tWDI VIL VIH IIL IIH VIL = 0.4 V, VIH = 0.8 VCC VCC = VTH + 20% WDI = 0 V WDI = VCC = 5 V 1.12 50 0.7 0.8 VCC −15 −8 8 15 1.76 2.40 S nS V mA Manual Reset Input (SiP823/SiP825) MR Pulse Width MR Input Voltage MR Noise Immunity (Pulse Width with No RESET) MR to RESET Delay MR Pull-Up Resistance tMR 80 tMR VIL VIH VCC = VTH + 20% 1.0 0.7 0.8 VCC 100 500 120 kW mS V nS Notes a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. b. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. c. WDI is internally serviced within the watchdog period if WDI is left unconnected. Document Number: 72397 S-41150—Rev. B, 14-Jun-04 www.vishay.com 3 SiP823/SiP824/SiP825 Vishay Siliconix PIN DESCRIPTION SiP823 1 2 N/A 3 SiP824 1 2 3 N/A SiP825 1 2 3 4 Name RESET GND RESET MR Ground Description RESET is active low. This pin has a push/pull output. RESET is active high. This pin has a push/pull output. Manual RESET. Active low. Pulling this pin low forces a RESET. After a low to high transition RESET remains asserted for exactly one RESET timed period. This pin is internally pulled high. If this function is unused it can be left open or tied to VCC. Watchdog Input. Any transition on this pin will RESET the watchdog timer. If this pin remains high or low for longer than the watchdog interval, a RESET is asserted. Float or tristate this pin to disable the watchdog feature. Positive power supply. A RESET is asserted after this voltage drops below a predetermined level. After VCC rises above that level, RESET remains asserted until the end of the RESET time-out period. 4 5 4 5 N/A 5 WDI VCC TIMING DIAGRAMS VTH VTH VCC tD2 RESET 50% tD1 50% tD2 RESET 50% tD1 50% Figure 1. RESET Timing Diagram VTH VDD tD2 tD2 RESETB tWD WDI Figure 2. Watchdog Timing Diagram www.vishay.com Document Number: 72397 S-41150—Rev. B, 14-Jun-04 4 SiP823/SiP824/SiP825 Vishay Siliconix DETAILED DESCRIPTION An active signal on a microprocessor (mP) RESET input starts the mP in a know state. The SiP823/SiP824/SiP825 mP supervisory circuits assert a RESET signal to prevent code execution errors during power-up, power-down and brown-out conditions. The SiP823/SiP824/SiP825 also monitors the mP’s health by checking for problematic inactivity at its WDI i input. RESET Output A RESET will be asserted for the specified RESET time-out period (tD2), if any of three conditions are present: 1) VCC drops below the threshold voltage (VTH) 2) The MR pin is pulled low 3) The watchdog timer does not detect a transition within the watchdog interval (tWD) and the watchdog input is not left floating. The RESET output will remain asserted for the specified time-out period (tD2) after: 1) VCC rises above the RESET threshold (VTH) 2) MR goes high. Manual RESET Input mP based products often require a manual RESET capability, which can be activated by manual intervention or external logic circuitry. A logic low at the MR pin of the SiP823/SiP824/SiP825 asserts a RESET signal. RESET remains asserted while MR is low and for a period (tD2) after it returns high. MR has an internal 100-kW pull-up resistor, so it can be left floating when not activated. This input can be driven with CMOS logic levels or with open drain devices. The input is internally de-bounced to reject fast input transients. Watchdog Input (SiP823/SiP824) The SiP823/SiP824 have a watchdog input (WDI), that monitors the mP’s activity. If the mP does not toggle the watchdog input within the watchdog time-out period (tWD), RESET is asserted. The internal RESET timer is cleared by either a RESET pulse or by toggling WDI. WDI detects pulses as short as 50 nS. While RESET is asserted, the timer remains cleared. As soon as RESET is released the timer starts counting (Figure 2). The watchdog timer can be disabled by leaving WDI open or by three stating the connected driver. As soon as the WDI input is driven either high or low, the watchdog function resumes with the watchdog timer set to zero. WDI Input Current The watchdog input pin (WDI) typically sources or sinks 8 mA when driven high or low. As a result, the power dissipation at the WDI input is independent of duty cycle. When the WDI pin is left floating or tri-stated, the power supply current is less than 3 mA. Transient Rejection The SiP823/SiP824/SiP825 family has good immunity for negative going transients on the VCC line. The smaller the duration of the transient, the larger the amplitude can be without triggering RESET. The “Transient Rejection” graph below shows the relation between transient amplitude and allowable transient duration, without triggering RESET. The value on the horizontal scale represents the portion of the amplitude of the transient that is exceeding the VTH level. RESET Output State at Low VDD With VCC voltage on the level of MOS transistor thresholds (t1.0 V), the RESET output of the SiP823/SiP824/SiP825 may become undefined. For outputs that are active low (RESET), a resistor placed between RESET and GND on the order of 100 kW will ensure that the RESET output stays low when the VCC drops below the MOS transistor threshold. In a like manner, a resistor placed between RESET and VCC will ensure the correct state for active high RESET outputs. Document Number: 72397 S-41150—Rev. B, 14-Jun-04 www.vishay.com 5 SiP823/SiP824/SiP825 Vishay Siliconix TYPICAL CHARACTERISTICS (TA = 25_C Unless Otherwise Noted) Transient Rejection 140 120 220 215 RESET Time (tD2) vs. Temperature Transient Duration (mS) 100 80 60 40 20 0 RESET Time (mS) 210 205 200 195 190 VTH = 2.63 V 0.01 0.1 1 −35 −5 25 55 85 115 Transient Amplitude (_C) Temperature (_C) ICC vs. Temperature RESET VTH vs. Temperature 2.35 Supply Current @ 5 V (mA) 2.650 2.646 RESET VTH (V) 2.30 2.25 VTH = 2.63 V 2.642 VTH = 2.63 V 2.20 2.15 2.10 −35 −5 25 55 85 115 2.638 2.634 2.630 −35 −5 25 55 85 115 Temperature (_C) Temperature (_C) RESET VOL vs. Temperature 0.265 0.260 RESET VOL @ 0.8 mA (V) 0.255 0.250 0.245 0.240 0.235 0.230 0.225 0.220 −35 −5 25 55 85 115 Temperature (_C) www.vishay.com Document Number: 72397 S-41150—Rev. B, 14-Jun-04 6