T163VU

T163VU Vishay Semiconductors Infrared Emitting Diode Chip, 950 nm, GaAs FEATURES • Package type: chip • Package form: single chip • Dimensions (L x W x H in mm): 0.37 x 0.37 x 0.265 • Peak wavelength: λp = 950 nm • High reliability • Low forward voltage • Suitable for high pulse current operation • Good spectral matching with Si photodetectors 21642 • Compliant to RoHS directive 2002/95/EC accordance to WEEE 2002/96/EC and in DESCRIPTION T163VU is an infrared, 950 nm emitting diode chip in GaAs technology. Anode is the bond pad on top. APPLICATIONS • Emitter in photo interrupters GENERAL INFORMATION The datasheet is based on Vishay optoelectronics sample testing under certain predetermined and assumed conditions, and is provided for illustration purpose only. Customers are encouraged to perform testing in actual proposed packaged and used conditions. Vishay optoelectronics die products are tested using Vishay optoelectronics based quality assurance procedures and are manufactured using Vishay optoelectronics established processes. Estimates such as those described and set forth in this datasheet for semiconductor die will vary depending on a number of packaging, handling, use, and other factors. Therefore sold die may not perform on an equivalent basis to standard package products. PRODUCT SUMMARY COMPONENT T163VU Ie (mW/sr) 1.2 ϕ (deg) λP (nm) 950 tr (ns) 800 Note Test conditions see table “Basic Characteristics” ORDERING INFORMATION ORDERING CODE T163VU-SF-F Note MOQ: minimum order quantity PACKAGING Wafer sawn on foil without any frame REMARKS MOQ: 25 000 pcs PACKAGE FORM Chip ABSOLUTE MAXIMUM RATINGS PARAMETER Forward current Reverse voltage Surge forward current Junction temperature Operating temperature range Storage temperature range Storage temperature range on foil Note Tamb = 25 °C, unless otherwise specified Document Number: 81133 Rev. 1.2, 29-Mar-10 For technical questions, contact: optochipsupport@vishay.com www.vishay.com 1 tp = 100 µs TEST CONDITION SYMBOL IF VR IFSM Tj Tamb Tstg1 Tstg2 VALUE 100 5 1.5 125 - 40 to + 100 - 40 to + 100 - 40 to + 50 UNIT mA V A °C °C °C °C T163VU Vishay Semiconductors Infrared Emitting Diode Chip, 950 nm, GaAs BASIC CHARACTERISTICS PARAMETER Forward voltage Temperature coefficient of VF Junction capacitance Radiant intensity Radiant power (epoxy encapsulated) Temperature coefficient of φe Peak wavelength Spectral bandwidth Temperature coefficient of λp Rise time, fall time Note Tamb = 25 °C, unless otherwise specified TEST CONDITION IF = 100 mA, tp = 20 ms IF = 1 A, tp = 100 µs IF = 100 mA VR = 0 V, f = 1 MHz, E = 0 IF = 100 mA, TO-18 gold header assembly IF = 100 mA IF = 100 mA IF = 100 mA IF = 100 mA IF = 100 mA IF = 20 mA IF = 1 A SYMBOL VF VF TKVF Cj Ie φe TKφe λp λ0.5 TKλp tr, tf tr, tf MIN. TYP. 1.3 1.8 - 1.3 30 1.2 22 - 0.8 950 50 0.2 800 400 MAX. UNIT V V mV/K pF mW/sr mW %/K nm nm nm/K ns ns BASIC CHARACTERISTICS Tamb = 25 °C, unless otherwise specified 10 4 10 3 10 2 10 1 10 0 10 -1 94 7996 1 .6 I F - Forward Current (mA) 1.2 Ie rel; Φe rel IF = 20 mA 0.8 0.4 0 1 2 3 4 0 - 10 0 10 94 7993 50 100 140 V F - Forward Voltage (V) T amb - Ambient Temperature (°C) Fig. 1 - Forward Current vs. Forward Voltage 1.2 VF rel - Relative Forward Voltage (V) Fig. 3 - Relative Radiant Intensity/Power vs. Ambient Temperature 1.25 Φe rel - Relative Radiant Power 1.0 1.1 IF = 10 mA 1.0 0.9 0.75 0.5 0.8 0.7 0 20 40 60 80 100 0.25 IF = 100 mA 0 900 950 λ - Wavelength (nm) 1000 94 7990 Tamb - Ambient Temperature (°C) 94 7994 Fig. 2 - Relative Forward Voltage vs. Ambient Temperature www.vishay.com 2 Fig. 4 - Relative Radiant Power vs. Wavelength Document Number: 81133 Rev. 1.2, 29-Mar-10 For technical questions, contact: optochipsupport@vishay.com T163VU Infrared Emitting Diode Chip, 950 nm, GaAs Vishay Semiconductors MECHANICAL DIMENSIONS PARAMETER Length of chip edge (x-direction) Length of chip edge (y-direction) Emission area Die height Diameter of bondpad SYMBOL Lx Ly AE H d (1) MIN. TYP. 0.37 0.37 0.34 x 0.34 0.265 0.14 MAX. UNIT mm mm mm2 mm mm ADDITIONAL INFORMATION Frontside metallization, anode Backside metallization, cathode Dicing Die bonding technology Aluminum Gold alloy Sawing Epoxy bonding Note (1) All chips are checked in accordance with the Vishay Semiconductor, specification of visual inspection FVOV6870. The visual inspection shall be made in accordance with the “specification of visual inspection as referenced”. The visual inspection of chip backside is performed with stereo microscope with incident light and 40x to 80x magnification. The quality inspection (final visual inspection) is performed by production. An additional visual inspection step as special release procedure by QM is not installed. HANDLING AND STORAGE CONDITIONS • The hermetically sealed shipment lots shall be opened in temperature and moisture controlled cleanroom environment only. It is mandatory to follow the rules for disposition of material that can be hazardous for humans and environment. • Product must be handled only at ESD safe workstations. Standard ESD precautions and safe work environments are as defined in MIL-HDBK-263. • Singulated die are not to be handled with tweezers. A vacuum wand with non metallic ESD protected tip should be used. PACKING Chips are fixed on adhesive foil. Upon request the foils can be mounted on plastic frame or disco frame. For shipment, the wafers are arranged to stacks and hermetically sealed in plastic bags to ensure protection against environmental influence (humidity and contamination). Use for recycling reliable operators only. We can help getting in touch with your nearest sales office. By agreement we will take back packing material, if it is sorted. You will have to bear the costs of transport. We will invoice you for any costs incurred for packing material that is returned unsorted or which we are not obliged to accept. Document Number: 81133 Rev. 1.2, 29-Mar-10 For technical questions, contact: optochipsupport@vishay.com www.vishay.com 3 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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