VBUS053AZ-HAF

VBUS053AZ-HAF Vishay Semiconductors USB-OTG BUS-Port ESD-Protection for VBUS = 12 V FEATURES • Ultra compact LLP75-7L package 6 5 4 • Low package height < 0.6 mm • 3-line USB ESD-protection with max. working range = 5.5 V 7 • VBUS - protection with 12 V working range 21102 1 2 3 • Low leakage current • Low load capacitance CD = 0.7 pF 20517 1 • ESD-protection to IEC 61000-4-2 ± 15 kV contact discharge ± 15 kV air discharge • Surge current acc. IEC 61000-4-5 IPP > 3 A • e4 - precious metal (e.g. Ag, Au, NiPd, NiPdAu) (no Sn) • Compliant to RoHS Directive 2002/95/EC and in accordance to WEEE 2002/96/EC MARKING (example only) XX YY 21001 Dot = Pin 1 marking XX = Date code YY = Type code (see table below) ORDERING INFORMATION DEVICE NAME VBUS053AZ-HAF ORDERING CODE VBUS053AZ-HAF-GS08 TAPED UNITS PER REEL (8 mm TAPE ON 7" REEL) 15 000 MINIMUM ORDER QUANTITY 15 000 PACKAGE DATA DEVICE NAME VBUS053AZ-HAF PACKAGE NAME LLP75-7L TYPE CODE U9 WEIGHT 4.2 mg MOLDING COMPOUND FLAMMABILITY RATING UL 94 V-0 MOISTURE SENSITIVITY LEVEL MSL level 1 (according J-STD-020) SOLDERING CONDITIONS 260 °C/10 s at terminals ABSOLUTE MAXIMUM RATINGS PARAMETER Peak pulse current Peak pulse power ESD immunity VBUS: Pin 6 to ground (pin 7) Peak pulse current Peak pulse power ESD immunity Operating temperature Storage temperature acc. IEC 61000-4-5; tp = 8/20 µs/single shot acc. IEC 61000-4-5; tp = 8/20 µs/single shot Contact discharge acc. IEC 61000-4-2; 10 pulses Air discharge acc. IEC 61000-4-2; 10 pulses Junction temperature IPPM PPP VESD VESD TJ TSTG 8 240 ± 30 ± 30 - 40 to + 125 - 55 to + 150 A W kV kV °C °C TEST CONDITIONS acc. IEC 61000-4-5; tp = 8/20 µs; single shot acc. IEC 61000-4-5; tp = 8/20 µs; single shot Contact discharge acc. IEC 61000-4-2; 10 pulses Air discharge acc. IEC 61000-4-2; 10 pulses SYMBOL IPPM PPP VESD VESD VALUE 3 36 ± 15 ± 15 UNIT A W kV kV Data line D+, D-, ID: Pin 1, 2 and 3 to ground (pin 7) ** Please see document “Vishay Material Category Policy”: www.vishay.com/doc?99902 Document Number: 81845 Rev. 1.4, 16-Dec-10 For technical questions, contact: ESDprotection@vishay.com www.vishay.com 1 VBUS053AZ-HAF Vishay Semiconductors USB-OTG BUS-Port ESD-Protection for VBUS = 12 V ELECTRICAL CHARACTERISTICS All inputs (pin 1, 2, and 3) to ground (pin 7) PARAMETER Protection paths Reverse working voltage Reverse current Forward voltage Reverse breakdown voltage Reverse clamping voltage Forward clamping voltage Line capacitance Line symmetry Line to line capacitance TEST CONDITIONS/REMARKS Number of lines which can be protected at IR = 0.1 µA at VR = VRWM = 3.3 V; T = 65 °C at VR = VRWM = 5.5 V at IF = 15 mA at IR = 1 mA at IPP = 1 A; acc. IEC 61000-4-5; T = 25 °C at IPP = 3 A; acc. IEC 61000-4-5; T = 25 °C at IF = 3 A; acc. IEC 61000-4-5 Test pin at VR = 0 V; any other I/O pin at VR = 3.3 V, f = 1 MHz Difference of the line capacitance Among pins 1, 2 and 3 at VR = 0 V; f = 1 MHz SYMBOL Nchannel VRWM IR IR VF VBR VC VC VF CD dCD CDD MIN. 5.5 0.7 6.5 TYP. 10 15 3.4 0.7 0.35 MAX. 3 0.085 1 1.2 10 12 18 4.1 1 0.1 0.5 UNIT lines V µA µA V V V V V pF pF pF Note • Tamb = - 40 °C to 85 °C, unless otherwise specified ELECTRICAL CHARACTERISTICS VBUS (pin 6) to ground (pin 7) PARAMETER Protection paths Reverse working voltage Reverse current Forward voltage Reverse breakdown voltage Reverse clamping voltage Forward clamping voltage Line capacitance TEST CONDITIONS/REMARKS Number of line which can be protected at IR = 100 nA at VR = VRWM = 12 V at IF = 10 mA at IR = 1 mA at IPP = 1 A; acc. IEC 61000-4-5; T = 25 °C at IPP = 8 A; acc. IEC 61000-4-5; T = 25 °C at IF = 8 A; acc. IEC 61000-4-5 at VR = 0 V, f = 1 MHz SYMBOL Nchannel VRWM IR VF VBR VC VC VF CD MIN. 12 0.6 15 TYP. 0.75 17.5 25 70 MAX. 1 100 0.9 18 20 30 2.2 85 UNIT line V nA V V V V V pF Note • Tamb = - 40 °C to 85 °C, unless otherwise specified www.vishay.com 2 For technical questions, contact: ESDprotection@vishay.com Document Number: 81845 Rev. 1.4, 16-Dec-10 VBUS053AZ-HAF USB-OTG BUS-Port ESD-Protection Vishay Semiconductors for VBUS = 12 V APPLICATION NOTE The VBUS053AZ-HAF is intended as an ESD-protection and transient voltage suppressor for one USB-OTG port. The LLP75-7L package contains two separate dies which are mounted on a common ground plane (pin 7). The high-speed data lines D-, D+ and ID, are connected to any of the pins no. 1 to 3. As long as the signal voltage on the data lines is between the ground- and the 5 V working range, the low capacitance PN-diodes offer a very high isolation to ground and to the other data lines. But as soon as any transient signal like an ESD-signal, exceeds this working range of 5 V in either the positive or negative direction, one of the PN-diodes gets into the forward mode and clamps the transient either to ground or to the avalanche break through level. An extra avalanche diode (separate die) clamps the supply line voltage (VBUS at pin 6) above the 12 V working range to ground (pin 7). Due to the “two die construction” the VBUS line has a very high isolation to the data lines. In case of a destructive transient signal, i.e. coming from a charger, the data lines will not be influenced. VBUS 6 (pinning top view) 5 4 nc. nc. 6 7 GND 7 1 2 3 5 4 1 D- 2 D+ 3 ID 21103 Remark: The input pins no. 1, 2 and 3 are symmetrical. Each of the data signals D-, D+ and ID can be connected to pin 1, 2 or 3. TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified) 120 % Rise time = 0.7 ns to 1 ns 80 f = 1 MHz 70 60 80 % 60 % 53 % Pin 6 to pin 7 Discharge Current IESD 100 % CD (pF) 50 40 30 20 10 40 % 27 % 20 % 0% - 10 0 10 20 30 40 50 60 70 80 90 100 20557 0 21468 0 5 10 15 Time (ns) VR (V) Fig. 1 - ESD Discharge Current Wave Form acc. IEC 61000-4-2 (330 Ω/150 pF) Fig. 3 - Typical Capacitance CD vs. Reverse Voltage VR 0.8 100 % 80 % 60 % 20 µs to 50 % 40 % 20 % 0.1 0% 0 20548 8 µs to 100 % f = 1 MHz, one I/O pin at 3.3 V 0.7 0.6 CD (pF) 0.5 0.4 0.3 Pin 1, 2 or 3 to pin 7 0.2 IPPM 0 10 20 30 40 21469 0 0.5 1 1.5 2 2.5 3 3.5 Time (µs) VR (V) Fig. 2 - 8/20 µs Peak Pulse Current Wave Formacc. IEC 61000-4-5 Document Number: 81845 Rev. 1.4, 16-Dec-10 Fig. 4 - Typical Capacitance CD vs. Reverse Voltage VR www.vishay.com 3 For technical questions, contact: ESDprotection@vishay.com VBUS053AZ-HAF Vishay Semiconductors USB-OTG BUS-Port ESD-Protection for VBUS = 12 V 100 30 Measured acc. IEC 61000-4-5 (8/20 µs - wave form) 10 Pin 6 to pin 7 25 P in 6 to p in 7 20 IF (mA) VC (V) 1 Pin 1, 2 or 3 to pin 7 0.1 15 10 VC 0.01 5 P in 7 to p in 6 0 0.6 0.7 0.8 0.9 1 1.1 21473 0.001 0.5 21470 0 1 2 3 4 5 6 7 8 9 10 11 VF (V) IPP (A) Fig. 5 - Typical Forward Current IF vs. Forward Voltage VF Fig. 8 - Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPP 20 18 16 14 Pin 6 to pin 7 VR (V) 12 10 8 6 4 2 0 0.01 0.1 1 10 100 1000 10 000 Pin 1, 2 or 3 to pin 7 21471 IR (µA) Fig. 6 - Typical Reverse Voltage VR vs. Reverse Current IR 18 Measured acc. IEC 61000-4-5 (8/20 µs - wave form) 16 14 12 P in 1 , 2 o r 3 to p in 7 VC (V) 10 8 6 4 2 0 0 1 2 3 4 P in 7 to p in 1 , 2 o r 3 VF 21472 IPP (A) Fig. 7 - Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPP www.vishay.com 4 For technical questions, contact: ESDprotection@vishay.com Document Number: 81845 Rev. 1.4, 16-Dec-10 VBUS053AZ-HAF USB-OTG BUS-Port ESD-Protection Vishay Semiconductors for VBUS = 12 V PACKAGE DIMENSIONS in millimeters (inches): LLP75-7L 1.05 (0.041) 0.95 (0.037) Heat sink 0.2 (0.008) 0.3 (0.012) 0.2 (0.008) 0.3 (0.012) 0.3 (0.012) 0.45 (0.018) 0.55 (0.022) 1 (0.039) 0.5 (0.020) 0.6 (0.024) 0.25 (0.010) 0.15 (0.006) 0.6 (0.024) 1.65 (0.065) Pin 1 marking 1.55 (0.061) 1.65 (0.065) Foot print recommendation: 0.5 (0.020) 0.3 (0.012) 0.15 (0.006) 0.5 (0.020) 0.3 (0.012) 0.15 (0.006) 0.25 (0.010) 1 (0.039) 0.5 (0.020) 1 (0.039) 1.55 (0.061) 0.54 (0.021) 0.05 (0.002) 0 (0.000) 0.2 (0.008) Solder resist mask Document no.:S8-V-3906.02-014 (4) Created - Date: 04. April 2006 20500 Solder pad 0.5 (0.020) Document Number: 81845 Rev. 1.4, 16-Dec-10 For technical questions, contact: ESDprotection@vishay.com www.vishay.com 5 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. 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