VCUT05A4-05S

VCUT05A4-05S Vishay Semiconductors 4-Line Bidirectional Symmetrical (BiSy) ESD-Protection Diode in SOT-23-5L Features • • • • • • SOT-23-5L package 4-line ESD-protection Working range ± 5.5 V Low leakage current < 0.1 µA Low load capacitance CD = 16 pF ESD-protection acc. IEC 61000-4-2 ± 20 kV contact discharge ± 30 kV air discharge • Pin plating tin (e3) • Compliant to RoHS directive 2002/95/EC and in accordance to WEEE 2002/96/EC 5 4 1 21953 2 3 21952 Marking (example only) XX XX YYY YYY = Type code (see table below) XX = Date code 21954 Ordering Information Device name VCUT05A4-05S Ordering code VCUT05A4-05S-G-08 Taped units per reel (8 mm tape on 7" reel) 3000 Minimum order quantity 15 000 Package Data Device name VCUT05A4-05S Package name SOT-23-5L Type code 5A4 Weight 15.5 mg Molding compound flammability rating UL 94 V-0 Moisture sensitivity level MSL level 1 (according J-STD-020) Soldering conditions 260 °C/10 s at terminals Absolute Maximum Ratings Parameter Peak pulse current Peak pulse power ESD immunity Operating temperature Test conditions Acc. IEC 61000-4-5, 8/20 µs/single shot Pin 1 to pin 2, acc. IEC 61000-4-5, 8/20 µs/single shot Contact discharge acc. IEC61000-4-2; 10 pulses Air discharge acc. IEC61000-4-2; 10 pulses Junction temperature Symbol IPPM PPP VESD Tj Value 3.5 56 ± 20 ± 30 - 40 to + 85 Unit A W kV °C ** Please see document “Vishay Material Category Policy”: http://www.vishay.com/doc?99902 Document Number 85202 Rev. 1.1, 28-May-10 For technical support, please contact: ESDprotection@vishay.com www.vishay.com 1 VCUT05A4-05S Vishay Semiconductors Cut the spikes with VCUT05A4-05S: The VCUT05A4-05S is a Bidirectional and Symmetrical (BiSy) ESD-protection device which clamps positive and negative overvoltage transients to ground. Connected between the signal or data line and the ground the VCUT05A4-05S offers a high isolation (low leakage current, low capacitance) within the specified working range. Electrical Characteristics (Tamb = 25 °C, unless otherwise specified) VCUT05A4-05S Parameter Protection paths Reverse stand-off voltage Reverse current Reverse breakdown voltage Reverse clamping voltage at IPP = IPPM = 3.5 A Capacitance at V = 0 V; f = 1 MHz VC CD 16 16 20 V pF Test conditions/remarks Number of lines which can be protected at I = 0.1 µA at V = 5.5 V at I = 1 mA at IPP = 1 A Symbol Nlines VRWM IR VBR VC 7 7.5 12 5.5 0.1 Min. Typ. Max. 4 Unit lines V µA V V Typical Characteristics (Tamb = 25 °C, unless otherwise specified) 120 % Rise time = 0.7 ns to 1 ns 100 % 80 % 80 % 60 % 53 % 8 µs to 100 % Discharge Current IESD 100 % IPPM 60 % 20 µs to 50 % 40 % 20 % 0% 0 10 20 30 40 40 % 27 % 20 % 0% - 10 0 10 20 30 40 50 60 70 80 90 100 20557 Time (ns) 20548 Time (µs) Figure 1. ESD Discharge Current Wave Form acc. IEC 61000-4-2 (330 Ω/150 pF) Figure 2. 8/20 µs Peak Pulse Current Wave Form acc. IEC 61000-4-5 www.vishay.com 2 For technical support, please contact: ESDprotection@vishay.com Document Number 85202 Rev. 1.1, 28-May-10 VCUT05A4-05S Vishay Semiconductors 18 f = 1 MHz 16 14 120 100 80 acc. IEC 61000-4-2 + 8 kV contact discharge VC-ESD (V) 12 60 Pin 1, 3, 4, and 5 to Pin 2 40 20 0 - 20 - 40 - 10 0 CD (pF) 10 8 6 4 2 0 -8 -6 -4 -2 0 2 4 6 8 Pin 1, 3, 4, and 5 to Pin 2 10 20 30 40 50 60 70 80 90 22014 VR (V) Figure 3. Typical Capacitance CD vs. Reverse Voltage VR 22017 t (ns) Figure 6. Typical Clamping Performance at + 8 kV Contact Discharge (acc. IEC 61000-4-2) 10 8 6 4 Pin 1, 3, 4, and 5 to Pin 2 40 20 0 acc. IEC 61000-4-2 - 8 kV contact discharge VR (V) 2 0 -2 -4 -6 -8 - 10 0.01 VC-ESD (V) - 20 - 40 Pin 2 to Pin 1, 3, 4, and 5 - 60 - 80 Pin 2 to Pin 1, 3, 4, and 5 0.1 1 10 100 1000 10 000 - 100 - 10 0 22018 10 20 30 40 50 60 70 80 90 22015 IR (µA) t (ns) Figure 4. Typical Reverse Voltage VR vs. Reverse Current IR Figure 7. Typical Clamping Performance at - 8 kV Contact Discharge (acc. IEC 61000-4-2) 20 Pin 1, 3, 4, and 5 to Pin 2 15 Positive surge 10 250 200 150 100 Positive surge acc. IEC 61000-4-2 contact discharge VC-ESD (V) VC (V) 5 0 -5 Measured acc. IEC 61000-4-5 (8/20 µs - wave form) 50 0 - 50 - 100 VC VC-ESD Negative surge - 10 Pin 2 to Pin 1, 3, 4, and 5 - 15 0 22016 - 150 - 200 - 250 5 22019-1 Negative surge 1 2 3 4 0 5 10 15 20 25 30 IPP (A) VESD (kV) Figure 5. Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPP Figure 8. Typical Peak Clamping Voltage at ESD Contact Discharge (acc. IEC 61000-4-2) Document Number 85202 Rev. 1.1, 28-May-10 For technical support, please contact: ESDprotection@vishay.com www.vishay.com 3 VCUT05A4-05S Vishay Semiconductors Package Dimensions in millimeters (inches): SOT-23-5L 1.1 (0.043) max. 2.8 (0.110) 1.15 (0.045) 3.00 (0.118) 2.60 (0.102) 0.5 (0.020) 1.70 (0.067) 1.50 (0.059) 0.90 (0.035) 0.9 (0.035) 0.95 (0.037) 3.0 (0.118) 0.550 (0.022) ref. 0.19 (0.007) 0.11 (0.004) 0.2 (0.008) 0.45 (0.018) 0.40 (0.015) 0.45 (0.018) 0.40 (0.015) 0.5 (0.020) 0.3 (0.012) 0.45 (0.018) 0.40 (0.015) foot print recommendation: 0.97 (0.038) 0.93 (0.037) 0.97 (0.038) 0.93 (0.037) 0.95 (0.037) Document no.: S8-3929.01-001 (4) Rev. 1 - Date: 15.Jan.2010 21955 Orientation in Blistertape Unreeling direction 5 Pin 1 location 4 1 2 3 Top view S8-V-3929.01-003 (4) Date: 23. 11. 2009 22006 www.vishay.com 4 2.4 (0.094) For technical support, please contact: ESDprotection@vishay.com Document Number 85202 Rev. 1.1, 28-May-10 0° 8 ° Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1