EDI88257CXCB

White Electronic Designs 256Kx8 Monolithic SRAM FEATURES 256Kx8 CMOS Static Random Access Memory • Access Times of 70, 85, 100ns • Data Retention Function (LP Versions) • TTL Compatible Inputs and Outputs • Fully Static, No Clocks JEDEC Approved Pinout • 32 pin Ceramic DIP, 0.6 mils wide (Package 9) ■ Single +5V (±10%) Supply Operation EDI88257C The EDI88257C is a 2 Megabit 256Kx8 bit Monolithic CMOS Static RAM. The 32 pin DIP pinout adheres to the JEDEC standard for the two megabit device, and is a pin replacement for the 256Kx8 module, EDI88257C. The device is upgradeable to the 512Kx8 SRAM, the EDI88512C. Pin 1 becomes the higher order address. A Low Power version, EDI88257LP, offers a data retention function for battery back-up opperation. Military product is available compliant to Appendix A of MIL-PRF-38535. FIGURE 1 – PIN CONFIGURATION 32 DIP PIN DESCRIPTION 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC A15 A17 W# A13 A8 A9 A11 G# A10 E# I/O7 I/O6 I/O5 I/O4 I/O3 A0-17 TOP VIEW NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 A0-17 W# E# G# DQ0-7 VCC VSS NC Address Inputs Write Enable Chip Enable Output Enable Data Inputs/Outputs Power (+5V ±10%) Ground Not Connected BLOCK DIAGRAM Memory Array Address Buffer Address Decoder I/O Circuits DQ0-7 W# E# G# White Electronic Designs Corp. reserves the right to change products or specifications without notice. September 1999 Rev. 2 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Operating Temperature TA (Ambient) Industrial Military Storage Temperature, Plastic Power Dissipation Output Current Junction Temperature, TJ Value -0.5 to 7.0 -40 to +85 -55 to +125 -65 to +150 1 20 175 Unit V °C °C °C W mA °C G# X H L X E# H L L L W# X H H L Mode Standby Output Deselect Read Write EDI88257C TRUTH TABLE Output High Z High Z Data Out Data In Power ICC2, ICC3 ICC1 ICC1 ICC1 RECOMMENDED OPERATING CONDITIONS Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Symbol VCC VSS VIH VIL Min 4.5 0 2.2 -0.3 Typ 5.0 0 — — Max 5.5 0 VCC +0.5 +0.8 Unit V V V V NOTE: Stress greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. CAPACITANCE Parameter Address Lines Data Lines Symbol CI CO Condition VIN = Vcc or Vss, f = 1.0MHz VOUT = Vcc or Vss, f = 1.0MHz Max 30 14 Unit pF pF These parameters are sampled, not 100% tested. DC CHARACTERISTICS VCC = 5V, TA = +25°C Parameter Input Leakage Current Output Leakage Current Operating Power Supply Current Standby (TTL) Power Supply Current Full Standby Power Supply Current Output Low Voltage Output High Voltage Symbol ILI ILO ICC1 ICC2 ICC3 VOL VOH Conditions VIN = 0V to VCC VI/O = 0V to VCC W#, E# = VIL, II/O = 0mA, Min Cycle (70-100ns) E# ≥ VIH, VIN ≤ VIL, VIN ≥ VIH C E# ≥ VCC -0.2V VIN ≥ Vcc -0.2V or VIN ≤ 0.2V LP IOL = 2.1mA IOH = -1.0mA Min — — — — — — — 2.4 Typ — — 45 3 — — — — Max ±10 ±10 75 10 5 1 0.4 — Units µA µA mA mA mA mA V V AC TEST CONDITIONS Figure 1 Vcc Figure 2 Input Pulse Levels Vcc VSS to 3.0V 5ns 1.5V Figure 1 Input Rise and Fall Times 480Ω 480Ω Input and Output Timing Levels Output Load Q 255Ω 30pF Q 255Ω 5pF NOTE: For tEHQZ, tGHQZ and tWLQZ, CL = 5pF Figure 2 White Electronic Designs Corp. reserves the right to change products or specifications without notice. September 1999 Rev. 2 2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs AC CHARACTERISTICS – READ CYCLE VCC = 5.0V, Vss = 0V, -55°C ≤ TA ≤ +125°C 70ns Alt. tRC tAA tACS tCLZ tCHZ tOH tOE tOLZ tOHZ Min 70 Max 70 70 10 25 10 35 5 0 25 5 0 10 45 30 5 0 10 30 10 Min 85 Symbol Parameter Read Cycle Time Address Access Time Chip Enable Access Time Chip Enable to Output in Low Z (1) Chip Disable to Output in High Z (1) Output Hold from Address Change Output Enable to Output Valid Output Enable to Output in Low Z (1) Output Disable to Output in High Z(1) 1. This parameter is guaranteed by design but not tested. EDI88257C 85ns Max 85 85 10 Min 100 100ns Max 100 100 30 50 30 Units ns ns ns ns ns ns ns ns ns JEDEC tAVAV tAVQV tELQV tELQX tEHQZ tAVQX tGLQV tGLQX tGHQZ AC CHARACTERISTICS – WRITE CYCLE VCC = 5.0V, VSS = 0V, -55°C≤ TA ≤ +125°C 70ns Alt. tWC tCW tCW tAS tAS tAW tAW tWP tWP tWR tWR tDH tDH tWHZ tDW tDW tWLZ Min 70 60 60 0 0 65 65 50 50 0 0 0 0 0 40 30 5 Max Min 85 70 70 0 0 70 70 55 55 0 0 0 0 0 40 35 0 Symbol Parameter Write Cycle Time Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Data Hold Time Write to Output in High Z (1) Data to Write Time Output Active from End of Write (1) 1. This parameter is guaranteed by design but not tested. 85ns Max Min 100 80 80 0 0 80 80 60 60 0 0 0 0 0 40 40 0 100ns Max Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns JEDEC tAVAV tELWH tELEH tAVWL tAVEL tAVWH tAVEH tWLWH tWLEH tWHAX tEHAX tWHDX tEHDX tWLQZ tDVWH tDVEH tWHQX 25 30 30 White Electronic Designs Corp. reserves the right to change products or specifications without notice. September 1999 Rev. 2 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs FIGURE 2 – TIMING WAVEFORM - READ CYCLE tAVAV ADDRESS EDI88257C tAVQV E# tAVAV ADDRESS ADDRESS 1 ADDRESS 2 tELQV tELQX G# tEHQZ tAVQV DATA I/O tAVQX DATA 1 DATA 2 tGLQV tGLQX DATA OUT tGHQZ READ CYCLE 1 (W# HIGH; G#, E# LOW) READ CYCLE 2 (W# HIGH) FIGURE 3 – WRITE CYCLE - W# CONTROLLED tAVAV ADDRESS tAVWH tELWH E# tWHAX tAVWL W# tWLWH tDVWH tWHDX DATA IN DATA VALID tWLQZ DATA OUT HIGH Z tWHQX WRITE CYCLE 1, W# CONTROLLED FIGURE 4 – WRITE CYCLE - E# CONTROLLED tAVAV ADDRESS tAVEH tELEH E# tEHAX tAVEL W# tWLEH tDVEH tEHDX DATA IN DATA OUT HIGH Z DATA VALID WRITE CYCLE 2, E# CONTROLLED White Electronic Designs Corp. reserves the right to change products or specifications without notice. September 1999 Rev. 2 4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs DATA RETENTION CHARACTERISTICS (EDI88257LP ONLY) -55°C ≤ TA ≤ +125°C Characteristic Low Power Version only Data Retention Voltage Data Retention Quiescent Current Chip Disable to Data Retention Time Operation Recovery Time Sym VCC ICCDR tCDR TR Conditions VCC = 2.0V E# ≥ VCC -0.2V VIN ≥ VCC -0.2V or VIN ≤ 0.2V Min 2 – 0 tAVAV Typ – – – – EDI88257C Max – 185 – – Units V µA ns ns FIGURE 5 – DATA RETENTION - E# CONTROLLED DATA RETENTION MODE VCC tCDR E# E# = VCC -0.2V 4.5V VCC 4.5V tR DATA RETENTION, E# CONTROLLED White Electronic Designs Corp. reserves the right to change products or specifications without notice. September 1999 Rev. 2 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88257C PACKAGE 9: 32 PIN SIDEBRAZED CERAMIC DIP (600MILS WIDE) 1.616 1.584 Pin 1 Indicator 0.200 0.125 0.061 0.017 0.020 0.016 15 x 0.100 = 1.500 0.060 0.040 0.620 0.600 0.100 TYP 0.155 0.115 0.600 NOM ALL DIMENSIONS ARE IN INCHES ORDERING INFORMATION EDI 8 8 257 C X X X WHITE ELECTRONIC DESIGNS SRAM ORGANIZATION, 256Kx8 TECHNOLOGY: C = CMOS Standard Power LP = Low Power ACCESS TIME (ns) PACKAGE TYPE: C = 32 lead Sidebrazed DIP, 600 mil (Package 9) DEVICE GRADE: B = MIL-STD-883 Compliant M = Military Screened I = Industrial C = Commercial -55°C to +125°C -40°C to +85°C 0°C to +70°C White Electronic Designs Corp. reserves the right to change products or specifications without notice. September 1999 Rev. 2 6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com