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EDI8L32128C25AC

EDI8L32128C25AC

  • 厂商:

    WEDC

  • 封装:

  • 描述:

    EDI8L32128C25AC - 128Kx32 CMOS High Speed Static RAM - White Electronic Designs Corporation

  • 数据手册
  • 价格&库存
EDI8L32128C25AC 数据手册
White Electronic Designs 128Kx32 CMOS High Speed Static RAM FEATURES              128Kx32 bit CMOS Static Random Access Memory Array Fast Access Times: 12, 15, 17, 20, and 25ns Individual Byte Enables User Configurable Organization with Minimal Additional Logic Master Output Enable and Write Control TTL Compatible Inputs and Outputs Fully Static, No Clocks 68 Lead PLCC, No. 99 (JEDEC MO-47AE) Small Footprint, 0.990 Sq. In. Multiple Ground Pins for Maximum Noise Immunity EDI8L32128C DESCRIPTION The EDI8L32128C is a high speed, high performance, four megabit density Static RAM organized as a 128Kx32 bit array. Four Chip Enables, Write Control, and Output Enable provide the user with a flexible memory solution. The user may independently enable each of the four bytes, and, with minimal additional peripheral logic, the unit may be configured as a 256Kx16 or 512Kx8 array. Fully asynchronous circuitry is used, requiring no clocks or refreshing for operation and providing equal access and cycle times for ease of use. The EDI8L32128C, allows 4 megabits of memory to be placed in less than 0.990 square inches of board space; a savings of 0.885 square inches over four standard 128Kx8 components. Surface Mount Package Single +5V (±5%) Supply Operation NOTE: Solder Reflow temperature should not exceed 230°C FIG. 1 PIN CONFIGURATION TOP VIEW DQ16 NC NC E3# E2# E1# E0# NC VCC NC NC G# W# A16 A15 A14 DQ15 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 PIN DESCRIPTION AØ-16 EØ-3# W# G# DQØ-31 VCC VSS NC Address Inputs Chip Enables (One per Byte) Master Write Enable Master Output Enable Common Data Input/Output Power (+5V±5%) Ground No Connection DQ17 DQ18 DQ19 VSS DQ20 DQ21 DQ22 DQ23 VCC DQ24 DQ25 DQ26 DQ27 VSS DQ28 DQ29 DQ30 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 DQ14 DQ13 DQ12 VSS DQ11 DQ10 DQ9 DQ8 VCC DQ7 DQ6 DQ5 DQ4 VSS DQ3 DQ2 DQ1 BLOCK DIAGRAM A0-A16 G# W# E0# E1# E2# E3# 17 128Kx32 Memory Array DQ0-DQ7 DQ8-DQ15 DQ16-DQ23 DQ24-DQ31 NOTE: Pin 2 & 67 on the 64Kx32 (EDI8L3265C) and the 256Kx32 (EDI8L32256C) are word select pins. White Electronic Designs Corp. reserves the right to change products or specifications without notice. August, 2002 Rev. 6 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A9 A8 A7 DQ0 White Electronic Designs ABSOLUTE MAXIMUM RATINGS* Voltage on any pin relative to VSS Operating Temperature TA (Ambient) Commercial Industrial Storage Temperature Power Dissipation Output Current. Junction Temperature, TJ -0.5V to 7.0V 0°C to + 70°C -40°C to +85°C -55°C to +125°C 4 Watts 20 mA 175°C Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Sym VCC VSS VIH VIL Min 4.75 0 2.2 -0.3 EDI8L32128C RECOMMENDED DC OPERATING CONDITIONS Typ 5.0 0 --Max 5.25 0 VCC+0.5 0.8 Units V V V V CAPACITANCE (f = 1.0MHZ, VIN = VCC or VSS) Parameter Address Lines Data Lines Write & Output Enable Lines Chip Enable Lines/Byte Select Sym CA CD/Q W#, G# E0-3# Max 40 10 40 8 Unit pF pF pF pF *Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. TRUTH TABLE E# H L L L L W# X H X H L G# X H X L X Mode Standby Output Disable Output Disable Read Write Output High Z High Z High Z DOUT DIN Power ICC2,ICC3 ICC1 ICC1 ICC1 ICC1 DC ELECTRICAL CHARACTERISTICS Parameter Operating Power Supply Current Standby (TTL) Supply Current Full Standby CMOS Supply Current Input Leakage Current Output Leakage Current Output High Volltage Output Low Voltage Typical: TA = 25°C, VCC = 5.0V Sym ICC1 ICC2 ICC3 ILI ILO VOH VOL Conditions W# = VIL, II/O = 0mA, Min Cycle E# ≥ VIH, VIN ≤ VIL or VIN ≥ VIH, f = ØMHZ E# ≥ VCC -0.2V VIN ≥ VCC -0.2V or VIN ≤ 0.2V VIN = 0V to VCC V I/O = 0V to VCC IOH = -4.0mA IOL = 8.0mA Typ 620 Max 12* 720 160 20 15 680 160 20 17 640 160 20 ±10 ±10 20/25 600 160 20 Units mA mA mA µA µA V V 2.4 0.4 AC TEST CONDITIONS Figure 2 VCC 480 Ω Q 255 Ω 30 pF Q 255 Ω 5 pF Figure 3 VCC 480 Ω Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels Output Load VSS to 3.0V 5ns 1.5V Figure 2 NOTE: For tEHQZ, tGHQZ and tWLQZ, CL = 5pF Figure 3) White Electronic Designs Corp. reserves the right to change products or specifications without notice. August, 2002 Rev. 6 2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs AC CHARACTERISTICS - READ CYCLE Parameter Read Cycle Time Address Access Time Chip Enable Access Time Chip Enable to Output in Low Z (1) Chip Disable to Output in High Z (1) Output Hold from Address Change Output Enable to Output Valid Output Enable to Output in Low Z (1) Output Disable to Output in High Z(1) Symbol JEDEC tAVAV tAVQV tELQV tELQX tEHQZ tAVQX tGLQV tGLQX tGHQZ Alt. tRC tAA tACS tCLZ tCHZ tOH tOE tOLZ tOHZ 12ns Min 12 Max 12 12 2 7 3 5 2 4 2 5 3 6 2 6 3 8 3 8 2 8 15ns Min 15 Max 15 15 3 8 3 8 17ns Min 17 Max 17 17 3 10 20ns Min 20 Max 20 20 EDI8L32128C 25n Min 25 Max 25 25 3 10 3 10 0 10 Units ns ns ns ns ns ns ns ns ns NOTE 1: Parameter guaranteed, but not tested. FIG. 4 READ CYCLE 1 - W# HIGH, G#, E# LOW tAVAV A ADDRESS 1 tAVQV Q ADDRESS 2 tAVQX DATA 1 DATA 2 FIG. 5 READ CYCLE 2 - W# HIGH tAVAV A tAVQV E# tELQV tELQX G# tEHQZ tGLQV tGLQX Q tGHQZ White Electronic Designs Corp. reserves the right to change products or specifications without notice. August, 2002 Rev. 6 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs AC CHARACTERISTICS - WRITE CYCLE Parameter Write Cycle Time Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Data Hold Time Write to Output in High Z (1) Data to Write Time Output Active from End of Write (1) NOTE: Parameter guaranteed, but not tested. Symbol JEDEC tAVAV tELWH tELEH tAVWL tAVEL tAVWH tAVEH tWLWH tWLEH tWHAX tEHAX tWHDX tEHDX tWLQZ tDVWH tDVEH tWHQX Alt. tWC tCW tCW tAS tAS tAW tAW tWP tWP tWR tWR tDH tDH tWHZ tDW tDW tWLZ 12 8 8 0 0 9 9 9 9 0 0 0 0 0 5 5 2 5 12ns Min Max 15 9 9 0 0 10 10 10 10 0 0 0 0 0 6 6 2 6 15ns Min Max 17 10 10 0 0 12 12 12 12 0 0 0 0 0 8 8 2 7 17ns Min Max 20 15 15 0 0 15 15 15 15 0 0 0 0 0 8 8 2 7 20ns Min Max EDI8L32128C 25ns Min 25 20 20 0 0 15 15 15 15 0 0 0 0 0 12 12 2 10 Max Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns FIG. 6 WRITE CYCLE 1 - W# CONTROLLED tAVAV A tGLAX G# tAVWH tELWH E# tWHAX tAVWL W# tWLWH tDVWH tWHDX D DATA VALID tWLQZ Q HIGH Z tWHQX FIG. 7 WRITE CYCLE 2 - E# CONTROLLED tAVAV A tAVEH tELEH E# tAVEL W# tDVEH D Q HIGH Z tEHDX tWLEH tEHAX DATA VALID White Electronic Designs Corp. reserves the right to change products or specifications without notice. August, 2002 Rev. 6 4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs PACKAGE DESCRIPTION Package No. 99: 68 LEAD PLCC JEDEC MO-47AE EDI8L32128C 0.995 Max 0.956 Max 0.995 0.956 Max Max 0.180 Max 0.040 Max 0.020 0.015 0.930 0.890 0.050 BSC 0.115 Max ALL DIMENSIONS ARE IN INCHES ORDERING INFORMATION Commercial (0°C to +70°C) Part Number EDI8L32128C12AC EDI8L32128C15AC EDI8L32128C17AC EDI8L32128C20AC EDI8L32128C25AC Speed (ns) 12 15 17 20 25 Package No. 99 99 99 99 99 Industrial (-40°C to +85°C) Part Number EDI8L32128C15AI EDI8L32128C17AI EDI8L32128C20AI Speed (ns) 15 17 20 Package No. 99 99 99 White Electronic Designs Corp. reserves the right to change products or specifications without notice. August, 2002 Rev. 6 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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