EDI8L32512V15AI

White Electronic Designs 512Kx32 SRAM Module.3.3V FEATURES                   DSP Memory Solution ADSP-21060L (SHARC) ADSP-21062L (SHARC) Texas Instruments TMS320LC31 MPC860 (Power Quic) Fast Access Times: 12, 15, 17, and 20ns Individual Byte Enables User configuration organization with Minimal Additional Logic Master Output Enable and Write Control TTL Compatible Inputs and Outputs Fully Static, No Clocks 68 Lead PLCC, No. 99 JEDEC MO-47AE Small Footprint, 0.990 Sq. In. Multiple Ground Pins for Maximum Noise Immunity EDI8L32512V DESCRIPTION The EDI8L32512V is a high speed, 3.3V, 16 megabit SRAM. The device is available with access times of 12, 15, 17 and 20ns allowing the creation of a no wait state DSP and RISC microprocessor memory solutions. The device can be configured as a 512K x 32 and used to create a single chip external data memory solution for TI's TMS320LC31 (figure 5), or Analog's SHARCTM DSP (figure 6). The device provides a 56% space savings when compared to four 512Kx8, 36 pin SOJs. In addition the EDI8K32512V has only a 10pF load on the data lines vs. 32 pF for four plastic SOJs. The device provides a memory upgrade of the EDI8F32256V (256K x 32) or the EDI8L32128V (128K x 32) (figure 8). Alternatively, the device's chip enables can configure it as a 1M x 16. A 1M x 48 program memory array for Analog's CHARC DSP is created using three devices (figure 7). If RISC Memory Solution Random Access Memory Array Surface Mount Package this memory is too deep, two 512K x 24s (EDI8L24512V) can be used to create a 512K x 48 array or two 128K x 24s (EDI8L24128V) can be used to create a 128K x 48 array. Note: Soldier Reflow Temperature should not exceed 260°C for 10 seconds. Single +3.3V (±5%) Supply Operation FIG. 1 PIN CONFIGURATIONS DQ16 A18 A17 E3# E2# E1# E0# NC VCC NC NC G# W# A16 A15 A14 DQ15 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 A0-A18 E0#-E3# PIN DESCRIPTION DQ17 DQ18 DQ19 V SS DQ20 DQ21 DQ22 DQ23 VCC DQ24 DQ25 DQ26 DQ27 V SS DQ28 DQ29 DQ30 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 DQ14 DQ13 DQ12 V SS DQ11 DQ10 DQ9 DQ8 VCC DQ7 DQ6 DQ5 DQ4 V SS DQ3 DQ2 DQ1 W# G# DQ0-DQ31 VCC VSS NC Address Inputs Chip Enables (One per Byte) Master Write Enable Master Output Enable Common Data Input/Output Power (+3.3V±5%) Ground No Connectiona BLOCK DIAGRAM A0-18 G# W# E0# E1# E2# E3# 1 19 512K x 32 Memory Array DQ0-DQ7 DQ8-DQ15 DQ16-DQ23 DQ24-DQ31 White Electronic Designs Corp. reserves the right to change products or specifications without notice. October. 2000 Rev. 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A9 A8 A7 DQ0 White Electronic Designs ABSOLUTE MAXIMUM RATINGS* Voltage on any pin relative to VSS Operating Temperature tA (Ambient) Commercial Industrial Storage Temperature, Plastic Power Dissipation Output Current Junction Temperature, tJ -0.5V to 7.0V 0°C to +70°C -40°C to +85°C -55°C to +125°C 2.5 Watts 20 mA -175°C EDI8L32512V RECOMMENDED DC OPERATING CONDITIONS Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Sym VCC VSS VIH VIL Min 3.135 0 2.2 -0.3 Typ 3.3 0 --Max 3.465 0 VCC + 0.3 +0.8 Units V V V V CAPACITANCE (f=1.0MHz, VIN=VCC or VSS) Parameter Address Lines Data Lines Chip Enable Line Write & Output Enable Line Sym CI CD/Q E0-3 W#, G# Max 30 10 8 30 Unit pF pF pF pF *Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. TRUTH TABLE E# H L L L W# X H H L G# X H L X Mode Standby Output Deselect Read Write Output HIGH Z HIGH Z DOUT DIN Power ICC2, ICC3 ICC1 ICC1 ICC1 (VCC= 3.3V, tA = 25°C) Conditions W# = VIL, II/O = 0mA, Min Cycle E# > VIH, VIN < VIL or VIN > VIH E# > VCC-0.2V VIN > VCC=0.2V or VIN < 0.2V VIN = 0V to VCC V I/O = 0V TO VCC IOH = -4.0mA IOL = 4.0mA DC ELECTRICAL CHARACTERISTICS Parameter Operating Power Supply Current Standby (TTL) Power Supply Current Full Standby Power CMOS Supply Current Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Sym ICC1 ICC2 ICC3 ILI ILO VOH VOL 12 & 15 Min -----2.4 -Typ 440 100 60 ----Max 800 300 80 ±20 ±20 -0.4 Min -----2.4 -17 & 20 Typ 440 100 60 ----Max 640 200 100 ±10 ±10 -0.4 VSS to 3.0V 5ns 1.5V Figure 1 Units mA mA mA µA µA V V AC TEST CONDITIONS Figure 1 Vcc Figure 2 Vcc 480Ω 480Ω Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels Output Load (Note: For tEHQZ,tGHQZ and tWLQZ, CL = 5pF, Figure 2) Q 255Ω 30pF Q 255Ω 5pF White Electronic Designs Corp. reserves the right to change products or specifications without notice. October. 2000 Rev. 3 2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs AC CHARACTERISTICS READ CYCLE (VCC = 3.3V, VSS = 0V, tA = 0°C to -70°C) 12ns Min 12 Max 12 10 3 6 3 6 3 6 3 7 3 7 3 8 3 7 3 8 Min 15 15ns Max 15 12 3 8 Min 17 Alt. tRC tAA tACS tCLZ tCHZ tOH tOE tOLZ tOHZ Parameter Read Cycle Time Address Access Time Chip Enable Access Chip Enable to Output in Low Z (1) Chip Disable to Output in High Z (1) Output Hold from Address Change Output Enable to Output Valid Output Enable to Output in Low Z (1) Output Disable to Output in High (1) Symbol JEDEC tAVAV tAVQV tELQV tELQX tEHQZ tAVQX tGLQV tGLQX tGHQZ 17ns Max 17 15 EDI8L32512V 20ns Min 20 Max 20 20 3 9 3 9 3 9 Units ns ns ns ns ns ns ns ns ns Notes: 1. Parameter is guaranteed by design but not tested. AC CHARACTERISTICS WRITE CYCLE (VCC = 3.3V, VSS = 0V, tA = 0°C to -70°C) 12ns Min 12 8 8 0 0 8 8 8 8 0 0 0 0 0 6 6 3 Max Min 15 10 10 0 0 10 10 10 10 0 0 0 0 0 7 7 3 15ns Max Min 17 11 11 0 0 11 11 11 11 0 0 0 0 0 8 8 3 Alt. tWC tCW tCW tAS tAS tAW tAW tWP tWP tWR tWR tDH tDH tWHZ tDW tDW tWLZ Parameter Write Cycle Time Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Data Hold Time Write to Output in High Z (1) Data to Write Time Output Active from End of Write (1) Symbol JEDEC tAVAV tELWH tELEH tAVWL tAVEL tAVWH tAHEH tWLWH tELEH tWHAX tEHAX tWHDX tEHDX tWLQZ tDVWH tDVEH tWHQX 17ns Max Min 20 12 12 0 0 12 12 12 12 0 0 0 0 0 9 9 3 20ns Max Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 6 7 8 9 Notes: 1. Parameter guaranteed, but not tested. White Electronic Designs Corp. reserves the right to change products or specifications without notice. October. 2000 Rev. 3 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs FIG. 2 TIMING WAVEFRONT - READ CYCLE EDI8L32512V tAVAV A ADDRESS 1 ADDRESS 2 tAVQV Q tAVQX DATA 1 DATA 2 READ CYCLE 1 (W# HIGH; G#, E# LOW) tAVAV A tAVQV E# tELQX G# tELQV tEHQZ tGLQX Q tGLQV tGHQZ READ CYCLE 2 (W# HIGH) White Electronic Designs Corp. reserves the right to change products or specifications without notice. October. 2000 Rev. 3 4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs FIG. 3 WRITE CYCLE - W# CONTROLLED A EDI8L32512V tAVAV tAVWH tELWH tWHAX E# tAVWL W# tWLWH tDVWH tWHDX D DATA VALID tWLQZ Q HIGH Z tWHQX WRITE CYCLE 1, W# CONTROLLED FIG. 4 WRITE CYCLE - E# CONTROLLED A tAVAV tAVEH tELEH tEHAX E# tAVEL W# tWLEH tDVEH tEHDX D Q HIGH Z DATA VALID WRITE CYCLE 2, E# CONTROLLED White Electronic Designs Corp. reserves the right to change products or specifications without notice. October. 2000 Rev. 3 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs ORDERING INFORMATION Commercial Temperature Range (0°C to +70°C) Part Number EDI8L32512V12AC EDI8L32512V15AC EDI8L32512V17AC EDI8L32512V20AC Speed (ns) 12 15 17 20 Package No. 99 99 99 99 EDI8L32512V Industrial Temperature Range (-40°C to +85°C) Part Number EDI8L32512V15AI EDI8L32512V17AI EDI8L32512V20AI Speed (ns) 15 17 20 Package No. 99 99 99 PACKAGE 99" 68 LEAD PLCC JEDEC MO-47AE 0.995 Max 0.956 Max 0.995 0.956 Max Max 0.180 Max 0.040 Max 0.020 0.015 0.050 BSC 0.115 Max Coplanarity (lowest lead to highest lead 0.004 max) 0.930 0.890 ALL DIMENSIONS ARE IN INCHES White Electronic Designs Corp. reserves the right to change products or specifications without notice. October. 2000 Rev. 3 6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs FIG 5. EDI8L32512V INTERFACING THE TEXAS INSTRUMENTS TMS 320LC32 WITH THE EDI8L32512V (512K X 32) Primary Address Bus A23-0 EDI8L32512V A18 } 8L32512Conly A17 A16 A15 A A14 D A13 D A12 R E S S A4 A3 A2 A1 A0 B U S DQ31 DQ30 DQ29 DQ28 DQ27 TI TMS320LC31 D A T A B U S DQ4 DQ3 DQ2 DQ1 DQ0 STRB# PrimaryDatabus D31 - D0 R/W# E0# E1# E2# E3# W# G# FIG 6. INTERFACING THE ANALOG SHARC DSP WITH THE EDI8L32512V (512K X 32 ARRAY). Address Bus A31-0 A18 A17 A16 A15 A14 A13 A12 EDI8L32512V DQ31 DQ30 DQ29 DQ28 DQ27 Analog Device ADSP-2106xL A4 A3 A2 A1 A0 E0# E1# E2# E3# W# A D D R E S S B U S D A T A B U S DQ4 DQ3 DQ2 DQ1 DQ0 MS0# Databus D31-0 D31 D30 . . . . WR# RD# G# D5 D4 D3 D2 D1 D0 White Electronic Designs Corp. reserves the right to change products or specifications without notice. October. 2000 Rev. 3 7 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs FIG 7. INTERFACING THE ANALOG SHARC DSP WITH THE EDI8L32512V (1M X 48 ARRAY) EDI8L32512V Address Bus A31- 0 A18-0 E0# E1# E2# E3# W# G# (Configured as 1Mx16) D A T A B U S EDI8L32512V DQ31 DQ15 MS0# MS1# WR# RD# DQ16 DQ15 DQ0 WORD1 DQ0 EDI8L32512V A18-0 E0# E1# E2# E3# W# G# (Configured as 1Mx16) D A T A B U S DQ31 DQ31 Analog Device ADSP-2106xL DQ16 DQ15 DQ0 WORD2 DQ16 EDI8L32512V (Configured as 1Mx16) Databus D47-0 A18-0 E0# E1# E2# E3# W# G# D A T A B U S DQ31 DQ47 DQ16 DQ15 DQ0 WORD3 DQ17 MCM-L UPGRADE PATH 512Kx32 256Kx32 128Kx32 8L32512V 8L32256V 8L32128V DQ17 DQ18 DQ19 VSS DQ20 DQ21 DQ22 DQ23 VCC DQ24 DQ25 DQ26 DQ27 VSS DQ28 DQ29 DQ30 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 DQ16 NC NC E3# E2# E1# E0# NC VCC NC NC G# W# A16 A15 A14 DQ15 DQ16 NC A17 B53# B52# B51# B50# E1# VCC NC E0# G# W# A16 A15 A14 DQ15 DQ16 A18 A17 E3# E2# E1# E0# NC VCC NC NC G# W# A16 A15 A14 DQ15 FIG 8. DQ17 DQ18 DQ19 VSS DQ20 DQ21 DQ22 DQ23 VCC DQ24 DQ25 DQ26 DQ27 VSS DQ28 DQ29 DQ30 DQ17 DQ18 DQ19 VSS DQ20 DQ21 DQ22 DQ23 VCC DQ24 DQ25 DQ26 DQ27 VSS DQ28 DQ29 DQ30 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 DQ14 DQ13 DQ12 VSS DQ11 DQ10 DQ09 DQ08 VCC DQ07 DQ06 DQ05 DQ04 VSS DQ03 DQ02 DQ01 DQ14 DQ13 DQ12 VSS DQ11 DQ10 DQ09 DQ08 VCC DQ07 DQ06 DQ05 DQ04 VSS DQ03 DQ02 DQ01 DQ14 DQ13 DQ12 VSS DQ11 DQ10 DQ09 DQ08 VCC DQ07 DQ06 DQ05 DQ04 VSS DQ03 DQ02 DQ01 White Electronic Designs Corp. reserves the right to change products or specifications without notice. October. 2000 Rev. 3 8 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A09 A08 A07 DQ00 DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A09 A08 A07 DQ00 DQ31 A6 A5 A4 A3 A2 A1 A0 VCC A13 A12 A11 A10 A09 A08 A07 DQ00