EDI8L3265C

EDI8L3265C

  • 厂商:

    WEDC

  • 封装:

  • 描述:

    EDI8L3265C - 64Kx32 CMOS High Speed - White Electronic Designs Corporation

  • 详情介绍
  • 数据手册
  • 价格&库存
EDI8L3265C 数据手册
EDI8L3265C 64Kx32 SRAM Features 64Kx32 bit CMOS Static Random Access Memory Array • Fast Access Times: 12*, 15, 20, and 25ns • Individual Byte Selects • User Configurable Organization with Minimal Additional Logic 64Kx32 CMOS High Speed Static RAM The EDI8L3265C is a high speed, high performance, four megabit density Static RAM organized as a 64Kx32 bit array. Four Byte Selects, two Chip Enables, Write Control, and Output Enable provide the user with a flexible memory solution. The user may independently enable each of the four bytes, and, with minimal additional peripheral logic, the unit may be configured as a 128Kx16 array. Fully asynchronous circuitry is used, requiring no clocks or refreshing for operation and providing equal access and cycle times for ease of use. The EDI8L3265C, allows 2 megabits of memory to be placed in less than 0.990 square inches of board space. The EDI8L3265C can be upgraded to 128K, 256K or 512Kx32 in the same footprint using the EDI8L32128, EDI8L32256 or the EDI8L32512C. (See page 6 for upgrade paths). Note: Solder Reflow temperatures should not exceed 260°C for 10 seconds. • Fully Static, No Clocks Surface Mount Package Single +5V (±5%) Supply Operation * Advance Information Pin Configurations and Block Diagram March 1997 Rev. 4 ECO #8302 T NO • Master Output Enable and Write Control • TTL Compatible Inputs and Outputs • 68 Lead PLCC, No. 99 (JEDEC-M0-47AE) • Small Footprint, 0.990 Sq. In. • Multiple Ground Pins for Maximum Noise Immunity Notes: 1. See page 6 for upgrade paths. D DE EN M M CO RE 1 Pin Names Address Inputs Chip Enables (one per word) Byte Selects (One per Byte) Master Write Enable Master Output Enable Common Data Input/Output Power (+5V±5%) Ground No Connection AØ-A15 EØ-E1 BSØ-BS3 W G DQØ-DQ31 VCC VSS NC R FO White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com W NE GN SI DE EDI8L3265C 64Kx32 SRAM Absolute Maximum Ratings* Voltage on any pin relative to VSS Operating Temperature TA (Ambient) Commercial Industrial Storage Temperature Power Dissipation Output Current. Junction Temperature, TJ -0.5V to 7.0V 0°C to + 70°C -40°C to +85°C -55°C to +125°C 3.0 Watts 20 mA 175°C Recommended DC Operating Conditions Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Sym Min VCC 4.75 VSS 0 VIH 2.2 VIL -0.3 Typ 5.0 0 --Max Units 5.25 V 0 V VCC+0.5 V 0.8 V AC Test Conditions Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels Output Load VSS to 3.0V 5ns 1.5V Figure 1 *Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. (note: For TEHQZ,TGHQZ and TWLQZ, CL = 5pF) DC Electrical Characteristics Parameter Operating Power Supply Current Standby (TTL) Supply Current Full Standby Supply Current CMOS Input Leakage Current Output Leakage Current Output High Volltage Output Low Voltage *Typical: TA = 25°C, VCC = 5.0V *Advanced Information Sym ICC1 ICC2 ICC3 ILI ILO VOH VOL Conditions W= VIL, II/O = 0mA, Min Cycle E ³ VIH, VIN £ VIL or VIN ³ VIH, f=ØMHz E ³ VCC-0.2V VIN ³ VCC-0.2V or VIN £ 0.2V VIN = 0V to VCC V I/O = 0V to VCC IOH = -4.0mA IOL = 8.0mA Min Max 12ns* 15ns 20/25ns 500 460 420 60 20 ±10 ±10 0.4 60 20 ±10 ±10 0.4 60 20 ±10 ±10 0.4 Unit ns mA mA mA µA µA V V 2.4 Truth Table E H L L L L W X H X H L G BSØ-3 Mode XX Standby HX Output Disable XH Output Disable LL Read XL Write Output High Z High Z High Z Dout Din Power ICC2,ICC3 ICC1 ICC1 ICC1 ICC1 Capacitance (f=1.0MHz, VIN=VCC or VSS) Parameter Address Lines Data Lines Write & Output Enable Lines Chip Enable Lines Sym CA CD/Q W, G E, BS Max 20 10 16 9 Unit pF pF pF bF pF X Means Don't Care These parameters are sampled, not 100% tested. White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com 2 EDI8L3265C 64Kx32 SRAM AC Characteristics Read Cycle Parameter Read Cycle Time Address Access Time Chip Enable Access Time Byte Select Access Time Chip Enable to Output in Low Z (1) Byte Select to Output in Low Z Chip Disable to Output in High Z (1) Byte Select to Output in High Z Output Hold from Address Change Output Enable to Output Valid Output Enable to Output in Low Z (1) Output Disable to Output in High Z(1) Note 1: Parameter guaranteed, but not tested. * Advanced Information Symbol 12ns* JEDEC Alt. Min Max TAVAV TRC 12 TAVQV TAA 12 TELQV TACS 12 TBLQV TBA 12 TELQX TCLZ 3 TBLQX TBLZ 3 TEHQZ TCHZ 7 TBHQZ TBHZ 7 TAVQX TOH 3 TGLQV TOE 5 TGLQX TOLZ 2 TGHQZ TOHZ 4 15ns Min Max 15 15 15 15 3 3 8 8 3 6 2 5 20ns Min Max 20 20 20 20 3 3 10 10 3 8 2 8 25ns Min Max 25 25 25 25 3 3 10 10 3 10 0 10 Units ns ns ns ns ns ns ns ns ns ns ns ns Read Cycle 1 - W High, G, E Low Read Cycle 2 - W High 3 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com EDI8L3265C 64Kx32 SRAM AC Characteristics Write Cycle Symbol 12ns* 15ns 20ns JEDEC Alt. Min Max Min Max Min Max TAVAV TWC 12 15 20 TELWH TCW 8 9 15 TELEH TCW 8 9 15 Byte Select to end of Write TBLWH TBW 8 9 15 Address Setup Time TAVWL TAS 0 0 0 TAVEL TAS 0 0 0 Address Valid to End of Write TAVWH TAW 9 10 15 TAVEH TAW 9 10 15 Write Pulse Width TWLWH TWP 9 10 15 TWLEH TWP 9 10 15 Write Recovery Time TWHAX TWR 0 0 0 TEHAX TWR 0 0 0 Data Hold Time TWHDX TDH 0 0 0 TEHDX TDH 0 0 0 Write to Output in High Z (1) TWLQZ TWHZ 0 5 0 6 0 7 Data to Write Time TDVWH TDW 5 6 8 TDVEH TDW 5 6 8 Output Active from End of Write (1) TWHQX TWLZ 2 2 2 Parameter Write Cycle Time Chip Enable to End of Write Note 1: Parameter guaranteed, but not tested. * Advanced Information 25ns Min Max Units 25 ns 20 ns 20 ns 20 ns 0 ns 0 ns 15 ns 15 ns 15 ns 15 ns 0 ns 0 ns 0 ns 0 ns 0 10 ns 12 ns 12 ns 2 ns Write Cycle 1 - W Controlled White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com 4 EDI8L3265C 64Kx32 SRAM Write Cycle 2 - E Controlled T NO BSx, Ordering Information Part Number Commercial (0°C to 70°C) EDI8L3265C12AC* EDI8L3265C15AC EDI8L3265C20AC EDI8L3265C25AC *Advanced Information Package Description Package No. 99 68 Lead PLCC JEDEC M0-47AE D DE EN M M CO RE Speed (ns) 12 15 20 25 Package No. 99 99 99 99 5 Industrial (-40°C to +85°C) Part Number EDI8L3265C15AI EDI8L3265C20AI EDI8L3265C25AI Speed (ns) 15 20 25 Package No. 99 99 99 R FO White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com W NE GN SI DE EDI8L3265C 64Kx32 SRAM EDI MCM-L Upgrade Path White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com 6
EDI8L3265C
1. 物料型号: - 型号:EDI8L3265C - 速度等级:12ns、15ns、20ns、25ns - 封装类型:99号PLCC,符合JEDEC MO-47AE标准

2. 器件简介: - EDI8L3265C是一款高速、高密度的静态RAM,组织为64Kx32位的阵列。 - 提供四个字节选择、两个芯片使能、写控制和输出使能,为用户提供灵活的存储解决方案。 - 完全异步电路设计,无需时钟或刷新,提供相等的访问和周期时间。

3. 引脚分配: - 地址输入(AO-A15) - 芯片使能(EO-E1) - 字节选择(BSO-BS3) - 主写使能(W) - 主输出使能(G) - 数据输入/输出(DQO-DQ31) - 电源(+5V±5%,VCC) - 地(VSS) - 无连接(NC)

4. 参数特性: - 工作电压:4.75V至5.25V - 输入高电平电压:VCC+0.5V - 输入低电平电压:0.8V - 输出高电平电压:2.4V - 输出低电平电压:0.4V

5. 功能详解: - 支持独立使能四个字节,可配置为128Kx16阵列。 - 无需额外逻辑,提供快速访问时间和用户可配置的组织结构。 - 支持主输出使能和写控制,提供TTL兼容的输入输出。

6. 应用信息: - 适用于需要高速、高密度存储解决方案的应用场合。 - 可升级至128K、256K或512Kx32位,且在同一封装下。

7. 封装信息: - 68引脚PLCC封装,占用面积为0.990平方英寸。 - 多个地线引脚,提供最大的抗噪声干扰能力。
EDI8L3265C 价格&库存

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