WED3DG644V133D1I-M

White Electronic Designs 32MB – 4Mx64 SDRAM, UNBUFFERED FEATURES PC100 and PC133 compatible Burst Mode Operation Auto and Self Refresh capability LVTTL compatible inputs and outputs Serial Presence Detect with EEPROM Fully synchronous: All signals are registered on the positive edge of the system clock Programmable Burst Lengths: 1, 2, 4, 8 or Full Page 3.3V ± 0.3V Power Supply 144 Pin SO-DIMM JEDEC • D1: 27.94 (1.10”) WED3DG644V-D1 DESCRIPTION The WED3DG644V is a 4Mx64 synchronous DRAM module which consists of four 4Mx16 SDRAM components in TSOP II package, and one 2Kb EEPROM in an 8 pin TSOP package for Serial Presence Detect which are mounted on a 144 pin SO-DIMM multilayer FR4 Substrate. * This product is subject to change without notice. NOTE: Consult factory for availability of: • RoHS compliant products • Vendor source control options • Industrial temperature option PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE) Pin Front Pin Back Pin Front Pin Back 1 VSS 2 VSS 51 DQ14 52 DQ46 3 DQ0 4 DQ32 53 DQ15 54 DQ47 56 VSSv 5 DQ1 6 DQ33 55 VSS 7 DQ2 8 DQ34 57 NC 58 NC 9 DQ3 10 DQ35 59 NC 60 NC 12 VCC 11 VCC 13 DQ4 14 DQ36 VOLTAGE KEY 15 DQ5 16 DQ37 17 DQ6 18 DQ38 61 CLK0 62 CKE0 19 DQ7 20 DQ39 63 VCC 64 VCC 21 VSS 22 VSS 65 RAS# 66 CAS# 23 DQM0 24 DQM4 67 WE# 68 *CKE1 25 DQM1 26 DQM5 69 CS0# 70 *A12 27 VCC 28 VCC 71 *CS1# 72 *A13 29 A0 30 A3 73 DNU 74 *CK1 31 A1 32 A4 75 VSS 76 VSS 33 A2 34 A5 77 NC 78 NC 36 VSS 79 NC 80 NC 35 VSS 37 DQ8 38 DQ40 81 VCC 82 VCC 39 DQ9 40 DQ41 83 DQ16 84 DQ48 41 DQ10 42 DQ42 85 DQ17 86 DQ49 43 DQ11 44 DQ43 87 DQ18 88 DQ50 46 VCC 89 DQ19 90 DQ51 45 VCC 47 DQ12 48 DQ44 91 VSS 92 VSS 49 DQ13 50 DQ45 93 DQ20 94 DQ52 Pin 95 97 99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 Back DQ21 DQ22 DQ23 VCC A6 A8 VSS A9 A10/AP VCC DQM2 DQM3 VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS **SDA VCC Pin Back 96 DQ53 98 DQ54 100 DQ55 102 VCC 104 A7 106 BA0 108 VSS 110 BA1 112 A11 114 VCC 116 DQM6 118 DQM7 120 VSS 122 DQ56 124 DQ57 126 DQ58 128 DQ59 130 VCC 132 DQ60 134 DQ61 136 DQ62 138 DQ63 140 VSS 142 **SCL 144 VCC A0 – A11 BA0-1 DQ0-63 CLK0 CKE0 CS0# RAS# CAS# WE# DQM0-7 VCC VSS *VREF SDA SCL DNU NC PIN NAMES Address input (Multiplexed) Select Bank Data Input/Output Clock input Clock Enable input Chip select Input Row Address Strobe Column Address Strobe Write Enable DQM Power Supply (3.3V) Ground Power supply for reference Serial data I/O Serial clock Do not use No Connect * These pins are not used in this module. ** These pins should be NC in the system which does not support SPD. June 2006 Rev. 3 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs FUNCTIONAL BLOCK DIAGRAM WED3DG644V-D1 CS0# DQM0 DQM4 LDQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 LDQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 UDQM DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQM5 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 UDQM DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQM2 LDQM DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM6 CS# DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 LDQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM3 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 UDQM DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQM7 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 UDQM DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 A0-A11 BA0 RAS# CAS# WE# CKE0 10 Ω SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SERIAL PD SCL 47Ω WP SA0 SDA SA1 SA2 DQn Every DQpin of SDRAM CLK0 10Ω SDRAM SDRAM SDRAM SDRAM 10 Ω 10pF VCC VCC 10Ω TWO 0.1 uF CAPACITORS To all SDRAMS PER EACH SDRAM CLK1 Notes: 1. All resistor values are 10 ohms unless otherwise specified. 2. D1 option does not have series resistors. June 2006 Rev. 3 2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Current Symbol VIN, VOUT VCC, VCCQ TSTG PD IOS Value -1.0 ~ 4.6 -1.0 ~ 4.6 WED3DG644V-D1 Units V V °C W mA -55 ~ +150 4 50 Note: Permanent device damage may occur if “ABSOLUTE MAXIMUM RATINGS” are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. RECOMMENDED DC OPERATING CONDITIONS Voltage Referenced to: VSS = 0V, TA = 0°C to +70°C Parameter Supply Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Leakage Current Symbol VCC VIH VIL VOH VOL ILI Min 3.0 2.0 -0.3 2.4 — -10 Typ 3.3 3.0 — — — — Max 3.6 VCCQ+0.3 0.8 — 0.4 10 Unit V V V V V µA 1 2 IOH= -2mA IOL= -2mA 3 Note Note: 1. VIH (max)= 5.6V AC. The overshoot voltage duration is ≤ 3ns. 2. VIL (min)= -2.0V AC. The undershoot voltage duration is ≤ 3ns. 3. Any input 0V ≤ VIN ≤ VCCQ Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs. CAPACITANCE TA = 25°C, f = 1MHz, VCC = 3.3V, VREF = 1.4V ± 200mV Parameter Input Capacitance (A0-A12) Input Capacitance (RAS#,CAS#,WE#) Input Capacitance (CKE0) Input Capacitance (CLK0) Input Capacitance (CS0#) Input Capacitance (DQM0-DQM7) Input Capacitance (BA0-BA1) Data Input/Output Capacitance (DQ0-DQ63) Symbol CIN1 CIN2 CIN3 CIN4 CIN5 CIN6 CIN7 COUT Max 25 25 25 19 25 8 25 10 Unit pF pF pF pF pF pF pF pF June 2006 Rev. 3 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs OPERATING CURRENT CHARACTERISTICS (VCC = 3.3V, TA = 0°C to +70°C) WED3DG644V-D1 Version Parameter Operating Current (One bank active) Precharge Standby Current in Power Down Mode Precharge Standby Current in Non-Power Down Mode Symbol ICC1 Conditions Burst Length = 1 tRC ≤ tRC(min) IOL = 0mA CKE ≤ VIL(max), tCC = 10ns CKE & CLK ≤ VIL(max), tCC = ∞ CKE ≥ VIH(min), CS ≥ VIH(min), tcc =10ns Input signals are charged one time during 20 CKE ≥ VIH(min), CLK ≥VIL(max), tCC = ∞ Input signals are stable CKE ≥ VIL(max), tCC = 10ns CKE & CLK ≤ VIL(max), tCC = ∞ CKE ≥ VIH(min), CS ≥ VIH(min), tcc = 10ns Input signals are changed one time during 20ns CKE ≥ VIH(min), CLK ≤ VIL(max), tcc = ∞ Input signals are stable Io = mA Page burst 4 Banks activated tCCD = 2CLK tRC ≥ tRC(min) CKE ≤ 0.2V 133/100 300 Units mA Note 1 ICC2P ICC2PS ICC2N ICC2NS ICC3P ICC3PS ICC3N 4 4 48 mA mA 24 8 8 80 40 mA mA mA Active Standby Current in Power-Down Mode Active Standby Current in Non-Power Down Mode ICC3NS ICC4 Operating Current (Burst mode) 460 360 4 mA mA mA 1 2 Refresh Current Self Refresh Current Notes: 1. Measured with outputs open. 2. Refresh period is 64ms. ICC5 ICC6 June 2006 Rev. 3 4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs AC OPERATING TEST CONDITIONS VCC = 3.3V ± 0.3V, 0 ≤ TA ≤ 70°C Parameter AC input levels (VIH/VIL) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Value 2.4/0.4 1.4 tR/tF = 1/1 1.4 WED3DG644V-D1 Unit V V ns V OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) Parameter Row active to row active delay RAS# to CAS# delay Row precharge time Row active time Row cycle time Last data in to row precharge Last data in to Active delay Last data in to new col. address delay Last data in to burst stop Col. address to col. address delay Number of valid output data Symbol tRRD (min) tRCD (min) tRP (min) tRAS (min) tRAS (max) tRC (min) tRDL (min) tDAL (min) tCDL (min) tBDL (min) tCCD (min) CAS latency=3 CAS latency=2 Version 7.5, 10 15 20 20 45 100 65 2 2 CLK + tRP 1 1 1 2 1 Unit ns ns ns ns us ns CLK — CLK CLK CLK ea 2 2 3 4 1 2 Note 1 1 1 1 Notes : 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and then rounding off to the next higher integer. 2. Minimum delay is required to complete write. 3. All parts allow every cycle column address change. 4. In case of row precharge interrupt, auto precharge and read burst stop. June 2006 Rev. 3 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs ORDERING INFORMATION FOR D1 Part Number WED3DG644V10D1x-xx WED3DG644V7D1x-xx WED3DG644V75D1x-xx Clock Speed 100MHz 133MHz 133MHz CAS Latency CL=2 CL=2 CL=3 WED3DG644V-D1 Height* 27.94 (1.100”) 27.94 (1.100”) 27.94 (1.100”) NOTES: • Consult Factory for availability of RoHS products. (G = RoHS Compliant) • Vendor specific part numbers are used to provide memory components source control. The place holder for this is shown as lower case “-x” in the part numbers above and is to be replaced with the respective vendors code. Consult factory for qualified sourcing options. (M = Micron, S = Samsung & consult factory for others) • Consult factory for availability of industrial temperature (-40°C to 85°C) option PACKAGE DIMENSIONS FOR D1 67.74 (2.667) MAX 3.99 (0.157) 2.01 (0.079) MIN 3.81 (0.150) TYP 19.99 (0.787) WEDC 27.94 (1.100) MAX 3.99 (0.157) MIN 23.19 (0.913) 28.24 (1.112) 32.79 (1.291) 4.60 (0.181) 1.50 (0.059) 3.20 (0.126) MIN 0.99 ± 0.10 (0.039 ± 0.004) * ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES). June 2006 Rev. 3 6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs PART NUMBERING GUIDE WED3DG644V-D1 WED 3 D G 64 4 V xxx D1 x -x G WEDC MEMORY (SDRAM) SDRAM GOLD DEPTH x64 DENSITY 3.3 Volts CLOCK SPEED (MHz) PACKAGE D1 = 144 PIN SO-DIMM INDUSTRIAL TEMP OPTION (For commercial leave "blank" for industrial add "I") COMPONENT VENDOR NAME (M = Micron) (S = Samsung) G = RoHS COMPLIANT (For non-compliant "blank" for RoHS add “G”) June 2006 Rev. 3 7 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs Document Title 32MB – 4Mx64 SDRAM, UNBUFFERED DRAM DIE OPTIONS: • SAMSUNG: K-Die • MICRON: Y14W:G WED3DG644V-D1 Revision History Rev # Rev A Rev 0 Rev 1 Rev 2 History Created Changed from Advanced to Final Updated CAP and IDD specs 2.1 Added RoHS and lead-free notes 2.2 Added vendor source and industrial tem notes 2.3 Added part number matrix Release Date 11-15-01 9-6-02 6-04 1-06 Status Advanced Final Final Final Rev 3 3.1 Updated part number guide 3.2 Updated “ordering information” part number 3.3 Added DRAM die options 6-06 Final June 2006 Rev. 3 8 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com