WED8L24513V12BC

White Electronic Designs Asynchronous SRAM, 3.3V, 512Kx24 FEATURES   512Kx24 bit CMOS Static Random Access Memory Array           Fast Access Times: 10, 12, and 15ns Master Output Enable and Write Control TTL Compatible Inputs and Outputs Fully Static, No Clocks 119 Lead BGA (JEDEC MO-163), No. 391 Small Footprint, 14mmx22mm Multiple Ground Pins for Maximum Noise Immunity WED8L24513V DESCRIPTION The WED8L24513VxxBC is a 3.3V, twelve megabit SRAM constructed with three 512Kx8 die mounted on a multi-layer laminate substrate. With 10 to 15ns access times, x24 width and a 3.3V operating voltage, the WED8L24513V is ideal for creating a single chip memory solution for the Motorola DSP5630x (Figure 7) or a two chip solution for the Analog Devices SHARCTM DSP (Figure 8). The single or dual chip memory solutions offer improved system performance by reducing the length of board traces and the number of board connections compared to using multiple monolithic devices. The JEDEC Standard 119 lead BGA provides a 61% space savings over using three 512Kx8, 400 mil wide SOJs and the BGA package has a maximum height of 110 mils compared to 148 mils for the SOJ packages. Surface Mount Package Single +3.3V (±5%) Supply Operation DSP Memory Solution   Motorola DSP5630x Analog Devices SHARCTM PIN CONFIGURATION A B C D E F G H J K L M N P R T U 1 NC NC I/012 I/013 I/014 I/015 I/016 I/017 NC I/018 I/019 I/020 I/021 I/022 I/023 NC NC 2 AO A5 NC VCC GND VCC GND VCC GND VCC GND VCC GND VCC A18 A9 A13 3 A1 A6 NC GND VCC GND VCC GND VCC GND VCC GND VCC GND NC A10 A14 4 A2 E# NC GND GND GND GND GND GND GND GND GND GND GND NC W# G# 5 A3 A7 NC GND VCC GND VCC GND VCC GND VCC GND VCC GND NC A11 A15 6 A4 A8 NC VCC GND VCC GND VCC GND VCC GND VCC GND VCC A17 A12 A16 7 NC NC I/00 I/01 I/02 I/03 I/04 I/05 NC I/06 I/07 I/08 I/09 I/010 I/011 NC NC A0-18 E# W# G# DQ0-23 VCC GND NC PIN NAMES Address Inputs Chip Enable Master Write Enable Master Output Enable Common Data Input/Output Power (3.3V ±5%) Ground No Connection BLOCK DIAGRAM A0-A18 G# W# E# 19 512K x 24 Memory Array DQ0-7 DQ8-15 DQ16-23 White Electronic Designs Corp. reserves the right to change products or specifications without notice. Aug, 2002 Rev. 0A 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs ABSOLUTE MAXIMUM RATINGS Voltage on any pin relative to VSS Operating Temperature TA (Ambient) Commercial Industrial Storage Temperature Power Dissipation Output Current. -0.5V to 4.6V 0°C to + 70°C -40°C to +85°C -55°C to +125°C 1.5 Watts 50 mA Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Sym VCC VSS VIH VIL WED8L24513V RECOMMENDED DC OPERATING CONDITIONS Min 3.135 0 2.2 -0.3 Typ 3.3 0 --Max 3.465 0 VCC+0.3 0.8 Units V V V V *Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. FIG. 1 Z0 = 50Ω FIG. 2 VCC 319Ω Q RL = 50Ω 65 pF DOUT 353Ω 5 pF AC TEST CONDITIONS Input Pulse Levels Input Rise and Fall Times Input and Output Timing Levels Output Load NOTE: For tEHQZ, tGHQZ and tWLQZ, Figure 2 VSS to 3.0V 5ns 1.5V Figure 1 VL = 1.5V DC ELECTRICAL CHARACTERISTICS Parameter Operating Power Supply Current Standby (TTL) Supply Current Full Standby CMOS Supply Current Input Leakage Current Output Leakage Current Output High Volltage Output Low Voltage Sym ICC1 ICC2 ICC3 ILI ILO VOH VOL Conditions W# = VIL, II/O = 0mA, Min Cycle E# > VIH, VIN < VIL or VIN > VIH, f=ØMHZ E# > VCC-0.2V VIN > VCC-0.2V or VIN < 0.2V VIN = 0V to VCC V I/O = 0V to VCC IOH = -4.0mA IOL = 4.0mA Min Max 10ns 450 150 90 ±10 ±10 2.4 0.4 0.4 12-15ns 350 150 90 ±10 ±10 Units mA mA mA µA µA V V TRUTH TABLE G# X H L X E# H L L L W# X H H L Mode Standby Output Deselect Read Write Output High Z High Z DOUT DIN Power ICC2,ICC3 ICC1 ICC1 ICC1 CAPACITANCE (f = 1.0MHZ, VIN = VCC or VSS) Parameter Address Lines Data Lines Write & Output Enable Lines Chip Enable Lines Sym CA CD/Q W#, G# EØ# - E2# Max 8 10 8 8 Unit pF pF pF pF These parameters are sampled, not 100% tested. White Electronic Designs Corp. reserves the right to change products or specifications without notice. Aug, 2002 Rev. 0A 2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs AC CHARACTERISTICS READ CYCLE Parameter Read Cycle Time Address Access Time Chip Enable Access Time Chip Enable to Output in Low Z (1) Chip Disable to Output in High Z (1) Output Hold from Address Change Output Enable to Output Valid Output Enable to Output in Low Z (1) Output Disable to Output in High Z(1) Symbol JEDEC tAVAV tAVQV tELQV tELQX tEHQZ tAVQX tGLQV tGLQX tGHQZ Alt. tRC tAA tACS tCLZ tCHZ tOH tOE tOLZ tOHZ 10ns Min 10 Max 10 10 3 5 3 5 0 5 0 6 3 6 0 3 6 3 12ns Min 12 Max 12 12 3 15ns Min 15 WED8L24513V Max 15 15 7 7 7 Units ns ns ns ns ns ns ns ns ns NOTE 1: Parameter is guaranteed, but not tested. FIG. 3 READ CYCLE 1 - W# HIGH, G#, E# LOW tAVAV A ADDRESS 1 ADDRESS 2 tAVQV Q tAVQX DATA 1 DATA 2 FIG. 4 READ CYCLE 2 - W# HIGH tAVAV A tAVQV E# tELQV tELQX G# tEHQZ tGLQV tGLQX Q tGHQZ White Electronic Designs Corp. reserves the right to change products or specifications without notice. Aug, 2002 Rev. 0A 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs AC CHARACTERISTICS WRITE CYCLE Parameter Write Cycle Time Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Data Hold Time Write to Output in High Z (1) Data to Write Time Output Active from End of Write (1) Symbol JEDEC tAVAV tELWH tELEH tAVWL tAVEL tAVWH tAVEH tWLWH tWLEH tWHAX tEHAX tWHDX tEHDX tWLQZ tDVWH tDVEH tWHQX Alt. tWC tCW tCW tAS tAS tAW tAW tWP tWP tWR tWR tDH tDH tWHZ tDW tDW tWLZ 10ns Min 10 8 8 0 0 8 8 8 8 0 0 0 0 0 6 6 3 Max 12ns Min 12 9 9 0 0 9 9 10 10 0 0 0 0 0 6 6 3 Max Min 15 9 9 0 0 10 10 11 11 0 0 0 0 0 7 7 3 WED8L24513V 15ns Max Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 5 6 7 NOTE 1: Parameter is guaranteed, but not tested. FIG. 5 WRITE CYCLE 1 - W# CONTROLLED tAVAV A tAVWH tELWH E# tWHAX tAVWL W# tWLWH tDVWH D tWHDX DATA VALID tWLQZ Q HIGH Z tWHQX White Electronic Designs Corp. reserves the right to change products or specifications without notice. Aug, 2002 Rev. 0A 4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs FIG. 6 WRITE CYCLE 2 - E# CONTROLLED WED8L24513V tAVAV A tAVEH tELEH E# tEHAX tAVEL W# tWLEH tDVEH tEHDX D DATA VALID HIGH Z Q ORDERING INFORMATION Commercial (0°C to +70) Part Number WED8L24513V10BC WED8L24513V12BC WED8L24513V15BC Speed (ns) 10 12 15 Package No. 391 391 391 Industrial (-40°C to +85°C) Part Number WED8L24513V12BI WED8L24513V15BI Speed (ns) 12 15 Package No. 391 391 PACKAGE NO. 391 119 LEAD BGA JEDEC MO-163 7.62 (0.300) TYP A B C D E F G 0.110 MAX 14.00 (0.551) TYP R 1.52 (0.062) MAX (4x) A1 CORNER 1.27 (0.050) TYP 20.32 (0.800) TYP H J K L M N P R T U 22.00 (0.866) TYP 1.27 (0.050) TYP 0.711 (0.028) MAX ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES White Electronic Designs Corp. reserves the right to change products or specifications without notice. Aug, 2002 Rev. 0A 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs FIG. 7 INTERFACING THE MOTOROLA DSP5630x DSP FAMILY WITH THE WED8L24513V (512K x 24) WED8L24513V (512K x 24) WED8L24513V A18-0 E# Address Bus A23-0 AA0 AA1 AA2 AA3 W# G# DQ0-23 WED8L24513V (512K x 24) Motorola DSP5630x WR# RD# A18-0 E# W# G# DQ0-23 WED8L24513V Databus D23-0 (512K x 24) A18-0 E# W# G# DQ0-23 Notes: 1. In this example three 512K x 24 external memory arrays are shown, one for X data, one for Y data and one for Program. Specific applications may require one, two, or all three arrays. 2. Any combination of AA0-AA3 may be used as chip selects. However, each chip select may only be used to select one memory array. FIG. 8 INTERFACING THE ANALOG DEVICES 2106XL DSP FAMILY WITH THE WED8L24513V (512K X 24) Address Bus A31-0 WED8L24513V (512K x 24) A18-0 E# W# G# MSX DQ16-23 DQ8-15 DQ0-7 Analog ADSP-2106xL WR# RD# WED8L24513V (512K x 24) A18-0 E# W# G# DQ16-23 DQ8-15 DQ0-7 Databus D47-0 White Electronic Designs Corp. reserves the right to change products or specifications without notice. Aug, 2002 Rev. 0A 6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com