WF4M32-100G2TM5

White Electronic Designs FEATURES n n Packaging: • 66 pin, PGA Type, 1.385" square, Hermetic Ceramic HIP (Package 402). • 68 lead, 40mm Low Profile CQFP ( Package 502 ), 3.5mm (0.140") height. • 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880") square (Package 509) 4.57mm (0.180") height. Designed to fit JEDEC 68 lead 0.990CQFJ footprint (Fig. 3) n Sector Architecture • 32 equal size sectors of 64KBytes per each 2Mx8 chip • Any combination of sectors can be erased. Also supports full chip erase. n Minimum 100,000 Write/Erase Cycles Minimum n Organized as 4Mx32 WF4M32-XXX5 PRELIMINARY* 4MX32 5V FLASH MODULE, SMD 5962-97612 (pending) Access Times of 100, 120, 150ns n User configurable as 8Mx16 or 16Mx8 in HIP and G4T packages. n Commercial, Industrial, and Military Temperature Ranges n 5 Volt Read and Write. 5V ± 10% Supply. n Low Power CMOS n Data Polling and Toggle Bit feature for detection of program or erase cycle completion. n Supports reading or programming data to a sector not being erased. n RESET pin resets internal state machine to the read mode. n Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation, Separate Power and Ground Planes to improve noise immunity *This data sheet describes a product under development, not fully characterized, and is subject to change without notice. Note: For programming information refer to Flash Programming 16M5 Application Note. FIG. 1 1 I/O8 I/O9 I/O10 A14 A16 A11 A0 A18 I/O0 I/O1 I/O2 11 PIN CONFIGURATION FOR WF4M32-XH2X5 TOP VIEW 12 RESET PIN DESCRIPTION I/O 0-31 Data Inputs/Outputs Address Inputs Write Enables Chip Selects Output Enable Power Supply Ground Reset A 0-21 WE CS1-4 OE 23 I/O15 I/O14 I/O13 I/O12 OE A17 WE I/O7 I/O6 I/O5 I/O4 33 I/O24 I/O25 I/O26 A7 A12 A21 A13 A8 I/O16 I/O17 I/O18 34 VCC CS4 NC I/O27 A4 A5 A6 A20 CS3 GND I/O19 44 45 I/O31 I/O30 I/O29 I/O28 A1 A2 A3 56 CS2 GND I/O11 A10 A9 A15 VCC CS1 A19 I/O3 22 VCC GND RESET BLOCK DIAGRAM C S1 A21 C S2 C S3 CS 4 I/O23 I/O22 OE WE I/O21 I/O20 55 66 A0-20 RESET 2M x 8 2M x 8 2Mx 8 2M x 8 2M x 8 2M x 8 2M x 8 2M x 8 I/O0-7 I/O8-15 I/O16-23 I/O24-31 August 2002 Rev. 4 1 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com White Electronic Designs FIG. 2 PIN CONFIGURATION F OR WF4M32-XG4TX5 TOP VIEW NC A0 A1 A2 A3 A4 A5 CS1 GND CS3 WE A6 A7 A8 A9 A10 VCC WF4M32-XXX5 P IN D ESCRIPTION I/O 0-31 Data Inputs/Outputs A0-21 WE CS1-4 Address Inputs Write Enable Chip Selects Output Enable Power Supply Reset Ground Not Connected 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 OE I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31 VCC RESET GND NC BLOCK DIAGRAM C S1 A21 C S2 C S3 CS 4 OE WE A0-20 RESET 2M x 8 2M x 8 2M x 8 2M x 8 BUFFER VCC A11 A12 A13 A14 A15 A16 CS2 OE CS4 A17 A18 A19 A20 RESET NC A21 2M x 8 2M x 8 2M x 8 2M x 8 I/O0-7 I/O8-15 I/O16-23 I/O24-31 FIG. 3 P IN CONFIGURATION FOR WF4M32-XG2TX5 TOP VIEW RESET A0 A1 A2 A3 A4 A5 NC GND NC WE A6 A7 A8 A9 A10 VCC P IN D ESCRIPTION I/O 0-31 Data Inputs/Outputs A 0-20 WE Address Inputs Write Enables Banks Selects Output Enable Power Supply Ground Reset 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 GND I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 I/O16 I/O17 I/O18 I/O19 I/O20 I/O21 I/O22 I/O23 GND I/O24 I/O25 I/O26 I/O27 I/O28 I/O29 I/O30 I/O31 CS1-2 OE The White 68 lead G2T CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2T has the TCE and lead inspection advantage of the CQFP form. CS1 RESET WE OE A0-20 VCC GND RESET BLOCK DIAGRAM 2M x 8 2M x 8 2M x 8 2M x 8 2M x 8 2M x 8 2M x 8 2M x 8 A11 A12 A13 A14 A15 A16 OE CS2 A17 NC NC NC A18 VCC CS1 A19 A20 8 8 8 8 CS2 I/O0-7 I/O8-15 I/O16-23 I/O24-31 Note: CS1& CS2 are used as bank select White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520 2 White Electronic Designs A BSOLUTE MAXIMUM RATINGS Parameter Voltage on Any Pin Relative to VSS Power Dissipation Storage Temperature Short Circuit Output Current Endurance - Write/Erase Cycles (Mil Temp) Data Retention (Mil Temp) Symbol VT PT Tstg IOS Ratings -2.0 to +7.0 8 -65 to +125 100 100,000 min 20 Unit V W °C mA cycles years WF4M32-XXX5 CAPACITANCE (PF) (TA = +25°C, VIN = O V, F = 1.0MH Z ) Parameter OE capacitance WE capacitance CS capacitance Data I/O capacitance Address input capacitance Symbol HIP (H2) CQFP (G2T) CQFP( G4T) COE CWE CCS CI/O CAD 75 75 20 30 75 75 75 50 30 75 20 20 20 30 20 This parameter is guaranteed by design but not tested. RECOMMENDED DC OPERATING CONDITIONS Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Operating Temperature (Mil.) Operating Temperature (Ind.) Symbol V CC VSS VIH V IL TA TA Min 4.5 0 2.0 -0.5 -55 -40 Typ 5.0 0 Max 5.5 0 V CC + 0.5 +0.8 +125 +85 Unit V V V V °C °C DC CHARACTERISTICS - CMOS COMPATIBLE (VCC = 5.0V, GND = 0V, TA = -55°C TO +125°C) Parameter Input Leakage Current Output Leakage Current VCC Active Current for Read (1) VCC Active Current for Program or Erase (2) VCC Standby Current Output Low Voltage Output High Voltage Low VCC Lock-Out Voltage Symbol I LI I LOx32 I CC1 I CC2 I CC3 VOL VOH VLKO Conditions VCC = 5.5, VIN = GND to VCC VCC = 5.5, VIN = GND to VCC CS = VIL, OE = VIH, f = 5MHz CS = VIL, OE = VIH VCC = 5.5, CS = VIH, f = 5MHz, RESET = VIH IOL = 12.0 mA, VCC = 4.5 IOH = -2.5 mA, VCC = 4.5 0.85 x Vcc 3.2 4.2 Min HIP Max 10 10 320 420 20 0.45 0.85 x Vcc 3.2 4.2 Min G2T Max 10 10 215 295 2.0 0.45 0.85 x Vcc 3.2 4.2 G4T Min Max 10 10 345 445 95 0.45 Unit µA µA mA mA mA V V V NOTES: 1. The Icc current listed includes both the DC operating current and the frequency dependent component (@ 5MHz). The frequency component typically is less than 2mA/MHz, with OE at VIH. 2. Icc active while Embedded Algorithm (program or erase) is in progress. 3. DC test conditions V IL = 0 .3V, V IH = V CC - 0 .3V HIP = 66 pin, PGA Type, 1.385" square, Hermetic Ceramic HIP (Package 402). G2T = 68 lead, Hermetic CQFP (G2T), 22.4mm (0.880") square. Designed to fit JEDEC 68 lead 0.990" CQFJ footprint (Fig. 3) (Package 509) G4T = 68 lead, 40mm Low Profile CQFP, 3.5mm (0.140") (Package 502 ) 3 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com White Electronic Designs Parameter Write Cycle Time Chip Select Setup Time Write Enable Pulse Width Address Setup Time Data Setup Time Data Hold Time Address Hold Time Write Enable Pulse Width High Duration of Byte Programming Operation (1) Sector Erase (2) Read Recovery Time before Write V CC S etup Time Chip Programming Time Chip Erase Time (3) Output Enable Hold Time (4) RESET Pulse Width tOEH tRP 10 500 Symbol Min tAVAV tELWL tWLWH tAVWL tDVWH tWHDX t WLAX tWHWL tWHWH1 tWHWH2 t GH W L t VCS 0 50 44 256 10 500 tWC tCS tWP tAS tDS tDH tAH tWPH 100 0 45 0 45 0 45 20 300 15 0 50 -100 Max Min 120 0 50 0 50 0 50 20 -120 WF4M32-XXX5 AC CHARACTERISTICS FOR G2T PACKAGE – WRITE/ERASE/PROGRAM OPERATIONS - WE CONTROLLED (VCC = 5.0V, TA = -55°C TO +125°C) -150 Max Min 150 0 50 0 50 0 50 20 300 15 0 50 44 256 10 500 44 256 300 15 Max ns ns ns ns ns ns ns ns µs sec µs µs sec sec ns ns Unit NOTES: 1. Typical value for tWHWH1 is 7µs. 2. Typical value for tWHWH2 is 1sec. 3. Typical value for Chip Erase Time is 32sec. 4. For Toggle and Data Polling. AC CHARACTERISTICS FOR G2T PACKAGE – READ-ONLY OPERATIONS (VCC = 5.0V, TA = -55°C TO +125°C) Parameter Read Cycle Time Address Access Time Chip Select Access Time O utput Enable to Output Valid Chip Select High to Output High Z (1) Output Enable High to Output High Z (1) Output Hold from Addresses, CS or OE Change, whichever is First RST Low to Read Mode (1) Symbol Min t AVAV t AVQV t ELQV t GLQV t EHQZ t GHQZ t AXQX t RC tACC t CE tOE t DF t DF tOH t Ready 0 20 100 100 100 40 20 20 0 20 -100 Max Min 120 120 120 50 30 30 0 20 -120 Max Min 150 150 150 55 35 35 -150 Max ns ns ns ns ns ns ns µs Unit 1. Guaranteed by design, not tested. White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520 4 White Electronic Designs WF4M32-XXX5 AC CHARACTERISTICS FOR G2T PACKAGE – WRITE/ERASE/PROGRAM OPERATIONS,CS CONTROLLED (VCC = 5.0V, GND = 0V, TA = -55°C TO +125°C) Parameter Write Cycle Time Write Enable Setup Time Chip Select Pulse Width Address Setup Time Data Setup Time Data Hold Time Address Hold Time Chip Select Pulse Width High Duration of Byte Programming Operation (1) Sector Erase Time (2) Read Recovery Time Chip Programming Time Chip Erase Time (3) Output Enable Hold Time (4) tOEH 10 Symbol Min tAVAV tWLEL tELEH tAVEL tDVEH tEHDX tELAX tEHEL t WHWH1 t WHWH2 tGHEL 0 44 256 10 tWC tWS tCP tAS tDS tDH tAH tCPH 100 0 45 0 45 0 45 20 300 15 0 44 256 10 -100 Max Min 120 0 50 0 50 0 50 20 300 15 0 44 256 -120 Max Min 150 0 50 0 50 0 50 20 300 15 -150 Max ns ns ns ns ns ns ns ns µs sec µs sec sec ns Unit NOTES: 1. Typical value for tWHWH1 is 7µs. 2. Typical value for tWHWH2 is 1sec. 3. Typical value for Chip Erase Time is 32sec. 4. For Toggle and Data Polling. 5 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com White Electronic Designs WF4M32-XXX5 AC CHARACTERISTICS FOR G4T A ND H2 PACKAGES – WRITE/ERASE/P ROGRAM OPERATIONS - WE CONTROLLED (VCC = 5.0V, TA = -55°C TO +125°C) Parameter Write Cycle Time Chip Select Setup Time Write Enable Pulse Width Address Setup Time Data Setup Time Data Hold Time Address Hold Time (1) Write Enable Pulse Width High (2) Duration of Byte Programming Operation (3) Sector Erase (4) Read Recovery Time before Write V CC S etup Time Chip Programming Time Chip Erase Time (5) Output Enable Hold Time (6) RESET Pulse Width tOEH tRP 10 500 Symbol Min tAVAV t ELWL tWLWH t AVWL tDVWH tWHDX t WLAX tWHWL t WHWH1 t WHWH2 t GH W L t VCS 0 50 44 256 10 500 tWC tCS tWP tAS tDS tDH tAH tWPH 100 0 45 0 45 15 45 20 300 15 0 50 44 256 10 500 -100 Max Min 120 0 50 0 50 15 50 20 300 15 0 50 44 256 -120 Max Min 150 0 50 0 50 15 50 20 300 15 -150 Max ns ns ns ns ns ns ns ns µs sec µs µs sec sec ns ns Unit NOTES: 1. A21 must be held constant until WE or CS go high, whichever occurs first. 2. Guaranteed by design, but not tested. 3. Typical value for tWHWH1 is 7µs. 4. Typical value for tWHWH2 is 1sec. 5. Typical value for Chip Erase Time is 32sec. 6. For Toggle and Data Polling. AC CHARACTERISTICS FOR G4T AND H2 PACKAGES – READ-ONLY OPERATIONS (VCC = 5.0V, TA = -55°C TO +125°C) Parameter Read Cycle Time Address Access Time Chip Select Access Time Output Enable to Output Valid Chip Select High to Output High Z Output Enable High to Output High Z Output Hold from Addresses, CS or OE Change, whichever is First RST Low to Read Mode Symbol Min tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ tAXQX tRC tACC tCE tOE tDF tDF tOH tReady 0 20 100 100 100 50 40 40 0 20 -100 Max Min 120 120 120 50 45 45 0 20 -120 Max Min 150 150 150 55 45 45 -150 Max ns ns ns ns ns ns ns µs Unit White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520 6 White Electronic Designs WF4M32-XXX5 AC CHARACTERISTICS FOR G4T A ND H2 P ACKAGES – WRITE/ERASE/PROGRAM OPERATIONS,CS CONTROLLED (VCC = 5.0V, GND = 0V, TA = -55°C TO +125°C) Parameter Write Cycle Time Write Enable Setup Time Chip Select Pulse Width Address Setup Time Data Setup Time Data Hold Time Address Hold Time (1) Chip Select Pulse Width High Duration of Byte Programming Operation (2) Sector Erase Time (3) Read Recovery Time Chip Programming Time Chip Erase Time (4) Output Enable Hold Time (5) tOEH 10 Symbol Min tAVAV t WLEL tELEH tAVEL tDVEH tEHDX t ELAX tEHEL tWHWH1 tWHWH2 tGHEL 0 44 256 10 tWC tWS tCP tAS tDS tDH tAH tCPH 100 0 45 0 45 15 45 20 300 15 0 44 256 10 -100 Max Min 120 0 50 0 50 15 50 20 300 15 0 44 256 -120 Max Min 150 0 50 0 50 15 50 20 300 15 -150 Max ns ns ns ns ns ns ns ns µs sec µs sec sec ns Unit NOTES: 1. A21 must be held constant until WE or CS go high, whichever occurs first. 2. Typical value for tWHWH1 is 7µs. 3. Typical value for tWHWH2 is 1sec. 4. Typical value for Chip Erase Time is 32sec. 5. For Toggle and Data Polling. FIG. 4 AC TEST CIRCUIT Parameter AC TEST CONDITIONS Typ Unit Input Pulse Levels Input Rise and Fall Input and Output Reference Level VIL = 0, VIH = 3.0 5 1.5 V ns V Output Timing Reference Level 1.5 V Notes: VZ is programmable from -2V to +7V. IOL & IOH programmable from 0 to 16mA. Tester Impedance Z0 = 75W. VZ is typically the midpoint of VOH and VOL. IOL & IOH are adjusted to simulate a typical resistive load circuit. ATE tester includes jig capacitance. FIG. 5 RESET T IMING DIAGRAM RESET tRP tReady 7 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com White Electronic Designs FIG. 6 AC WAVEFORMS F OR READ OPERATIONS WF4M32-XXX5 White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520 8 White Electronic Designs FIG. 7 WRITE/ERASE/PROGRAM OPERATION, WE C ONTROLLED WF4M32-XXX5 NOTES: 1. PA is the address of the memory location to be programmed. 2. PD is the data to be programmed at byte address. 3. D 7 i s the output of the complement of the data written to each chip. 4. D OUT i s the output of the data written to the device. 5. Figure indicates last two bus cycles of four bus cycle sequence. 9 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com White Electronic Designs FIG. 8 AC W AVEFORMS C HIP/SECTOR E RASE OPERATIONS WF4M32-XXX5 NOTE: 1. SA is the sector address for Sector Erase. White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520 10 White Electronic Designs WF4M32-XXX5 FIG. 9 AC WAVEFORMS FOR DATA POLLING DURING EMBEDDED A LGORITHM OPERATIONS t DF t OH High Z D7 = Valid Data t CH tOEH tCE tWHWH 1 or 2 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com t OE WE OE CS 11 Data D0-D6 D7 D0-D6 = Invalid D7 D0-D7 Valid Data White Electronic Designs FIG. 10 A LTERNATE CS C ONTROLLED PROGRAMMING O PERATION TIMINGS WF4M32-XXX5 Notes: 1. PA represents the address of the memory location to be programmed. 2. PD represents the data to be programmed at byte address. 3. D 7 i s the output of the complement of the data written to each chip. 4. D OUT i s the output of the data written to the device. 5. Figure indicates the last two bus cycles of a four bus cycle sequence. White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520 12 White Electronic Designs PACKAGE 402: 66 PIN , PGA TYPE , CERAMIC HEX-IN-LINE PACKAGE, H IP (H2) WF4M32-XXX5 ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES P ACKAGE 502: 68 L EAD, CERAMIC QUAD F LAT PACK , LOW PROFILE CQFP (G4T) ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETIC ALLY IN INCHES 13 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com White Electronic Designs P ACKAGE 509: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2T) WF4M32-XXX5 The White 68 lead G2T CQFP fills the same fit and function as the JEDEC 68 lead CQFJ or 68 PLCC. But the G2T has the TCE and lead inspection advantage of the CQFP form. ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520 14 White Electronic Designs ORDERING INFORMATION WF4M32-XXX5 W F 4M32 - XXX X X 5 X LEAD FINISH: Blank = Gold plated leads A = Solder dip leads V PP P ROGRAMMING VOLTAGE 5=5V DEVICE GRADE: M =Military Screened I =Industrial C =Commercial PACKAGE TYPE: -55°C to +125°C -40°C to +85°C 0°C to +70°C H 2 =Ceramic Hex In line Package, HIP (Package 402) G4T = 40mm Low Profile CQFP (Package 502) G2T = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 509) ACCESS TIME (ns) ORGANIZATION, 4M x 32 User configurable as 8M x 16 or 16M x 8 in HIP and G4T packages FLASH WHITE ELECTRONIC DESIGNS CORP. DEVICE TYPE SECTOR SIZE S P E E D 64KByte 64KByte 64KByte 64KByte 64KByte 64KByte 64KByte 64KByte 64KByte 150ns 120ns 100ns 150ns 120ns 100ns 150ns 120ns 100ns PACKAGE 66 pin HIP (H2) 66 pin HIP (H2) 66 pin HIP (H2) 68 lead CQFP Low Profile (G4T) 68 lead CQFP Low Profile (G4T) 68 lead CQFP Low Profile (G4T) 68 lead CQFP Low Profile (G2T) 68 lead CQFP Low Profile (G2T) 68 lead CQFP Low Profile (G2T) SMD NO. 5962-97612 01HXX* 5962-97612 02HXX* 5962-97612 03HXX* 5962-97612 01HXX* 5962-97612 02HXX* 5962-97612 03HXX* 5962-97612 01HXX* 5962-97612 02HXX* 5962-97612 03HXX* *Pending 4M x 32 5V Flash Module 4M x 32 5V Flash Module 4M x 32 5V Flash Module 4M x 32 5V Flash Module 4M x 32 5V Flash Module 4M x 32 5V Flash Module 4M x 32 5V Flash Module 4M x 32 5V Flash Module 4M x 32 5V Flash Module 15 White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com