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WV3DG64127V75D2

WV3DG64127V75D2

  • 厂商:

    WEDC

  • 封装:

  • 描述:

    WV3DG64127V75D2 - 1GB - 2x64Mx64, SDRAM UNBUFFERED - White Electronic Designs Corporation

  • 数据手册
  • 价格&库存
WV3DG64127V75D2 数据手册
White Electronic Designs 1GB – 2x64Mx64, SDRAM UNBUFFERED FEATURES PC100 and PC133 compatible Burst Mode Operation Auto and Self Refresh capability LVTTL compatible inputs and outputs Serial Presence Detect with EEPROM Fully synchronous: All signals are registered on the positive edge of the system clock Programmable Burst Lengths: 1, 2, 4, 8 or Full Page 3.3V ± 0.3V Power Supply 168 Pin DIMM • PCB: 29.41mm (1.158") WV3DG64127V-D2 ADVANCED* DESCRIPTION The WV3DG64127V is a 2x64Mx64 synchronous DRAM module which consists of sixteen stacked 64Mx8 bit with 4 banks SDRAM components in TSOP II package and one 2K EEPROM which are mounted on a 168 Pin DIMM multilayer FR4 Substrate. * This product is under development, is not qualified or characterized and is subject to change or cancellation without notice. NOTE: Consult factory for availability of: • Lead-free products • Vendor source control option • Industrial temperature option PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE) Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Front VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 DQ8 VSS DQ9 DQ10 DQ11 DQ12 DQ13 VCC DQ14 DQ15 CBO CB1 Vss NC NC VCC WE# DQM0 Pin 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 Front DQM1 CS0# DNU VSS A0 A2 A4 A6 A8 A10/AP BA1 VCC VCC CLK0 VSS DNU CS2# DQM2 DQM3 DNU VCC NC NC CB2 CB3 VSS DQ16 DQ17 Pin 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 Front DQ18 DQ19 VCC DQ20 NC NC CKE1 VSS DQ21 DQ22 DQ23 VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS CLK2 NC NC SDA SCL VCC Pin 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 Back VSS DQ32 DQ33 DQ34 DQ35 VCC DQ36 DQ37 DQ38 DQ39 DQ40 VSS DQ41 DQ42 DQ43 DQ44 DQ45 VCC DQ46 DQ47 CB4 CB5 VSS NC NC VCC CAS# DQM4 Pin 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 Back DQM5 CS1# RAS# VSS A1 A3 A5 A7 A9 BA0 A11 VCC CLK1 A12 VSS CKE0 CS3# DQM6 DQM7 NC VCC NC NC CB6 CB7 VSS DQ48 DQ49 Pin 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 Back DQ50 DQ51 VCC DQ52 NC NC DNU VSS DQ53 DQ54 DQ55 VSS DQ56 DQ57 DQ58 DQ59 VCC DQ60 DQ61 DQ62 DQ63 VSS CLK3 NC SA0 SA1 SA2 VCC PIN NAMES A0 – A12 BA0-1 DQ0-63 CLK0-CLK3 CKE0, CKE1 CS0# - CS3# RAS# CAS# WE# DQM0-7 VCC VSS SDA SCL DNU NC Address input (Multiplexed) Select Bank Data Input/Output Clock input Clock Enable input Chip select Input Row Address Strobe Column Address Strobe Write Enable DQM Power Supply Ground Serial data I/O Serial clock Do not use No Connect White Electronic Designs Corp. reserves the right to change products or specifications without notice. April 2005 Rev. 0 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs FUNCTIONAL BLOCK DIAGRAM CS1# CS0# DQM0 WV3DG64127V-D2 ADVANCED* DQM4 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQM1 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQM5 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 CS3# CS2# DQM2 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM6 DQM DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQM3 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQM7 DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# DQM DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 CS# A0 ~ A12, BA0 & 1 RAS# CAS# WE# CKE0 SDRAM SDRAM SCL SDA A0 A1 A2 VCC SDRAM SDRAM SDRAM 10K Ω SA0 SA1 SA2 CKE1 10Ω DQn VCC Two 0.1uF Capacitors per each SDRAM Vss To all SDRAMs SDRAM SDRAM 10Ω CK0/1/2/3 Every DQpin of SDRAM SDRAM SDRAM SDRAM White Electronic Designs Corp. reserves the right to change products or specifications without notice. April 2005 Rev. 0 2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to VSS Voltage on VCC supply relative to VSS Storage Temperature Power Dissipation Short Circuit Current Symbol VIN, VOUT VCC, VCCQ TSTG PD IOS WV3DG64127V-D2 ADVANCED* Value -1.0 ~ 4.6 -1.0 ~ 4.6 -55 ~ +150 32 50 Units V V °C W mA Note: Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. RECOMMENDED DC OPERATING CONDITIONS Voltage Referenced to: VSS = 0V, 0°C ≤ TA ≤ +70°C Parameter Supply Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Leakage Current Symbol VCC VIH VIL VOH VOL ILI Min 3.0 2.0 -0.3 2.4 — -10 Typ 3.3 3.0 — — — — Max 3.6 VCCQ+0.3 0.8 — 0.4 10 Unit V V V V V µA 1 2 IOH = -2mA IOL = -2mA 3 Note Note: 1. VIH (max)= 5.6V AC. The overshoot voltage duration is ≤ 3ns. 2. VIL (min)= -2.0V AC. The undershoot voltage duration is ≤ 3ns. 3. Any input 0V ≤ VIN ≤ VCC Input leakage currents include Hi-Z output leakage for all bi-directional buffers with Tri-State outputs. CAPACITANCE TA = 25°C, f = 1MHz, VCC = 3.3V, VREF=1.4V ± 200mV Parameter Input Capacitance (A0-A12) Input Capacitance (RAS#,CAS#,WE#) Input Capacitance (CKE0-CKE1) Input Capacitance (CK0-CK3) Input Capacitance (CS0#-CS3#) Input Capacitance (DQM0-DQM7) Input Capacitance (BA0-BA1) Data input/output capacitance (DQ0-DQ63) Symbol CIN1 CIN2 CIN3 CIN4 CIN5 CIN6 CIN7 COUT Max 150 150 80 45 45 30 150 30 Unit pF pF pF pF pF pF pF pF White Electronic Designs Corp. reserves the right to change products or specifications without notice. April 2005 Rev. 0 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs IDD SPECIFICATIONS AND CONDITIONS VCC, VCCQ = +3.3V ±0.3V; SDRAM component values only WV3DG64127V-D2 ADVANCED* Version Parameter Operating current (One bank active) Precharge standby current in power-down mode Symbol ICC1 ICC2P ICC2PS ICC2N ICC2NS ICC3P ICC3PS ICC3N ICC3NS Test Condition 7 Burst length = 1, tRC ≥ tRC(min), IO = 0 mA CKE ≤ VIL(max), tCC = 10ns CKE & CLK ≥ VIL(max), tCC = ∞ CKE ≥ VIH(min), CS# ≥ VIH(min), tCC = 10ns Input signals are changed one time during 20ns CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞ Input signals are stable CKE ≤ VIL(max), tCC = 10ns CKE & CLK ≤ VIL(max), tCC = ∞ CKE ≥ VIH(min), CS# ≥ VIH(min), tCC = 10ns Input signals are changed one time during 20ns CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞ Input signals are stable IO = 0 mA Page burst 4banks Activated. tCCD = 2CLKs tRC ≥ tRC(min) CKE ≤ 0.2V C 2080 75 1920 64 64 640 320 200 200 960 800 mA mA mA mA 10 1920 mA mA 1 Unit Note Precharge standby current in non power-down mode Active standby current in power-down mode Active standby current in non power-down mode (One bank active) Operating current (Burst mode) Refresh current Self refresh current ICC4 2240 2240 2080 mA 1 ICC5 ICC6 4000 3680 96 3520 mA mA 2 Notes: 1. Measured with outputs open. 2. Refresh period is 64ms. 3. Unless otherwise noted, input swing is CMOS (VIH/VIL = VCCQ/VJSQ) White Electronic Designs Corp. reserves the right to change products or specifications without notice. April 2005 Rev. 0 4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs AC OPERATING TEST CONDITIONS VCC, VCCQ = +3.3v ±0.3V, 0°C - 70°C Parameter AC input levels (VIH/VIL) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition Value 2.4/0.4 1.4 tR/tF = 1/1 1.4 See Fig. 2 WV3DG64127V-D2 ADVANCED* Unit V V ns V DC OUTPUT LOAD CIRCUIT 3.3V AC OUTPUT LOAD CIRCUIT Vtt = 1.4V 1200Ω Output 870Ω 50pF VOH (DC) = 2.4V, IOH = -2mA VOL (DC) = 0.4V, IOL = 2mA 50Ω Output Z0 = 50Ω 50pF OPERATING AC PARAMETER VCC, VCCQ = +3.3v ±0.3V, 0°C - 70°C) Parameter Row active to row active delay RAS# to CAS# delay Row precharge time Row active time Row cycle time Last data in to row precharge Last data in to Active delay Last data in to new col. address delay Last data in to burst stop Col. address to col. address delay Number of valid output data Symbol tRRD(min) tRCD(min) tRP(min) tRAS(min) tRAS(max) tRC(min) tRDL(min) tDAL(min) tCDL(min) tBDL(min) tCCD(min) CAS latency=3 CAS latency=2 7 15 15 15 45 60 Version 75 15 20 20 45 100 65 2 2 CLK + tRP 1 1 1 2 1 Unit 10 20 20 20 50 70 ns ns ns ns us ns CLK — CLK CLK CLK ea Note 1 1 1 1 1 2 2 2 3 4 Notes: 1. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and then rounding off to the next higher integer. 2. Minimum delay is required to complete write. 3. All parts allow every cycle column address change. 4. In case of row precharge interrupt, auto precharge and read burst stop. White Electronic Designs Corp. reserves the right to change products or specifications without notice. April 2005 Rev. 0 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs OPERATING AC PARAMETERS VCC, VCCQ = +3.3v ±0.3V, 0°C - 70°C 7 Parameter CAS latency=3 CAS latency=2 CAS latency=3 CAS latency=2 CAS latency=3 CAS latency=2 Symbol Min CLK cycle time tCC 7.5 7.5 Max 1000 5.4 5.4 3 3 2.5 2.5 1.5 0.8 1 5.4 5.4 3 3 2.5 2.5 1.5 0.8 1 Min 7.5 10 75 WV3DG64127V-D2 ADVANCED* 10 Unit Max 1000 5.4 6 3 3 3 3 2 1 1 5.4 6 6 6 Min 10 10 Max 1000 6 6 ns 1 Note CLK to valid output delay tSAC ns 1, 2 Output data hold time CLK high pulse width CLK low pulse width Input setup time Input hold time CLK to output in Low-Z CLK to outpu in Hi-Z tOH tCH tCL tSS tSH tSLZ ns ns ns ns ns ns ns 2 3 3 3 3 2 CAS latency=3 CAS latency=2 tSHZ Notes : 1. Parameters depend on programmed CAS latency. 2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter. 3. Assumed input rise and fall time (tr & tf) = 1ns. If tr & tf is longer than 1ns, transient time compensation should be considered, i.e., [(tr + tf)/2-1]ns should be added to the parameter. White Electronic Designs Corp. reserves the right to change products or specifications without notice. April 2005 Rev. 0 6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs ORDERING INFORMATION Part Number WV3DG64127V10D2 WV3DG64127V7D2 WV3DG64127V75D2 Speed 100MHz 133MHz 133MHz CAS Latency CL=2 CL=2 CL=3 WV3DG64127V-D2 ADVANCED* Height* 29.41 (1.158") 29.41 (1.158") 29.41 (1.158") NOTES: • Consult Factory for availability of Lead-Free products. (F = Lead-Free, G = RoHS Compliant) • Vendor specific part numbers are used to provide memory components source control. The place holder for this is shown as lower case “x” in the part numbers above and is to be replaced with the respective vendors code. Consult factory for qualified sourcing options. (M = Micron, S = Samsung & consult factory for others) • Consult factory for availability of industrial temperature (-40°C to 85°C) option PACKAGE DIMENSIONS 133.350 (5.250) 127.350 (5.014) R 2.00 (R 0.079) 4.00 ±0.100 (0.157 ±0.004) 3.000 (0.118) 6.85 (0.270) MAX 29.413 (1.158) 17.780 (0.700) 4.00 (0.157) MIN 3.000DIA ±0.100 (0.118DIA ± 0.004) 8.890 (0.350) 6.350 (0.250) 11.43 (0.45) 6.350 (0.250) 2.540 (0.100) MIN 54.61 (2.150) 1.270 ±0.10 (0.050 ±0.0039) 36.830 (1.450) 115.57 (4.550) *ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES) White Electronic Designs Corp. reserves the right to change products or specifications without notice. April 2005 Rev. 0 7 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs Document Title 1GB - 2x64Mx64, SDRAM UNBUFFERED WV3DG64127V-D2 ADVANCED* Revision History Rev # Rev 0 History Created Release Date 4-05 Status Advanced White Electronic Designs Corp. reserves the right to change products or specifications without notice. April 2005 Rev. 0 8 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
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