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W24257S-70L

W24257S-70L

  • 厂商:

    WINBOND(华邦)

  • 封装:

  • 描述:

    W24257S-70L - 32K X 8 CMOS STATIC RAM - Winbond

  • 数据手册
  • 价格&库存
W24257S-70L 数据手册
W24257 32K × 8 CMOS STATIC RAM GENERAL DESCRIPTION The W24257 is a slow speed, low power CMOS static RAM organized as 32768 × 8 bits that operates on a single 5-volt power supply. This device is manufactured using Winbond's high performance CMOS technology. FEATURES • Low power consumption: − Active: 325 mW (max.) − Standby: 75 µW (max.) (LL-version) 150 µW (max.) (L-version) • Access time: 70 nS (max.) • Single +5V power supply • Fully static operation • • All inputs and outputs directly TTL compatible Three-state outputs • Battery back-up operation capability • Data retention voltage: 2V (min.) • Packaged in 28-pin 330 mil SOP, standard type one TSOP (8 mm x 13.4 mm ) PIN CONFIGURATIONS BLOCK DIAGRAM V DD A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 V SS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 V DD #WE A13 A8 A9 A11 #OE A10 #CS I/O8 I/O7 I/O6 I/O5 I/O4 V SS A0 . . A14 DECODER CORE ARRAY 28-pin SOP 23 22 21 20 19 18 17 16 15 #CS #OE #WE CONTROL DATA I/O I/O1 . . I/O8 #OE A11 A9 A8 A13 #WE V DD A14 A12 A7 A6 A5 A4 A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28-pin TSOP 28 27 26 25 24 23 22 21 20 19 18 17 16 15 A10 #CS I/O 8 I/O 7 I/O 6 I/O 5 I/O 4 V SS I/O 3 I/O 2 I/O 1 A0 A1 A2 PIN DESCRIPTION SYMBOL A0−A14 I/O1−I/O8 #CS #WE #OE VDD VSS DESCRIPTION Address Inputs Data Inputs/Outputs Chip Select Input Write Enable Input Output Enable Input Power Supply Ground -1- Publication Release Date: February 2001 Revision A16 W24257 TRUTH TABLE #CS H L L L #OE X H L X #WE X H H L MODE Not Selected Output Disable Read Write I/O1− I/O8 High Z High Z Data Out Data In VDD CURRENT ISB, ISB1 IDD IDD IDD DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER Supply Voltage to VSS Potential Input/Output to VSS Potential Allowable Power Dissipation Storage Temperature Operating Temperature RATING -0.5 to +7.0 -0.5 to VDD +0.5 1.0 -65 to +150 0 to +70 UNIT V V W °C °C Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. Operating Characteristics (VDD = 5V ±10%, VSS = 0V, TA = 0 to 70° C for LL/L; -20 to 85° C for LE) PARAMETER Input Low Voltage Input High Voltage Input Leakage Current Output Leakage Current Output Low Voltage Output High Voltage Operating Power Supply Current Standby Power Supply Current SYM. VIL VIH ILI ILO TEST CONDITIONS VIN = VSS to VDD VI/O = VSS to VDD, #CS = VIH (min.) or #OE = VIH (min.) or #WE = VIL (max.) IOL = +4.0 mA IOH = -1.0 mA #CS = VIL (min.), I/O = 0 mA Cycle = min., Duty = 100% #CS = VIH (min.) Cycle = min., Duty = 100% #CS ≥ VDD -0.2V LL/LE L MIN. -0.5 +2.2 -2 -2 TYP. - MAX. +0.8 VDD +0.5 +2 +2 UNIT V V µA µA VOL VOH IDD 2.4 - - 0.4 70 V V mA ISB ISB1 - - 3 15 30 mA µA µA Note: Typical characteristics are at VDD = 5V, TA = 25° C. -2- W24257 CAPACITANCE (VDD = 5V, TA = 25° C, f = 1 MHz) PARAMETER Input Capacitance Input/Output Capacitance SYM. CIN CI/O CONDITIONS VIN = 0V VOUT = 0V MAX. 6 8 UNIT pF pF Note: These parameters are sampled but not 100% tested. AC CHARACTERISTICS AC Test Conditions PARAMETER Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Level Output Load 0.6V to 2.4V 5 nS 1.5V CL = 100 pF, IOH/IOL = -1 mA/4 mA CONDITIONS AC Test Loads and Waveform R1 1000 ohm R1 1000 ohm 5V OUTPUT 100 pF Including Jig and Scope R2 660 ohm 5V OUTPUT 5 pF Including Jig and Scope R2 660 ohm (For TCLZ, TOLZ, TCHZ, TOHZ , TWHZ , TOW) 3.0V 90% 10% 5 nS 90% 10% 5 nS 0V -3- Publication Release Date: February 2001 Revision A16 W24257 AC Characteristics, continued (VDD = 5V ±10%, VSS = 0V, TA = 0 to 70° C for LL/L; -20 to 85° C for LE) Read Cycle PARAMETER SYMBOL W24257-70 MIN. Read Cycle Time Address Access Time Chip Select Access Time Output Enable to Output Valid Chip Selection to Output in Low Z Output Enable to Output in Low Z Chip Deselection to Output in High Z Output Disable to Output in High Z Output Hold from Address Change ∗ These parameters are sampled but not 100% tested TRC TAA TACS TAOE TCLZ* TOLZ* TCHZ* TOHZ* TOH 70 10 5 10 MAX. 70 70 35 30 30 nS nS nS nS nS nS nS nS nS UNIT Write Cycle PARAMETER SYMBOL W24257-70 MIN. Write Cycle Time Chip Selection to End of Write Address Valid to End of Write Address Setup Time Write Pulse Width Write Recovery Time Data Valid to End of Write Data Hold from End of Write Write to Output in High Z Output Disable to Output in High Z Output Active from End of Write ∗ These parameters are sampled but not 100% tested #CS, #WE TWC TCW TAW TAS TWP TWR TDW TDH TWHZ* TOHZ* TOW 70 60 60 0 45 0 30 0 0 MAX. 30 30 nS nS nS nS nS nS nS nS nS nS nS UNIT -4- W24257 TIMING WAVEFORMS Read Cycle 1 (Address Controlled) TRC Address TOH DOUT TAA TOH Read Cycle 2 (Chip Select Controlled) # CS TACS TCHZ TCLZ D OUT Read Cycle 3 (Output Enable Controlled) T RC A ddress T AA #OE T AOE #CS T OLZ TOH T ACS D OUT T CLZ T OHZ T CHZ -5- Publication Release Date: February 2001 Revision A16 W24257 Timing Waveforms, continued Write Cycle 1 TW C A ddress TW R #OE TC W #CS TA W #WE TAS TO H Z D OUT TD W D IN TD H TWP (1, 4) Write Cycle 2 ( OE = VIL Fixed) T WC A ddress TC W #CS TA W #WE TA S TWP TW H Z D OUT (1, 4) TO H (2) TO W (3) TW R TD W D IN TD H Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2. The data output from DOUT are the same as the data written to DIN during the write cycle. 3. DOUT provides the read data for the next address. 4. Transition is measured ±500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested. -6- W24257 DATA RETENTION CHARACTERISTICS (TA = 0 to 70° C for LL/L; -20 to 85° C for LE ) PARAMETER VDD for Data Retention Data Retention Current SYM. VDR TEST CONDITIONS #CS ≥ VDD -0.2V VDD = 3V L MIN. TYP. MAX. UNIT 2.0 0 TRC* 15 30 V µA µA nS nS IDDDR #CS ≥ VDD -0.2V LL/LE TCDR TR See data retention Waveform Chip Deselect to Data Retention Time Operation Recovery Time TRC* = Read Cycle Time DATA RETENTION WAVEFORM DATA RETENTION MODE V DD 4 .5V TC D R #CS V IH #CS1 > V D D -0.2V = V D R > 2V = 4.5V TR V IH ORDERING INFORMATION PART NO. ACCESS OPERATING CURRENT TIME (nS) MAX. (mA) 70 70 70 70 70 70 70 70 70 70 70 70 STANDBY CURRENT MAX. (µA) 15 30 15 15 30 15 OPERATING TEMP. (°C) 0 to 70 0 to 70 -20 to 85 0 to 70 0 to 70 -20 to 85 PACKAGE W24257S-70LL W24257S-70L W24257S-70LE W24257Q-70LL W24257Q-70L W24257Q-70LE 330 mil SOP 330 mil SOP 330 mil SOP Standard type one TSOP Standard type one TSOP Standard type one TSOP Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure. -7- Publication Release Date: February 2001 Revision A16 W24257 BONDING PAD DIAGRAM 6 A4 7 A3 5 A5 4 A6 3 2 1 30 29 28 27 26 25 24 A7 A12 A14 VDD VDD WEB A13 A8 A9 A11 AC5394 23 OEB Y X 8 A2 9 A1 10 11 12 13 14 15 16 17 18 19 20 21 22 A10 A0 I/O0 I/O1 I/O2 VSS VSS I/O3 I/O4 I/O5 I/O6 I/O7 CSB PAD NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 X -232.25 -351.70 -471.15 -590.60 -710.05 -829.50 -992.79 -992.79 -857.86 -738.41 -594.84 -451.06 -310.67 -171.78 24.45 151.80 298.07 443.28 588.20 732.84 871.11 992.75 992.75 810.09 690.64 571.19 451.74 332.29 120.25 -93.23 Y 1445.22 1445.22 1445.22 1445.22 1445.22 1445.22 1362.24 -1306.11 -1452.79 -1452.79 -1414.13 -1414.13 -1414.13 -1405.28 -1405.28 -1414.13 -1414.13 -1414.13 -1414.13 -1414.13 -1452.79 -1312.15 1373.67 1445.22 1445.22 1445.22 1445.22 1445.22 1444.65 1444.65 Note: For bare chip form (C.O.B.) applications, the substrate must be connected to VDD or left floating in the PCB layout. -8- Publication Release Date: January 2001 Revision A16 W24257 PACKAGE DIMENSIONS 28-pin SO Wide Body Symbol Dimension in Inches Dimension in mm Min. Nom. Max. 0.112 0.004 0.093 0.014 0.008 0.098 0.016 0.010 0.713 0.326 0.044 0.453 0.028 0.059 0.331 0.050 0.465 0.036 0.067 0.103 0.020 0.014 0.733 0.336 0.056 0.477 0.044 0.075 0.047 0.004 0 10 Min. Nom. Max. 2.85 0.10 2.36 0.36 0.20 2.49 0.41 0.25 18.11 8.28 1.12 11.51 0.71 1.50 8.41 1.27 11.81 0.91 1.70 2.62 0.51 0.36 18.62 8.53 1.42 12.12 1.12 1.91 1.19 0.10 0 10 28 15 e1 E HE L Detail F 1 b 14 A A1 A2 b c D E e HE L LE S y θ Notes: D e1 c A2 A S e y A1 LE See Detail F Seating Plane 1. Dimension D Max. & S include mold flash or tie bar burrs. 2. Dimension b does not include dambar protrusion/intrusion. 3. Dimension D & E include mold mismatch . and determined at the mold parting line. 4. Controlling dimension: Inches. 5. General appearance spec should be based on final visual inspection spec. 28-pin Standard Type One TSOP HD Symbol Dimension In Inches Min. Nom. Max. 0.047 0.002 0.035 0.007 0.004 0.461 0.311 0.520 0.040 0.008 0.006 0.465 0.315 0.528 0.022 0.020 0.024 0.010 0.000 0 3 0.004 5 0.028 0.006 0.041 0.011 0.008 0.469 0.319 0.536 Dimension In mm Min. Nom. Max. 1.20 0.05 0.95 0.17 0.10 11.70 7.90 13.20 1.00 0.20 0.15 11.80 8.00 13.40 0.55 0.50 0.60 0.25 0.00 0 3 0.10 5 0.70 0.15 1.05 0.27 0.21 11.90 8.10 13.60 D c 1 e E b A2 A θ A A1 A2 b c D E HD e L L1 Y θ L L1 A1 Controlling dimension: Millimeters Y -9- Publication Release Date: January 2001 Revision A16 W24257 VERSION HISTORY VERSION A12 DATE Nov. 1999 PAGE 1, 2, 7 4, 7 A13 A14 A15 A16 Apr. 2000 May 2000 Nov. 2000 Feb. 2001 7 1, 7, 8 8 2 1 2, 4, 7 DESCRIPTION Change the IDD, ISB, ISB1 Remove the W24257-10 spc. Typo correction in Standby Current Max.: mA->µA Delete 28-pin DIP Package Add in Bonding Pad Diagram Modify Operating Power Supply Current (IDD) as 70 mA Add in TSOP Pin Configuration Add in LE grade Headquarters Headquarters Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No. 4, Creation Rd. III, No. 378 Kwun Tong Rd; Science-Based Industrial Park, Kowloon, Hong Kong Hsinchu, Taiwan TEL: 852-27513100 TEL: 886-3-5770066 FAX: 852-27552064 FAX: 886-3-5796096 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-27197006 Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2727 N. First Street, San Jose, CA 95134, U.S.A. TEL: 408-9436666 FAX: 408-5441798 Taipei Office 11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-27190505 FAX: 886-2-27197502 Note: All data and specifications are subject to change withou t notice. - 10 -
W24257S-70L 价格&库存

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