W25Q32DWZPIGTR

W25Q32DW 1.8V 32M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI -1- Publication Release Date: May 22, 2014 Revision E W25Q32DW Table of Contents 1. GENERAL DESCRIPTION ............................................................................................................... 5 2. FEATURES ....................................................................................................................................... 5 3. PIN CONFIGURATION SOIC 208-MIL ............................................................................................. 6 4. PAD CONFIGURATION WSON 6X5-MM / 8X6-MM........................................................................ 6 5. PIN DESCRIPTION SOIC 208-MIL, WSON 6X5/8X6-MM ............................................................... 6 6. PIN CONFIGURATION SOIC 300-MIL ............................................................................................. 7 7. PIN DESCRIPTION SOIC 300-MIL .................................................................................................. 7 7.1 Package Types ..................................................................................................................... 8 7.2 Chip Select (/CS) .................................................................................................................. 8 7.3 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) ..................................... 8 7.4 Write Protect (/WP) .............................................................................................................. 8 7.5 HOLD (/HOLD) ..................................................................................................................... 8 7.6 Serial Clock (CLK) ................................................................................................................ 8 8. BLOCK DIAGRAM ............................................................................................................................ 9 9. FUNCTIONAL DESCRIPTION ....................................................................................................... 10 9.1 9.2 SPI/QPI OPERATIONS ...................................................................................................... 10 9.1.1 Standard SPI Instructions ..................................................................................................... 10 9.1.2 Dual SPI Instructions ............................................................................................................ 10 9.1.3 Quad SPI Instructions ........................................................................................................... 11 9.1.4 QPI Instructions .................................................................................................................... 11 9.1.5 Hold Function ....................................................................................................................... 11 WRITE PROTECTION ....................................................................................................... 12 9.2.1 10. Write Protect Features ......................................................................................................... 12 CONTROL AND STATUS REGISTERS......................................................................................... 13 10.1 STATUS REGISTER .......................................................................................................... 13 10.1.1 BUSY .................................................................................................................................. 13 10.1.2 Write Enable Latch (WEL) .................................................................................................. 13 10.1.3 Block Protect Bits (BP2, BP1, BP0) .................................................................................... 13 10.1.4 Top/Bottom Block Protect (TB) ........................................................................................... 13 10.1.5 Sector/Block Protect (SEC) ................................................................................................ 13 10.1.6 Complement Protect (CMP)................................................................................................ 14 10.1.7 Status Register Protect (SRP1, SRP0)............................................................................... 14 10.1.8 Erase/Program Suspend Status (SUS) .............................................................................. 14 10.1.9 Security Register Lock Bits (LB3, LB2, LB1, LB0) .............................................................. 14 10.1.10 Quad Enable (QE) ............................................................................................................ 15 10.1.11 W25Q32DW Status Register Memory Protection (CMP = 0) ........................................... 16 10.1.12 W25Q32DW Status Register Memory Protection (CMP = 1) ........................................... 17 -2- W25Q32DW 10.2 INSTRUCTIONS................................................................................................................. 18 10.2.1 Manufacturer and Device Identification .............................................................................. 18 10.2.2 Instruction Set Table 1 (Standard SPI Instructions) ........................................................... 19 10.2.3 Instruction Set Table 2 (Dual SPI Instructions) ................................................................... 20 10.2.4 Instruction Set Table 3 (Quad SPI Instructions) ................................................................. 20 10.2.5 Instruction Set Table 4 (QPI Instructions) ........................................................................... 21 10.2.6 Write Enable (06h) ............................................................................................................. 23 10.2.7 Write Enable for Volatile Status Register (50h) .................................................................. 23 10.2.8 Write Disable (04h) ............................................................................................................. 24 10.2.9 Read Status Register-1 (05h) and Read Status Register-2 (35h) ...................................... 24 10.2.10 Write Status Register (01h) .............................................................................................. 25 10.2.11 Read Data (03h) ............................................................................................................... 27 10.2.12 Fast Read (0Bh) ............................................................................................................... 28 10.2.13 Fast Read Dual Output (3Bh) ........................................................................................... 30 10.2.14 Fast Read Quad Output (6Bh) .......................................................................................... 31 10.2.15 Fast Read Dual I/O (BBh) ................................................................................................. 32 10.2.16 Fast Read Quad I/O (EBh) ............................................................................................... 34 10.2.17 Word Read Quad I/O (E7h) .............................................................................................. 37 10.2.18 Octal Word Read Quad I/O (E3h) ..................................................................................... 39 10.2.19 Set Burst with Wrap (77h) ................................................................................................ 41 10.2.20 Page Program (02h) ......................................................................................................... 42 10.2.21 Quad Input Page Program (32h) ...................................................................................... 44 10.2.22 Sector Erase (20h) ........................................................................................................... 45 10.2.23 32KB Block Erase (52h) ................................................................................................... 46 10.2.24 64KB Block Erase (D8h) ................................................................................................... 47 10.2.25 Chip Erase (C7h / 60h) ..................................................................................................... 48 10.2.26 Erase / Program Suspend (75h) ....................................................................................... 49 10.2.27 Erase / Program Resume (7Ah) ....................................................................................... 51 10.2.28 Power-down (B9h) ............................................................................................................ 52 10.2.29 Release Power-down / Device ID (ABh) ........................................................................... 53 10.2.30 Read Manufacturer / Device ID (90h) ............................................................................... 55 10.2.31 Read Manufacturer / Device ID Dual I/O (92h) ................................................................. 56 10.2.32 Read Manufacturer / Device ID Quad I/O (94h) ............................................................... 57 10.2.33 Read Unique ID Number (4Bh)......................................................................................... 58 10.2.34 Read JEDEC ID (9Fh) ...................................................................................................... 59 10.2.35 Erase Security Registers (44h) ......................................................................................... 60 10.2.36 Program Security Registers (42h) .................................................................................... 61 10.2.37 Read Security Registers (48h) ......................................................................................... 62 10.2.38 Set Read Parameters (C0h) ............................................................................................. 63 10.2.39 Burst Read with Wrap (0Ch)............................................................................................. 64 10.2.40 Enable QPI (38h) .............................................................................................................. 65 -3- Publication Release Date: May 22, 2014 Revision E W25Q32DW 11. 12. 13. Disable QPI (FFh) ............................................................................................................. 66 10.2.42 Enable Reset (66h) and Reset (99h) ................................................................................ 67 ELECTRICAL CHARACTERISTICS ............................................................................................... 68 11.1 Absolute Maximum Ratings ................................................................................................ 68 11.2 Operating Ranges............................................................................................................... 68 11.3 Power-Up Power-Down Timing and Requirements ............................................................ 69 11.4 DC Electrical Characteristics .............................................................................................. 70 11.5 AC Measurement Conditions .............................................................................................. 71 11.6 AC Electrical Characteristics .............................................................................................. 72 11.7 AC Electrical Characteristics (cont’d) ................................................................................. 73 11.8 Serial Output Timing ........................................................................................................... 74 11.9 Serial Input Timing .............................................................................................................. 74 11.10 Hold Timing ....................................................................................................................... 74 PACKAGE SPECIFICATION .......................................................................................................... 75 12.1 8-Pin SOIC 208-mil (Package Code SS) ............................................................................ 75 12.2 8-Contact 6x5mm WSON (Package Code ZP) .................................................................. 76 12.3 8-Contact 8x6mm WSON (Package Code ZE) .................................................................. 78 12.4 16-Pin SOIC 300-mil (Package Code SF) .......................................................................... 79 ORDERING INFORMATION .......................................................................................................... 80 13.1 14. 10.2.41 Valid Part Numbers and Top Side Marking ........................................................................ 81 REVISION HISTORY ...................................................................................................................... 82 -4- W25Q32DW 1. GENERAL DESCRIPTION The W25Q32DW (32M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 1.7V to 1.95V power supply with current consumption as low as 4mA active and 1µA for power-down. All devices are offered in space-saving packages. The W25Q32DW array is organized into 16,384 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q32DW has 1,024 erasable sectors and 64 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See figure 2.) The W25Q32DW support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI as well as 2clocks instruction cycle Quad Peripheral Interface (QPI): Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz (104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O and QPI instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP (execute in place) operation. A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification, a 64-bit Unique Serial Number and four 256-bytes Security Registers. 2. FEATURES  Family of SpiFlash Memories – W25Q32DW: 32M-bit / 4M-byte (4,194,304) – Standard SPI: CLK, /CS, DI, DO, /WP, /Hold – Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold – Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3 – QPI: CLK, /CS, IO0, IO1, IO2, IO3  Low Power, Wide Temperature Range – Single 1.7 to 1.95V supply – 4mA active current,