W25Q64BV

W25Q64BV 64M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI -1- Publication Release Date: July 08, 2010 Revision E W25Q64BV Table of Contents 1. 2. 3. 4. 5. 6. 7. 8. GENERAL DESCRIPTION ............................................................................................................... 5 FEATURES....................................................................................................................................... 5 PIN CONFIGURATION SOIC 208-MIL ............................................................................................ 6 PAD CONFIGURATION WSON 8X6-MM ........................................................................................ 6 PAD CONFIGURATION PDIP 300-MIL ........................................................................................... 7 PIN DESCRIPTION SOIC 208-MIL, PDIP 300-MIL AND WSON 8X6-MM...................................... 7 PIN CONFIGURATION SOIC 300-MIL ............................................................................................ 8 PIN DESCRIPTION SOIC 300-MIL .................................................................................................. 8 8.1 8.2 8.3 8.4 8.5 8.6 9. 10. Package Types..................................................................................................................... 9 Chip Select (/CS).................................................................................................................. 9 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) .................................... 9 Write Protect (/WP)............................................................................................................... 9 HOLD (/HOLD) ..................................................................................................................... 9 Serial Clock (CLK) ................................................................................................................ 9 BLOCK DIAGRAM.......................................................................................................................... 10 FUNCTIONAL DESCRIPTION ....................................................................................................... 11 10.1 SPI OPERATIONS ............................................................................................................. 11 10.1.1 10.1.2 10.1.3 10.1.4 Standard SPI Instructions...................................................................................................11 Dual SPI Instructions ..........................................................................................................11 Quad SPI Instructions.........................................................................................................11 Hold Function .....................................................................................................................11 Write Protect Features........................................................................................................12 10.2 11. WRITE PROTECTION ....................................................................................................... 12 10.2.1 CONTROL AND STATUS REGISTERS ........................................................................................ 13 11.1 STATUS REGISTER .......................................................................................................... 13 11.1.1 11.1.2 11.1.3 11.1.4 11.1.5 11.1.6 11.1.7 11.1.8 BUSY..................................................................................................................................13 Write Enable Latch (WEL) ..................................................................................................13 Block Protect Bits (BP2, BP1, BP0)....................................................................................13 Top/Bottom Block Protect (TB)...........................................................................................13 Sector/Block Protect (SEC) ................................................................................................13 Status Register Protect (SRP1, SRP0)...............................................................................14 Quad Enable (QE) ..............................................................................................................14 Status Register Memory Protection ....................................................................................16 Manufacturer and Device Identification ..............................................................................17 Instruction Set Table 1........................................................................................................18 11.2 INSTRUCTIONS................................................................................................................. 17 11.2.1 11.2.2 -2- W25Q64BV 11.2.3 11.2.4 11.2.5 11.2.6 11.2.7 11.2.8 11.2.9 11.2.10 11.2.11 11.2.12 11.2.13 11.2.14 11.2.15 11.2.16 11.2.17 11.2.18 11.2.19 11.2.20 11.2.21 11.2.22 11.2.23 11.2.24 11.2.25 11.2.26 11.2.27 11.2.28 11.2.29 Instruction Set Table 2 (Read Instructions) ........................................................................19 Write Enable (06h)..............................................................................................................20 Write Disable (04h).............................................................................................................20 Read Status Register-1 (05h) and Read Status Register-2 (35h).......................................21 Write Status Register (01h) ................................................................................................22 Read Data (03h) .................................................................................................................23 Fast Read (0Bh) .................................................................................................................24 Fast Read Dual Output (3Bh) ...........................................................................................25 Fast Read Quad Output (6Bh)..........................................................................................26 Fast Read Dual I/O (BBh).................................................................................................27 Fast Read Quad I/O (EBh) ...............................................................................................29 Octal Word Read Quad I/O (E3h).....................................................................................31 Page Program (02h) .........................................................................................................33 Quad Input Page Program (32h) ......................................................................................34 Sector Erase (20h) ...........................................................................................................35 32KB Block Erase (52h) ...................................................................................................36 64KB Block Erase (D8h)...................................................................................................37 Chip Erase (C7h / 60h).....................................................................................................38 Erase Suspend (75h)........................................................................................................39 Erase Resume (7Ah) ........................................................................................................40 Power-down (B9h) ............................................................................................................41 High Performance Mode (A3h) .........................................................................................42 Release Power-down or High Performance Mode / Device ID (ABh) ...............................42 Read Manufacturer / Device ID (90h) ...............................................................................44 Read Unique ID Number (4Bh).........................................................................................45 Read JEDEC ID (9Fh) ......................................................................................................46 Continuous Read Mode Reset (FFh or FFFFh) ................................................................47 12. ELECTRICAL CHARACTERISTICS .............................................................................................. 48 12.1 12.2 12.3 12.4 12.5 12.6 12.7 12.8 12.9 12.10 Absolute Maximum Ratings................................................................................................ 48 Operating Ranges .............................................................................................................. 48 Power-up Timing and Write Inhibit Threshold .................................................................... 49 DC Electrical Characteristics.............................................................................................. 50 AC Measurement Conditions ............................................................................................. 51 AC Electrical Characteristics .............................................................................................. 52 AC Electrical Characteristics (cont’d)................................................................................. 53 Serial Output Timing........................................................................................................... 54 Input Timing........................................................................................................................ 54 Hold Timing ....................................................................................................................... 54 13. PACKAGE SPECIFICATION.......................................................................................................... 55 Publication Release Date: July 08, 2010 Revision E -3- W25Q64BV 13.1 13.2 13.3 13.4 14. 15. 14.1 8-Pin SOIC 208-mil (Package Code SS) ........................................................................... 55 8-Pin PDIP 300-mil (Package Code DA)............................................................................ 56 8-Contact 8x6mm WSON (Package Code ZE) .................................................................. 57 16-Pin SOIC 300-mil (Package Code SF).......................................................................... 58 Valid Part Numbers and Top Side Marking........................................................................ 60 ORDERING INFORMATION .......................................................................................................... 59 REVISION HISTORY...................................................................................................................... 61 -4- W25Q64BV 1. GENERAL DESCRIPTION The W25Q64BV (64M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The devices operate on a single 2.7V to 3.6V power supply with current consumption as low as 4mA active and 1µA for power-down. All devices are offered in spacesaving packages. The W25Q64BV array is organized into 32,768 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q64BV has 2,048 erasable sectors and 128 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See figure 2.) The W25Q64BV supports the standard Serial Peripheral Interface (SPI), and a high performance Dual/Quad output as well as Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 80MHz are supported allowing equivalent clock rates of 160MHz for Dual Output and 320MHz for Quad Output when using the Fast Read Dual/Quad Output instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP (execute in place) operation. A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification with a 64-bit Unique Serial Number. 2. FEATURES • Family of SpiFlash Memories – W25Q64BV: 64M-bit / 8M-byte (8,388,608) – 256-bytes per programmable page • Standard, Dual or Quad SPI – Standard SPI: CLK, /CS, DI, DO, /WP, /Hold – Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold – Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3 • Highest Performance Serial Flash – Up to 6X that of ordinary Serial Flash – 80MHz clock operation – 160MHz equivalent Dual SPI – 320MHz equivalent Quad SPI – 40MB/S continuous data transfer rate • Efficient “Continuous Read Mode” – Low Instruction overhead – As few as 8 clocks to address memory – Allows true XIP (execute in place) operation – Outperforms X16 Parallel Flash Note 1: Contact Winbond for details • Low Power, Wide Temperature Range – Single 2.7 to 3.6V supply – 4mA active current,