W25Q64FVSFIG

W25Q64FV 3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & QPI -1 Publication Release Date: June 14, 2016 Revision Q W25Q64FV Table of Contents 1. GENERAL DESCRIPTION ............................................................................................................... 5 2. FEATURES ....................................................................................................................................... 5 3. PACKAGE TYPES AND PIN CONFIGURATIONS........................................................................... 6 4. 3.1 Pin Configuration SOIC / VSOP 208-mil .............................................................................. 6 3.2 Pad Configuration WSON 6x5-mm / 8X6-mm, XSON 4x4-mm ........................................... 6 3.3 Pin Configuration PDIP 300-mil ............................................................................................ 7 3.4 mil Pin Description SOIC/VSOP 208-mil, WSON 6x5/8x6-mm, XSON 4x4-mm and PDIP 3007 3.5 Pin Configuration SOIC 300-mil ........................................................................................... 8 3.6 Pin Description SOIC 300-mil ............................................................................................... 8 3.7 Ball Configuration TFBGA 8x6-mm (5x5 or 6x4 Ball Array) ................................................. 9 3.8 Ball Description TFBGA 8x6-mm ......................................................................................... 9 3.9 Ball Configuration WLCSP ................................................................................................. 10 3.10 Ball Description WLCSP ..................................................................................................... 10 PIN DESCRIPTIONS ...................................................................................................................... 11 4.1 Chip Select (/CS) ................................................................................................................ 11 4.2 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) ................................... 11 4.3 Write Protect (/WP) ............................................................................................................ 11 4.4 HOLD (/HOLD) ................................................................................................................... 11 4.5 Serial Clock (CLK) .............................................................................................................. 11 5. BLOCK DIAGRAM .......................................................................................................................... 12 6. FUNCTIONAL DESCRIPTIONS ..................................................................................................... 13 6.1 6.2 SPI/QPI OPERATIONS ...................................................................................................... 13 6.1.1 Standard SPI Instructions ..................................................................................................... 13 6.1.2 Dual SPI Instructions ............................................................................................................ 13 6.1.3 Quad SPI Instructions ........................................................................................................... 14 6.1.4 QPI Instructions .................................................................................................................... 14 6.1.5 Hold Function ....................................................................................................................... 14 WRITE PROTECTION ....................................................................................................... 15 6.2.1 7. Write Protect Features ......................................................................................................... 15 STATUS REGISTERS AND INSTRUCTIONS ............................................................................... 16 7.1 STATUS REGISTERS........................................................................................................ 16 7.1.1 BUSY .................................................................................................................................... 16 7.1.2 Write Enable Latch (WEL) .................................................................................................... 16 7.1.3 Block Protect Bits (BP2, BP1, BP0) ...................................................................................... 16 7.1.4 Top/Bottom Block Protect (TB) ............................................................................................. 16 7.1.5 Sector/Block Protect (SEC) .................................................................................................. 16 -2- W25Q64FV 7.2 7.1.6 Complement Protect (CMP).................................................................................................. 16 7.1.7 Status Register Protect (SRP1, SRP0)................................................................................. 17 7.1.8 Erase/Program Suspend Status (SUS) ................................................................................ 17 7.1.9 Security Register Lock Bits (LB3, LB2, LB1) ........................................................................ 17 7.1.10 Quad Enable (QE) .............................................................................................................. 17 7.1.11 W25Q64FV Status Register Memory Protection (CMP = 0) ............................................... 19 7.1.12 W25Q64FV Status Register Memory Protection (CMP = 1) ............................................... 20 INSTRUCTIONS................................................................................................................. 21 7.2.1 Manufacturer and Device Identification ................................................................................ 21 7.2.2 Instruction Set Table 1 (Standard SPI Instructions) (1)........................................................... 22 7.2.3 Instruction Set Table 2 (Dual SPI Instructions) ..................................................................... 23 7.2.4 Instruction Set Table 3 (Quad SPI Instructions) ................................................................... 23 7.2.5 Instruction Set Table 4 (QPI Instructions)(14) ........................................................................ 24 7.2.6 Write Enable (06h) ............................................................................................................... 26 7.2.7 Write Enable for Volatile Status Register (50h) .................................................................... 26 7.2.8 Write Disable (04h) ............................................................................................................... 27 7.2.9 Read Status Register-1 (05h) and Read Status Register-2 (35h) ........................................ 27 7.2.10 Write Status Register (01h) ................................................................................................ 28 7.2.11 Read Data (03h) ................................................................................................................. 30 7.2.12 Fast Read (0Bh) ................................................................................................................. 31 7.2.13 Fast Read Dual Output (3Bh) ............................................................................................. 33 7.2.14 Fast Read Quad Output (6Bh) ............................................................................................ 34 7.2.15 Fast Read Dual I/O (BBh) ................................................................................................... 35 7.2.16 Fast Read Quad I/O (EBh) ................................................................................................. 37 7.2.17 Word Read Quad I/O (E7h) ................................................................................................ 40 7.2.18 Octal Word Read Quad I/O (E3h) ....................................................................................... 42 7.2.19 Set Burst with Wrap (77h) .................................................................................................. 44 7.2.20 Page Program (02h) ........................................................................................................... 45 7.2.21 Quad Input Page Program (32h) ........................................................................................ 47 7.2.22 Sector Erase (20h) ............................................................................................................. 48 7.2.23 32KB Block Erase (52h) ..................................................................................................... 49 7.2.24 64KB Block Erase (D8h) ..................................................................................................... 50 7.2.25 Chip Erase (C7h / 60h) ....................................................................................................... 51 7.2.26 Erase / Program Suspend (75h) ......................................................................................... 52 7.2.27 Erase / Program Resume (7Ah) ......................................................................................... 54 7.2.28 Power-down (B9h) .............................................................................................................. 55 7.2.29 Release Power-down / Device ID (ABh) ............................................................................. 56 7.2.30 Read Manufacturer / Device ID (90h) ................................................................................. 58 7.2.31 Read Manufacturer / Device ID Dual I/O (92h) ................................................................... 59 7.2.32 Read Manufacturer / Device ID Quad I/O (94h) ................................................................. 60 7.2.33 Read Unique ID Number (4Bh)........................................................................................... 61 -3- Publication Release Date: June 14, 2016 Revision Q W25Q64FV 8. 7.2.34 Read JEDEC ID (9Fh) ........................................................................................................ 62 7.2.35 Read SFDP Register (5Ah) ................................................................................................ 63 7.2.36 Erase Security Registers (44h) ........................................................................................... 64 7.2.37 Program Security Registers (42h) ...................................................................................... 65 7.2.38 Read Security Registers (48h) ........................................................................................... 66 7.2.39 Set Read Parameters (C0h) ............................................................................................... 67 7.2.40 Burst Read with Wrap (0Ch)............................................................................................... 68 7.2.41 Enable QPI (38h) ................................................................................................................ 69 7.2.42 Disable QPI (FFh) ............................................................................................................... 70 7.2.43 Enable Reset (66h) and Reset (99h) .................................................................................. 71 ELECTRICAL CHARACTERISTICS ............................................................................................... 72 8.1 Absolute Maximum Ratings (1)(2) ...................................................................................... 72 8.2 8.3 8.4 Operating Ranges............................................................................................................... 72 Power-up Power-down Timing and Requirements(1)......................................................... 73 8.5 DC Electrical Characteristics .............................................................................................. 74 AC Measurement Conditions(1) ......................................................................................... 75 8.6 AC Electrical Characteristics .............................................................................................. 76 AC Electrical Characteristics (cont’d) ........................................................................................... 77 9. 10. 8.7 Serial Output Timing ........................................................................................................... 78 8.8 Serial Input Timing .............................................................................................................. 78 8.9 /HOLD Timing ..................................................................................................................... 78 8.10 /WP Timing ......................................................................................................................... 78 PACKAGE SPECIFICATION .......................................................................................................... 79 9.1 8-Pin SOIC 208-mil (Package Code SS) ............................................................................ 79 9.2 8-Pin VSOP 208-mil (Package Code ST) ........................................................................... 80 9.3 8-Pin PDIP 300-mil (Package Code DA) ............................................................................ 81 9.4 8-Pad WSON 6x5-mm (Package Code ZP) ....................................................................... 82 9.5 8-Pad WSON 8x6-mm (Package Code ZE) ....................................................................... 83 9.6 8-Pad XSON 4x4x0.45-mm (Package Code XG) .............................................................. 84 9.7 16-Pin SOIC 300-mil (Package Code SF) .......................................................................... 85 9.8 24-Ball TFBGA 8x6-mm (Package Code TB, 5x5-1 ball array) .......................................... 86 9.9 24-Ball TFBGA 8x6-mm (Package Code TC, 6x4 ball array) ............................................. 87 9.10 16-Ball WLCSP (Package Code BY) .................................................................................. 88 9.11 Ordering Information ........................................................................................................... 89 9.12 Valid Part Numbers and Top Side Marking ........................................................................ 90 REVISION HISTORY ...................................................................................................................... 91 -4- W25Q64FV 1. GENERAL DESCRIPTION The W25Q64FV (64M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption as low as 4mA active and 1µA for power-down. All devices are offered in space-saving packages. The W25Q64FV array is organized into 32,768 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q64FV has 2,048 erasable sectors and 128 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See figure 2.) The W25Q64FV support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI as well as 2clocks instruction cycle Quad Peripheral Interface (QPI): Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual I/O and 416MHz (104MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O and QPI instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP (execute in place) operation. A Hold pin, Write Protect pin and programmable write protection, with top or bottom array control, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification, a 64-bit Unique Serial Number and three 256-bytes Security Registers. 2. FEATURES  Family of SpiFlash Memories – W25Q64FV: 64M-bit / 8M-byte (8,388,608) – Standard SPI: CLK, /CS, DI, DO, /WP, /Hold – Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold – Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3 – QPI: CLK, /CS, IO0, IO1, IO2, IO3 – -40°C to +85°C operating range  Flexible Architecture with 4KB sectors – Uniform Sector Erase (4K-bytes) – Uniform Block Erase (32K and 64K-bytes) – Program 1 to 256 byte per programmable page – Erase/Program Suspend & Resume  Highest Performance Serial Flash – 104MHz Standard/Dual/Quad SPI clocks – 208/416MHz equivalent Dual/Quad SPI – 50MB/S continuous data transfer rate – More than 100,000 erase/program cycles – More than 20-year data retention  Advanced Security Features – Software and Hardware Write-Protect – Top/Bottom, 4KB complement array protection – Power Supply Lock-Down and OTP protection – 64-Bit Unique ID for each device – Discoverable Parameters (SFDP) Register – 3X256-Bytes Security Registers with OTP locks – Volatile & Non-volatile Status Register Bits  Efficient “Continuous Read” and QPI Mode – Continuous Read with 8/16/32/64-Byte Wrap – As few as 8 clocks to address memory – Quad Peripheral Interface (QPI) reduces instruction overhead – Allows true XIP (execute in place) operation – Outperforms X16 Parallel Flash  Space Efficient Packaging – 8-pin SOIC/VSOP 208-mil – 8-pad WSON 6x5-mm/8x6-mm – 8-pad XSON 4x4-mm – 16-pin SOIC 300-mil – 8-pin PDIP 300-mil – 24-ball TFBGA 8x6-mm – 16-ball WLCSP – Contact Winbond for KGD and other options  Low Power, Wide Temperature Range – Single 2.7 to 3.6V supply – 4mA active current,