W25Q80BWSNIP

W25Q80BW 1.8V 8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI -1- Publication Release Date: January 26, 2011 Preliminary - Revision A W25Q80BW Table of Contents 1. 2. 3. 4. 5. GENERAL DESCRIPTION ............................................................................................................... 5 FEATURES ....................................................................................................................................... 5 PIN CONFIGURATION SOIC 150 / 208-MIL ................................................................................... 6 PAD CONFIGURATION WSON 6X5-MM, USON 2X3-MM ............................................................. 6 PIN DESCRIPTION SOIC 150/208-MIL, WSON 6X5-MM & USON 2X3-MM ................................. 6 5.1 5.2 5.3 5.4 5.5 5.6 6. 7. Package Types ..................................................................................................................... 7 Chip Select (/CS) .................................................................................................................. 7 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) .................................... 7 Write Protect (/WP)............................................................................................................... 7 HOLD (/HOLD) ..................................................................................................................... 7 Serial Clock (CLK) ................................................................................................................ 7 BLOCK DIAGRAM ............................................................................................................................ 8 FUNCTIONAL DESCRIPTION ......................................................................................................... 9 7.1 SPI OPERATIONS ............................................................................................................... 9 7.1.1 7.1.2 7.1.3 7.1.4 Standard SPI Instructions ....................................................................................................... 9 Dual SPI Instructions .............................................................................................................. 9 Quad SPI Instructions............................................................................................................. 9 Hold Function ......................................................................................................................... 9 Write Protect Features.......................................................................................................... 10 7.2 8. WRITE PROTECTION ....................................................................................................... 10 7.2.1 CONTROL AND STATUS REGISTERS ........................................................................................ 11 8.1 STATUS REGISTER .......................................................................................................... 11 8.1.1 8.1.2 8.1.3 8.1.4 8.1.5 8.1.6 8.1.7 8.1.8 8.1.9 8.1.10 8.1.11 8.1.12 BUSY.................................................................................................................................... 11 Write Enable Latch (WEL) .................................................................................................... 11 Block Protect Bits (BP2, BP1, BP0) ...................................................................................... 11 Top/Bottom Block Protect (TB) ............................................................................................. 11 Sector/Block Protect (SEC) .................................................................................................. 11 Complement Protect (CMP) ................................................................................................. 12 Status Register Protect (SRP1, SRP0)................................................................................. 12 Erase/Program Suspend Status (SUS) ................................................................................ 12 Security Register Lock Bits (LB3, LB2, LB1, LB0) ................................................................ 12 Quad Enable (QE) .............................................................................................................. 13 Status Register Memory Protection (CMP = 0)................................................................... 14 Status Register Memory Protection (CMP = 1)................................................................... 15 Manufacturer and Device Identification ................................................................................ 16 Instruction Set Table 1 (Erase, Program Instructions) .......................................................... 17 8.2 INSTRUCTIONS................................................................................................................. 16 8.2.1 8.2.2 -2- W25Q80BW 8.2.3 8.2.4 8.2.5 8.2.6 8.2.7 8.2.8 8.2.9 8.2.10 8.2.11 8.2.12 8.2.13 8.2.14 8.2.15 8.2.16 8.2.17 8.2.18 8.2.19 8.2.20 8.2.21 8.2.22 8.2.23 8.2.24 8.2.25 8.2.26 8.2.27 8.2.28 8.2.29 8.2.30 8.2.31 8.2.32 8.2.33 8.2.34 8.2.35 8.2.36 8.2.37 8.2.38 Instruction Set Table 2 (Read Instructions) .......................................................................... 18 Instruction Set Table 3 (ID, Security Instructions)................................................................. 19 Write Enable (06h)................................................................................................................ 20 Write Enable for Volatile Status Register (50h) .................................................................... 20 Write Disable (04h) ............................................................................................................... 21 Read Status Register-1 (05h) and Read Status Register-2 (35h)......................................... 22 Write Status Register (01h) .................................................................................................. 22 Read Data (03h) ................................................................................................................. 24 Fast Read (0Bh) ................................................................................................................. 25 Fast Read Dual Output (3Bh) ............................................................................................. 26 Fast Read Quad Output (6Bh) ............................................................................................ 27 Fast Read Dual I/O (BBh)................................................................................................... 28 Fast Read Quad I/O (EBh) ................................................................................................. 30 Word Read Quad I/O (E7h) ................................................................................................ 32 Octal Word Read Quad I/O (E3h) ....................................................................................... 34 Set Burst with Wrap (77h) .................................................................................................. 36 Continuous Read Mode Bits (M7-0) ................................................................................... 37 Continuous Read Mode Reset (FFh or FFFFh) .................................................................. 37 Page Program (02h) ........................................................................................................... 38 Quad Input Page Program (32h) ........................................................................................ 39 Sector Erase (20h) ............................................................................................................. 40 32KB Block Erase (52h) ..................................................................................................... 41 64KB Block Erase (D8h) ..................................................................................................... 42 Chip Erase (C7h / 60h) ....................................................................................................... 43 Erase / Program Suspend (75h) ......................................................................................... 44 Erase / Program Resume (7Ah) ......................................................................................... 45 Power-down (B9h) .............................................................................................................. 46 Release Power-down / Device ID (ABh) ............................................................................. 47 Read Manufacturer / Device ID (90h) ................................................................................. 49 Read Manufacturer / Device ID Dual I/O (92h) ................................................................... 50 Read Manufacturer / Device ID Quad I/O (94h).................................................................. 51 Read Unique ID Number (4Bh)........................................................................................... 52 Read JEDEC ID (9Fh) ........................................................................................................ 53 Erase Security Registers (44h) ........................................................................................... 54 Program Security Registers (42h) ...................................................................................... 55 Read Security Registers (48h)............................................................................................ 56 9. ELECTRICAL CHARACTERISTICS .............................................................................................. 57 9.1 9.2 9.3 Absolute Maximum Ratings ................................................................................................ 57 Operating Ranges .............................................................................................................. 57 Power-up Timing and Write Inhibit Threshold .................................................................... 58 Publication Release Date: January 26, 2011 Preliminary - Revision A -3- W25Q80BW 9.4 9.5 9.6 9.7 9.8 9.9 9.10 10. 10.1 10.2 10.3 10.4 11. 12. 11.1 DC Electrical Characteristics .............................................................................................. 59 AC Measurement Conditions ............................................................................................. 60 AC Electrical Characteristics .............................................................................................. 61 AC Electrical Characteristics (cont’d) ................................................................................. 62 Serial Output Timing ........................................................................................................... 63 Serial Input Timing.............................................................................................................. 63 Hold Timing ........................................................................................................................ 63 8-Pin SOIC 150-mil (Package Code SN) ........................................................................... 64 8-Pin SOIC 208-mil (Package Code SS) ........................................................................... 65 8-Pad WSON 6x5-mm (Package Code ZP) ....................................................................... 66 8-Pad USON 2x3-mm (Package Code UX) ....................................................................... 68 Valid Part Numbers and Top Side Marking ........................................................................ 70 PACKAGE SPECIFICATION .......................................................................................................... 64 ORDERING INFORMATION .......................................................................................................... 69 REVISION HISTORY ...................................................................................................................... 71 -4- W25Q80BW 1. GENERAL DESCRIPTION The W25Q80BW (8M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The 25Q series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 1.65V to 1.95V power supply with current consumption as low as 4mA active and 1µA for power-down. All devices are offered in spacesaving packages. The W25Q80BW array is organized into 4,096 programmable pages of 256-bytes each. Up to 256 bytes can be programmed at a time. Pages can be erased in groups of 16 (4KB sector erase), groups of 128 (32KB block erase), groups of 256 (64KB block erase) or the entire chip (chip erase). The W25Q80BW has 256 erasable sectors and 16 erasable blocks respectively. The small 4KB sectors allow for greater flexibility in applications that require data and parameter storage. (See figure 2.) The W25Q80BW supports the standard Serial Peripheral Interface (SPI), and a high performance Dual/Quad output as well as Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2 (/WP), and I/O3 (/HOLD). SPI clock frequencies of up to 80MHz are supported allowing equivalent clock rates of 160MHz (80MHz x 2) for Dual I/O and 320MHz (80MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. The Continuous Read Mode allows for efficient memory access with as few as 8-clocks of instruction-overhead to read a 24-bit address, allowing true XIP (execute in place) operation. A Hold pin, Write Protect pin and programmable write protection, with top, bottom or complement array control, provide further control flexibility. Additionally, the device supports JEDEC standard manufacturer and device identification with a 64-bit Unique Serial Number. 2. FEATURES • Family of SpiFlash Memories – W25Q80BW: 8M-bit/1M-byte (1,048,576) – 256-byte per programmable page – Standard SPI: CLK, /CS, DI, DO, /WP, /Hold – Dual SPI: CLK, /CS, IO0, IO1, /WP, /Hold – Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3 • Highest Performance Serial Flash – 80MHz Dual/Quad SPI clocks – 160/320MHz equivalent Dual/Quad SPI – 40MB/S continuous data transfer rate – Up to 6X that of ordinary Serial Flash – More than 100,000 erase/program cycles – More than 20-year data retention • Efficient “Continuous Read Mode” – Low Instruction overhead – Continuous Read with 8/16/32/64-Byte Wrap – As few as 8 clocks to address memory – Allows true XIP (execute in place) operation – Outperforms X16 Parallel Flash • Low Power, Wide Temperature Range – Single 1.65V to 1.95V supply – 4mA active current,