W25R128JVSIQ

W25R128JV 3V 128M-BIT SERIAL FLASH MEMORY WITH DUAL/QUAD SPI & RPMC Publication Release Date: September 3, 2018 - Revision B W25R128JV Table of Contents 1. GENERAL DESCRIPTIONS ............................................................................................................. 4 2. FEATURES ....................................................................................................................................... 4 3. PACKAGE TYPES AND PIN CONFIGURATIONS........................................................................... 5 4. 3.1 Pin Configuration SOIC 208-mil ........................................................................................... 5 3.2 Pad Configuration WSON 6x5-mm / 8x6-mm ...................................................................... 5 3.3 Pin Description SOIC 208-mil, WSON 6x5-mm / 8x6-mm ................................................... 5 PIN DESCRIPTIONS ........................................................................................................................ 6 4.1 Chip Select (/CS) .................................................................................................................. 6 4.2 Serial Data Input, Output and IOs (DI, DO and IO0, IO1, IO2, IO3) ..................................... 6 4.3 Serial Clock (CLK) ................................................................................................................ 6 4.4 Reset (/RESET) .................................................................................................................... 6 5. BLOCK DIAGRAM ............................................................................................................................ 7 6. FUNCTIONAL DESCRIPTIONS ....................................................................................................... 8 6.1 SPI Operations ..................................................................................................................... 8 6.1.1 Standard SPI Instructions ....................................................................................................... 8 6.1.2 Dual SPI Instructions .............................................................................................................. 8 6.1.3 Quad SPI Instructions ............................................................................................................. 8 6.1.4 Software Reset & Hardware /RESET pin ................................................................................ 8 6.2 RPMC Operations................................................................................................................. 9 6.3 Write Protection .................................................................................................................. 10 6.3.1 7. Write Protect Features ......................................................................................................... 10 STATUS AND CONFIGURATION REGISTERS ............................................................................ 12 7.1 Status Registers ................................................................................................................. 12 7.1.1 Erase/Write In Progress (BUSY) – Status Only ................................................................ 12 7.1.2 Write Enable Latch (WEL) – Status Only .......................................................................... 12 7.1.3 Block Protect Bits (BP2, BP1, BP0) – Volatile/Non-Volatile Writable ................................ 12 7.1.4 Top/Bottom Block Protect (TB) – Volatile/Non-Volatile Writable ....................................... 13 7.1.5 Sector/Block Protect Bit (SEC) – Volatile/Non-Volatile Writable ....................................... 13 7.1.6 Complement Protect (CMP) – Volatile/Non-Volatile Writable ............................................ 13 7.1.7 Status Register Protect (SRL) .............................................................................................. 14 7.1.8 Erase/Program Suspend Status (SUS) – Status Only....................................................... 14 7.1.9 Security Register Lock Bits (LB3, LB2, LB1) – Volatile/Non-Volatile OTP Writable .......... 15 7.1.10 Quad Enable (QE) – Volatile/Non-Volatile Writable ........................................................ 15 7.1.11 Write Protect Selection (WPS) – Volatile/Non-Volatile Writable ..................................... 15 7.1.12 Output Driver Strength (DRV1, DRV0) – Volatile/Non-Volatile Writable ......................... 16 -1- W25R128JV 8. 7.1.13 Reserved Bits – Non Functional ...................................................................................... 16 7.1.14 W25R128JV Status Register Memory Protection (WPS = 0, CMP = 0) ............................. 17 7.1.15 W25R128JV Status Register Memory Protection (WPS = 0, CMP = 1) ............................. 18 7.1.16 W25R128JV Individual Block Memory Protection (WPS = 1) ............................................ 19 INSTRUCTIONS ............................................................................................................................. 20 8.1 8.2 Device ID and Instruction Set Tables ................................................................................. 20 8.1.1 Manufacturer and Device Identification ................................................................................ 20 8.1.2 Instruction Set Table 1-1 (Standard/Dual/Quad SPI Instructions)(1) ..................................... 21 8.1.3 Instruction Set Table 2-1 (RPMC Input Instruction, OP1)(1) .................................................. 23 8.1.4 Instruction Set Table 2-2 (RPMC Output Instruction, OP2)(1) ............................................... 23 Instruction Descriptions ...................................................................................................... 24 8.2.1 Write Enable (06h) ............................................................................................................... 24 8.2.2 Write Enable for Volatile Status Register (50h) .................................................................... 24 8.2.3 Write Disable (04h) ............................................................................................................... 25 8.2.4 Read Status Register-1 (05h), Status Register-2 (35h) & Status Register-3 (15h) .............. 25 8.2.5 Write Status Register-1 (01h), Status Register-2 (31h) & Status Register-3 (11h) .............. 26 8.2.6 Read Data (03h) ................................................................................................................... 28 8.2.7 Fast Read (0Bh) ................................................................................................................... 29 8.2.8 Fast Read Dual Output (3Bh) ............................................................................................... 30 8.2.9 Fast Read Quad Output (6Bh) .............................................................................................. 31 8.2.10 Fast Read Dual I/O (BBh) ................................................................................................... 32 8.2.11 Fast Read Quad I/O (EBh) ................................................................................................. 33 8.2.12 Set Burst with Wrap (77h) .................................................................................................. 34 8.2.13 Page Program (02h) ........................................................................................................... 35 8.2.14 Quad Input Page Program (32h) ........................................................................................ 36 8.2.15 Sector Erase (20h) ............................................................................................................. 37 8.2.16 32KB Block Erase (52h) ..................................................................................................... 38 8.2.17 64KB Block Erase (D8h) ..................................................................................................... 39 8.2.18 Chip Erase (C7h / 60h) ....................................................................................................... 40 8.2.19 Erase / Program Suspend (75h) ......................................................................................... 41 8.2.20 Erase / Program Resume (7Ah) ......................................................................................... 42 8.2.21 Power-down (B9h) .............................................................................................................. 43 8.2.22 Release Power-down / Device ID (ABh) ............................................................................. 44 8.2.23 Read Manufacturer / Device ID (90h) ................................................................................. 45 8.2.24 Read Manufacturer / Device ID Dual I/O (92h) ................................................................... 46 8.2.25 Read Manufacturer / Device ID Quad I/O (94h) ................................................................. 47 8.2.26 Read Unique ID Number (4Bh)........................................................................................... 48 8.2.27 Read JEDEC ID (9Fh) ........................................................................................................ 49 8.2.28 Read SFDP Register (5Ah) ................................................................................................ 50 8.2.29 Erase Security Registers (44h) ........................................................................................... 51 8.2.30 Program Security Registers (42h) ...................................................................................... 52 -2- Publication Release Date: September 3, 2018 - Revision B W25R128JV 9. 10. 11. 8.2.31 Read Security Registers (48h) ........................................................................................... 53 8.2.32 Individual Block/Sector Lock (36h) ..................................................................................... 54 8.2.33 Individual Block/Sector Unlock (39h) .................................................................................. 55 8.2.34 Read Block/Sector Lock (3Dh) ........................................................................................... 56 8.2.35 Global Block/Sector Lock (7Eh) .......................................................................................... 57 8.2.36 Global Block/Sector Unlock (98h) ....................................................................................... 57 8.2.37 Enable Reset (66h) and Reset Device (99h) ...................................................................... 58 8.2.38 Write Root Key Register (9Bh + 00h) ................................................................................. 59 8.2.39 Update HMAC Key (9Bh + 01h).......................................................................................... 60 8.2.40 Increment Monotonic Counter (9Bh + 02h) ........................................................................ 61 8.2.41 Request Monotonic Counter (9Bh + 03h) ........................................................................... 62 8.2.42 Reserved RPMC Commands (9Bh + 04h~FFh) ................................................................. 62 8.2.43 Read RPMC Status / Data (96h) ........................................................................................ 63 ELECTRICAL CHARACTERISTICS ............................................................................................... 64 9.1 Absolute Maximum Ratings (1) .......................................................................................... 64 9.2 Operating Ranges............................................................................................................... 64 9.3 Power-Up Power-Down Timing and Requirements ............................................................ 65 9.4 DC Electrical Characteristics(1) ........................................................................................... 66 9.5 AC Measurement Conditions .............................................................................................. 67 9.6 AC Electrical Characteristics(5) ........................................................................................... 68 9.7 AC Electrical Characteristics (cont’d) .............................................................................. 69 9.8 Serial Output Timing ........................................................................................................... 70 9.9 Serial Input Timing .............................................................................................................. 70 PACKAGE SPECIFICATIONS ........................................................................................................ 71 10.1 8-Pin SOIC 208-mil (Package Code S) .............................................................................. 71 10.2 8-Pad WSON 6x5-mm (Package Code P) ......................................................................... 72 10.3 8-Pad WSON 8x6-mm (Package Code E) ......................................................................... 73 10.4 Ordering Information ........................................................................................................... 74 10.5 Valid Part Numbers and Top Side Marking ........................................................................ 75 REVISION HISTORY ...................................................................................................................... 76 -3- W25R128JV 1. GENERAL DESCRIPTIONS The W25R128JV (128M-bit) Serial Flash memory provides a storage solution for systems with limited space, pins and power. The W25 series offers flexibility and performance well beyond ordinary Serial Flash devices. They are ideal for code shadowing to RAM, executing code directly from Dual/Quad SPI (XIP) and storing voice, text and data. The device operates on a single 2.7V to 3.6V power supply with current consumption as low as 4mA active and 1µA for power-down. All devices are offered in spacesaving packages. The W25R128JV support the standard Serial Peripheral Interface (SPI), Dual/Quad I/O SPI: Serial Clock, Chip Select, Serial Data I/O0 (DI), I/O1 (DO), I/O2, and I/O3. SPI clock frequencies of up to 133MHz are supported allowing equivalent clock rates of 266MHz (133MHz x 2) for Dual I/O and 532MHz (133MHz x 4) for Quad I/O when using the Fast Read Dual/Quad I/O instructions. These transfer rates can outperform standard Asynchronous 8 and 16-bit Parallel Flash memories. The device supports JEDEC standard manufacturer and device ID and SFDP Register, a 64-bit Unique Serial Number and three 256-bytes Security Registers. The W25R series is also equipped with an enhanced security feature known as Replay Protection Monotonic Counter (RPMC). Replay Protection provides a high level secured communication between the flash device and the controller to reduce the system vulnerabilities to hardware attacks. 2. FEATURES  New Family of SpiFlash Memories – W25R128JV: 128M-bit / 16M-byte – Standard SPI: CLK, /CS, DI(IO0), DO(IO1) – Dual SPI: CLK, /CS, IO0, IO1 – Quad SPI: CLK, /CS, IO0, IO1, IO2, IO3 – Software Reset  Highest Performance Serial Flash – 133MHz Single, Dual/Quad SPI clocks – 266/532MHz equivalent Dual/Quad SPI – More than 100,000 erase/program cycles – More than 20-year data retention  Low Power, Wide Temperature Range – Single 2.7 to 3.6V supply – 4mA active current,