W83176G-401

W83176R-401 W83176G-401 Winbond Current Mode Differential Buffer for PCI Express and SATA Date: May,2006 Revision: 0.6 W83176R-401, W83176G-401 CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA W83176R-401/W83176G-401 Datasheet Revision History PAGES DATES VERSION WEB VERSION MAIN CONTENTS 1 2 3 4 5 6 7 8 9 10 n.a. 06/05/04 05/16/06 0.5 0.6 n.a. n.a All of the versions before 0.50 are for internal use. Add Pb-free part no : W83176G-401 -I- Publication Release Date: May, 2006 Revision 0.6 W83176R-401, W83176G-401 CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA Table of Content1. 2. 3. 4. 5. GENERAL DESCRIPTION ......................................................................................................... 1 PRODUCT FEATURES .............................................................................................................. 1 PIN CONFIGURATION ............................................................................................................... 2 BLOCK DIAGRAM ...................................................................................................................... 3 PIN DESCRIPTION..................................................................................................................... 4 5.1 5.2 6. 2 Clock Outputs ...........................................................................................................................4 Power Pins................................................................................................................................5 Register 0: Control Register (Default: 07h) .............................................................................6 Register 1: Control Register (Default: FFh).............................................................................6 Register 2: Control Register (Default: 00h) .............................................................................6 Register 3: Reserved Register (Default: 00h) .........................................................................7 Register 4: Winbond Chip ID – Project Code Register (Default: 11h)....................................7 Register 5: Test Register (Default: 00h) ..................................................................................7 Block Write protocol .................................................................................................................8 Block Read protocol .................................................................................................................8 Byte Write protocol ...................................................................................................................8 Byte Read protocol...................................................................................................................8 I C CONTROL AND STATUS REGISTERS............................................................................... 6 6.1 6.2 6.3 6.4 6.5 6.6 7. ACCESS INTERFACE ................................................................................................................ 8 7.1 7.2 7.3 7.4 8. 9. 10. ORDERING INFORMATION....................................................................................................... 9 HOW TO READ THE TOP MARKING........................................................................................ 9 PACKAGE DRAWING AND DIMENSIONS.............................................................................. 10 - II - W83176R-401, W83176G-401 CURRENT MODE DIFFERENTIAL BUFFER FOR PCI EXPRESS AND SATA 1. GENERAL DESCRIPTION The W83176R-401 supports eight current mode differential Clock pair’s buffer output companion devices to CK409 or CK410 clock generator. The W83176R-401 provides I2C serial bus interface to program the registers to enable or disable each clock outputs. The W83176R-401 accepts a reference clock as its input current mode differential pair’s clock. 2. PRODUCT FEATURES • • • • • • • • • Eight current mode differential clock pairs clock outputs Support zero delay buffer mode and normal buffer mode Supports every clock pairs hardware output enable/disable pin Programmable PLL bandwidth Support PLL or NORMAL mode buffer output Low Skew outputs (< 50ps) Low cycle to cycle jitter (