W83310S/W83310SG
W inbond Bus Termination Regulator With Over Temp. & Current Limit Protection W83310S W83310SG
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Publication Release Date: Jan. 2006 Revision 0.7
W83310S/W83310SG
W83310S Datasheet Revision History
PAGES DATES VERSION VERSION ON WEB MAIN CONTENTS
1. 2. 3 4 5 3,9 12 3 2,3,11
Oct./03 Oct./03 Feb./04 Jul./04 Jan./06
0.5 0.51 0.60 0.61 0.7
N.A. N.A. N.A. N.A. N.A
All versions before 0.5 are for internal use only. AC spec. and typical waveform update. Add the thermal data. Add min./typ. value of VIN. Modify application circuit, AC characteristic and add Pb-free part no: W83310SG.
Please note that all data and specifications are subject to change without notice. All the trademarks of products and companies mentioned in this datasheet belong to their respective owners. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales.
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W83310S/W83310SG
Table of Contents1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. GENERAL DESCRIPTION ......................................................................................................... 4 FEATURES ................................................................................................................................. 4 APPLICATIONS .......................................................................................................................... 4 PIN CONFIGURATION AND DESCRIPTION ............................................................................ 5 APPLICATION CIRCUIT............................................................................................................. 6 INTERNAL BLOCK DIAGRAM- W83310S ................................................................................. 7 ELECTRICAL CHARACTERISTICS........................................................................................... 8 7.1 AC CHARACTERISTICS................................................................................................ 8 TYPICAL OPERATING WAVEFORM......................................................................................... 9 PACKAGE DIMENSION (POWER SOP-8) .............................................................................. 15 THERMAL PERFORMANCE.................................................................................................... 16 ORDERING INFORMATION .................................................................................................... 16 HOW TO READ THE TOP MARKING...................................................................................... 16
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Publication Release Date: Jan. 2006 Revision 0.7
W83310S/W83310SG
1. GENERAL DESCRIPTION
The W83310S is a linear regulator which provides achieves continuous 1.8 Amp bi-directional sinking and driving capability for DDR SDRAM bus terminator application. The chip simply implement a stable power supply which can track half of input power dynamically for bus terminator with a single chip; that is the chip integrates two power MOSFETs. There is no any external power device needed. The W83310S is promoted with SOP-8 power package. With W83310S design, a high integration, high performance, and cost-effective solution is promoted.
2. FEATURES
Regulates a bi-directional power with driving and sinking capability Provides achieve continuous 1.8Amp driving and sinking current Power MOSFET integrated Low external component count Low output voltage offset Operates with +3.3V and +2.5V control power Current limit protection Over temperature protection Power package SOP-8 Low cost and easy to use
3. APPLICATIONS
DDR and DDR II Bus Termination Regulator Active Termination Bus SSTL-2 SSTL-3
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W83310S/W83310SG
4. PIN CONFIGURATION AND DESCRIPTION
VIN GND VREF VOUT 1 2 3 4 8 NC
inbond W83310S
7 NC 6 VCNTL 5 NC
SYMBOL
PIN
FUNCTION
VIN GND VREF VOUT NC VCNTL NC NC
1 2 3 4 5 6 7 8
Power input pin. Ground. Reference voltage and Chip enable. Output voltage. No function Gate drive voltage. No function No function
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Publication Release Date: Jan. 2006 Revision 0.7
W83310S/W83310SG
5. APPLICATION CIRCUIT
2.5VSTR
2.5VSTR/VCC3 U1
R1 100K
VIN C1 1000u GND VREF
NC 3.3VDL/VCC3 NC VCNTL NC R3 1K C3 1u
3 Q1 ENABLE# 1 2N7002 2 R2 100K
C2 1u R4 1K C4 1u
VOUT C5 1000u
W83310S/SG
Note: R4=1 Kohm reserve for VOUT discharge or sink internal bias when VIN is not present but VCNTL is present. R3=1 Kohm reserve for sink internal bias when VCNTL is not present but VIN is present.
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W83310S/W83310SG
6. INTERNAL BLOCK DIAGRAM- W83310S
VCNTL VIN
Current Limit & OTP
VREF
Control
Logic Circuit
VOUT
GN
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Publication Release Date: Jan. 2006 Revision 0.7
W83310S/W83310SG
7. ELECTRICAL CHARACTERISTICS
7.1 AC CHARACTERISTICS
W83310S VIN=2.5V,VCNTL=3.3V,VREF=1.25V,COUT=100UF, TA = 0°C TO +70°C PARAMETER SYMBOL MIN TYP MAX UNITS TEST CONDITIONS
Output Offset Voltage Load Regulation
VOS
-20 -20 -20
20 20 20 2.5/1.8 3.3 1 3.63 3.63 1.5 1
mV mV
IOUT=0A Loading: 0A 2.0A Loading: 0A 2.0A
Input Voltage Range Operating Current of VCNTL Operating Current of VIN Shutdown Threshold Trigger Shutdown Current of VIN Short Current Limit Over Temperature Protection
VIN VCNTL IVCNTL IVIN
1.7
V mA mA V V uA A No Load(IOUT=0A) No Load(IOUT=0A) Output=High Output=Low VREF
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