W91542N

W91540N SERIES 10-MEMORY TONE/PULSE DIALER WITH SAVE, KEYTONE, LOCK, AND HANDFREE FUNCTIONS GENERAL DESCRIPTION The W91540N series are tone/pulse switchable telephone dialers with 10 memories, keytone or lock function, and handfree dialing control. These chips are fabricated using Winbond's high-performance CMOS technology and thus offer good performance in low-voltage and low-power operations. FEATURES • • • • • • • • • • • • • • • • • • • • DTMF/pulse switchable dialer Two by 32-digit redial and save memory Ten by 16 digit two-touch indirect repertory memory Pulse-to-tone (*/T) keypad for long distance call operation Cascaded dialing Uses 5 × 5 keyboard Easy operation with redial, flash, pause, and */T keypads Pause, P→T (pulse-to-tone) can be stored as a digit in memory 0 or 9 dialing inhibition pin for PABX system or long distance dialing lock out Dialing rate (10 ppS or 20 ppS) selected by bonding option Minimum tone output duration: 93 mS (W91544AN: 87 mS) Minimum intertone pause: 93 mS (W91544AN: 87 mS) Pause time: 3.6 sec 300 mS off-hook delay in lock mode ( DP remains low for 300 mS while off-hook) Flash break time (73 mS, 100 mS, 300 mS, or 600 mS) selectable by keypad; pause time is 1.0 S Make/break ratio (2:3 or 1:2) selectable by Mode pin Key tone output for valid keypad entry recognition On-chip power-on reset Uses 3.579545 MHz crystal or ceramic resonator Packaged in 18 or 20-pin DIP -1- Publication Release Date: May 1997 Revision A2 W91540N SERIES • The different dialers in the W91540N series are shown in the following table: TYPE NO. W91540N REPLACEMENT TYPE NO. W91540 W91541 W91540AN W91540A W91541A W91541LN W91541ALN W91542N W91542AN W91544AN W91541L W91541AL W91542 W91542A New type 10 10 20 20 10 600/300/73/100 600/300/73/100 600/300/73/100 600/300/73/100 600/300/73/100 Pin Pin Pin Pin Pin Yes Yes Yes Yes Yes Yes Yes Yes 18 20 18 20 20 10 600/300/73/100 Pin Yes Yes 20 PULSE (ppS) 10 FLASH (mS) 600/300/73/100 M/B Pin KEY TONE Yes HANDFREE DIALING LOCK PACKAGE (PINS) 18 Note: The W91544AN is designed specifically for use in France. The pause time is not added in pulse-to-tone mode. PIN CONFIGURATIONS C1 C1 C2 C3 C4 KT VSS XT XT T/P MUTE 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 R4 R3 R2 R1 VDD MODE DTMF DP/C5 HKS C2 C3 C4 KT V SS XT XT T/P MUTE HFI 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 R4 R3 R2 R1 VDD MODE DTMF DP/C5 HKS HFO W91540N/542N W91540AN/542AN/544AN -2- W91540N SERIES Pin Configurations, continued C1 C1 C2 C3 C4 LOCK VSS XT XT T/P MUTE 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 R4 R3 R2 R1 VDD MODE DTMF DP/C5 HKS C2 C3 C4 LOCK V SS XT XT T/P MUTE HFI 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 R4 R3 R2 R1 VDD MODE DTMF DP/C5 HKS HFO W91541LN W91541ALN PIN DESCRIPTION SYMBOL Column-Row Inputs 18-PIN 1−4 & 15−18 20-PIN 1−4 & 17−20 I/O I FUNCTION The keyboard input is compatible with a standard 5 × 5 keyboard, an inexpensive single contact (Form A) keyboard, and electronic input. In normal operation, any single button can be pushed to produce a dual tone, pulses, or a function. Activation of two or more buttons will result in no response except for single tone. I A built-in inverter provides oscillation with an inexpensive 3.579545 MHz crystal. The oscillator ceases when a keypad input is not sensed. The crystal frequency deviation is 0.02%. Crystal oscillator output pin. The T/P MUTE is a conventional CMOS Nchannel open drain output. The output transistor is switched on low level during dialing sequence (both pulse and tone mode). Otherwise, it is switched off. XT 7 7 XT 8 9 8 9 O O T/P MUTE -3- Publication Release Date: May 1997 Revision A2 W91540N SERIES Pin Description, continued SYMBOL MODE 18-PIN 13 20-PIN 15 I/O I FUNCTION Pulling mode pin to VSS places dialer in tone mode. Pulling mode pin to VDD places dialer in pulse mode with M/B ratio of 40:60 (10 ppS, except for W91542N/542AN is 20 ppS). Leaving mode pin floating places dialer in pulse mode with M/B ratio of 33.3:66.7 (10 ppS, except for W91542N/542AN is 20 ppS). HKS 10 12 I The HKS (hook switch) input is used to sense whether the handset is on-hook or off-hook. On-hook state, HKS = 1: chip is in sleeping mode, no operation. Off-hook state, HKS = 0: chip is enabled for normal operation. HKS pin is pulled to VDD by an internal resistor. KT 5 (except for W91541LN) 5 (except for W91541ALN) O The key tone output is a conventional CMOS inverter. The key tone is generated when any valid key is pressed; the KT pin generates a 1.2 KHz square wave at 35 mS. When no key is pressed, the KT pin remains in low state. The function of this terminal is to prevent "0" dialing and "9" dialing under PABX system long distance call control. When the first key input after reset is 0 or 9, all key inputs, including the 0 or 9 key, become invalid and the chip generates no output. The telephone is reinitialized by a reset. The function of the LOCK pin is shown below: LOCK PIN VDD Floating VSS FUNCTION "0", "9" dialing inhibited Normal dialing "0" dialing inhibited LOCK 5 (only for W91541LN) 5 (only for W91541ALN) I DP / C5 11 13 O N-channel open drain dialing pulse output. Flash key will cause DP to be active in either tone mode or pulse mode. In lock mode, DP remains low for 300 mS during off-hook delay time. The timing diagram for pulse mode is shown in Figure 1(a, b, c, d). -4- W91540N SERIES Pin Description, continued SYMBOL DTMF 18-PIN 12 20-PIN 14 I/O O FUNCTION During pulse dialing, this pin remains in low state regardless of keypad input. In tone mode, it will output a dual or single tone. A detailed timing diagram for tone mode is shown in Figure 2(a, b, c, d) OUTPUT FREQUENCY Specified R1 R2 R3 R4 C1 C2 C3 697 770 852 941 1209 1336 1477 Actual 699 766 848 948 1216 1332 1472 Error % +0.28 -0.52 -0.47 +0.74 +0.57 -0.30 -0.34 VDD, VSS HFI , HFO 14, 6 - 16, 6 10, 11 I I, O Power input pins for the dialer chip. VDD is the main power and VSS is the ground. Handfree control pins. A low pulse on the HFI input pin toggles the handfree control state. Status of the handfree control is listed in the following table: CURRENT STATE Hook SW. HFO Low On Hook Off Hook On Hook Off Hook Off Hook Low High High High NEXT STATE Input HFI HFI HFI Off Hook On Hook On Hook HFO High Low Low Low Low High Dialing Yes No Yes Yes No Yes HFI pin is pulled to VDD by an internal resistor. Detailed timing diagram is shown in Figure 3. -5- Publication Release Date: May 1997 Revision A2 W91540N SERIES BLOCK DIAGRAM XT XT HKS HFI SYSTEM CLOCK GENERATOR ROW (R1 to R4, Vx) KEYBOARD INTERFACE COLUMN (C1 to C4) LOCATION LATCH CONTROL LOGIC READ/WRITE COUNTER LOCK MODE T/P MUTE RAM PULSE CONTROL LOGIC KT DP/C5 HFO DTMF D/A CONVERTER ROW & COLUMN PROGRAMMABLE COUNTER DATA LATCH & DECODER FUNCTIONAL DESCRIPTION C1 1 4 7 ∗/T F1 • • • • • • C2 2 5 8 0 F2 C3 3 6 9 # F3 C4 S F4 A R/P DP / C5 R1 R2 R3 SAVE R4 Vx S: Store function key A: Indirect repertory memory dialing function key R/P: Redial and pause function key ∗/T: ∗ in tone mode and P→T in pulse mode SAVE: Save function key for one-touch 32-digit memory F1, ..., F4: Flash function keys; F1 = 600 mS, F2 = 300 mS, F3 = 73 mS, F4 = 100 mS, and flash pause time for each key is 1.0 mS Note: Ln = 0, ..., 9; Dn = 0, ..., 9, */T, #, Pause. -6- W91540N SERIES Normal Dialing OFF HOOK , (or ON HOOK & HFI ¡õ ), D1 , D2 , ..., Dn 1. D1, D2, …, Dn will be dialed out. 2. Dialing length is unlimited, but redial is inhibited if length exceeds 32 digits in normal dialing. Redialing Dialing OFF HOOK Come , (or ON HOOK , & HFI ¡õ , (or ), D1 , D2 , ..., Dn ), , Busy R/P ON HOOK OFF HOOK ON HOOK & HFI ¡õ 1. The redial memory content will be D1, D2, ..., Dn. 2. The R/P key can execute the redial function only as the first key-in after off-hook; otherwise, it will execute pause function. Number Store OFF HOOK , (or ON HOOK & HFI ¡õ ), D1 , D2 , ..., S Dn ,S ,S , Ln 1. If the sequence of the dialed digits D1, D2, …, Dn has not finished, 2. D1, D2, ..., Dn will be dialed out and stored in memory location Ln. OFF HOOK 3. , (or ON HOOK & HFI ¡õ ), S , D1 , D2 will be ignored. , ..., Dn ,S , Ln D1, D2, …, Dn will be stored in memory location Ln but will not be dialed out. keys can be stored as a digit in memory, but R/P key cannot be the 4. R/P and */T first digit. In store mode, R/P is the pause function key. 5. The store mode is released after the store function is executed or when the state of the hook switch changes or the flash function is executed. Save OFF HOOK , (or ON HOOK & HFI ¡õ ), D1 , D2 , ..., Dn , SAVE 1. D1, D2, ..., Dn will be dialed out. 2. If the dialing of D1 to Dn is finished, pressing SAVE will cause D1 to Dn to be duplicated to save memory. OFF HOOK , (or ON HOOK & HFI ¡õ ), SAVE 3. D1 to Dn will be dialed out after SAVE key is pressed. -7- Publication Release Date: May 1997 Revision A2 W91540N SERIES Repertory Dialing OFF HOOK , (or ON HOOK & HFI ¡õ ), SAVE 1. The content of save memory location will be dialed out. OFF HOOK , (or ON HOOK & HFI ¡õ ), A , Ln 2. The content of memory location Ln will be dialed out. Access Pause OFF HOOK , (or ON HOOK & HFI ¡õ ), D1 , D2 , R/P , D3 , ..., Dn 1. The pause function can be stored as a digit in memory. 2. The pause function is executed in normal dialing or redialing or memory dialing. 3. The pause function timing diagram is shown in Figure 4. Pulse-to-tone (*/T) OFF HOOK , D2' , ..., , (or Dn' ON HOOK & HFI ¡õ ), D1 , D2 , ..., Dn , */T , D1' 1. If the mode switch is set to pulse mode, then the output signal will be as follows: All versions except W91544AN: D1, D2, ..., Dn, Pause, D1', D2', ..., Dn' (Pulse) (Tone) W91544AN: D1, D2, ..., Dn, *, D1', D2', ..., Dn' (Pulse) (Tone) (Tone) 2. If the mode switch is set to tone mode, then the output signal will be as follows: D1, D2, ..., Dn, *, D1', D2', ..., Dn' (Tone) (Tone) 3. The dialer remains in tone mode when the digits have been dialed out and can be reset to pulse mode only by going on-hook. 4. The function timing diagram is shown in Figure 5(a, b). Flash OFF HOOK , (or ON HOOK & HFI ¡õ ), Fn 1. Fn = F1, ..., F4. 2. If Fn is pressed, the dialer will execute a flash break time of 600 mS (F1), 300 mS (F2), 73 mS (F3), or 100 mS (F4). In each case the flash pause time is 1.0 second. -8- W91540N SERIES 3. Flash key cannot be stored as a digit in memory. The flash key has first priority among keyboard functions. 4. The system will return to the initial state after the flash pause time is finished. 5. The flash function timing diagram is shown in Figure 6. Cascaded Dialing 1. Normal Dialing (1st sequence) 2. Repertory Dialing (1st sequence) 3. Redialing + (1st sequence) + Repertory Dialing (2nd sequence) + Normal Dialing (2nd sequence) Normal Dialing (2nd sequence) + Repertory Dialing + Repertory Dialing + Normal Dialing 4. Redialing and save dialing are valid only as the first key-in. ABSOLUTE MAXIMUM RATINGS PARAMETER DC supply voltage Input/Output Voltage SYMBOL VDD−VSS VIL VIH VOL VOH Power dissipation Operating temperature Storage temperature PD TOPR TSIG RATING -0.3 to +7.0 VSS -0.3 VDD +0.3 VSS -0.3 VDD +0.3 120 -20 to +70 -55 to +150 UNIT V V V V V mW °C °C Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. -9- Publication Release Date: May 1997 Revision A2 W91540N SERIES DC CHARACTERISTICS (VDD−VSS = 2.5V, Fosc. = 3.58 MHZ, TA = 25° C; all outputs unloaded) PARAMETER Operating Voltage Operating Current Standby Current Memory Retention Current Tone Output Voltage Pre-emphasis DTMF Distortion DTMF Output DC Level DTMF Output Sink Current DP Output Sink Current SYM. VDD IOP ISB IMR VTO CONDITIONS Tone Pulse HKS = 0, No load & No key entry HKS = 1, VDD = 1.0V MIN. 2.0 130 1 1.0 0.2 0.5 0.5 0.5 0.5 0.5 0.5 4 200 - TYP. 0.4 0.2 150 2 -30 400 - MAX. 5.5 0.6 0.4 15 0.2 170 3 -23 3.0 5.0 UNIT V mA mA µA µA mVrm s dB dB V mA mA mA mA mA mA mA µA µA KΩ Row group, RL = 5 KΩ Col/Row VDD = 2.0−5.5V THD VTDC ITL IPL IML IKTH IKTL IHFH IHFL IKD IKS RL = 5 KΩ VDD = 2.0−5.5V RL = 5 KΩ VDD = 2.0−5.5V VTO = 0.5V VPO = 0.5V VMO = 0.5V VKTH = 2.0V VKTL = 0.5V VHFH = 2.0V VHFL = 0.5V VI = 0V VI = 2.5V T/P MUTE Output Sink Current KT Drive/Sink Current HFO Drive/Sink Current Keypad Input Drive Current Keypad Input Sink Current Keypad Resistance - 10 - W91540N SERIES AC CHARACTERISTICS PARAMETER Key-in Debounce Key Release Debounce On-hook Debounce Pre-digit Pause1 SYM. TKID TKRD TOHD TPDP1 10 ppS Pre-digit Pause2 TPDP2 20 ppS Inter-digit Pause (Auto Dialing) Make/Break Ratio M:B TIDP CONDITIONS Lock Mode Unlock Mode Mode Pin = VDD Mode Pin = Floating Mode Pin = VDD Mode Pin = Floating 10 ppS 20 ppS Mode Pin = VDD Mode Pin = Floating Tone Output Duration Intertone Pause Tone Output Duration Intertone Pause Flash Break Time TTD TITP TTD TITP TFB Except for W91544AN Except for W91544AN W91544AN Only W91544AN Only F1 F2 F3 F4 Flash Pause Time Pause Time Key Tone Frequency Key Tone Duration One-key Redialing Pause Time One-key Redialing Break Time Off-hook Delay First Key-in Delay Notes: MIN. - TYP. 20 20 20 150 40 33.3 20 16.7 800 500 40:60 33.3:66.7 93 93 87 87 600 300 73 100 1.0 3.6 1.2 35 600 2.2 300 300 MAX. - UNIT mS mS mS mS mS mS mS mS mS mS % % mS mS mS mS mS TFP TP FKT TKTD TRP TRB TOFD TFKD Lock Only Lock Only - S S KHz mS mS S mS mS - 11 - Publication Release Date: May 1997 Revision A2 W91540N SERIES 1. Crystal parameters suggested for proper operation are Rs < 100 Ω, Lm = 96 mH, Cm = 0.02 pF, Cn = 5 pF, Cl = 18 pF, Fosc. = 3.579545 MHz ±0.02%. 2. Crystal oscillator accuracy directly affects these times. TIMING WAVEFORMS HKS KEY IN DP T/P MUTE KT DTMF OSC. < 600mS < 300mS TKRD 4 2 MB MB 3 TKID 2 TKID TIDP TPDP TIDP TIDP TIDP TPDP Low OSCILLATION OSCILLATION Figure 1(a). Normal Dialing Timing Diagram (Pulse Mode Without Lock Function) < 600mS HKS < 300mS TKRD 4 TKID 2 MB MB KEY IN DP T/P MUTE KT DTMF OSC. 3 TOFD 2 TKID TIDP TPDP TIDP TPDP TFKD TIDP Low OSCILLATION OSCILLATION Figure 1(b). Normal Dialing Timing Diagram (Pulse Mode with Lock Function) - 12 - W91540N SERIES Timing Waveforms, continued HKS KEY IN DP T/P MUTE KT DTMF OSC. < 600mS TKRD R/P TKID MB MB TPDP TIDP TIDP TIDP Low OSCILLATION Figure 1(c). Auto Dialing Timing Diagram (Pulse Mode Without Lock Function) HKS KEY IN DP T/P MUTE KT DTMF OSC. < 600mS 300mS R/P T KID MB TOFD TPDP TFKD TIDP MB T IDP TIDP Low OSCILLATION Figure 1(d). Auto Dialing Timing Diagram (Pulse Mode with Lock Function) - 13 - Publication Release Date: May 1997 Revision A2 W91540N SERIES Timing Waveforms, continued < 600 mS HKS < 300 mS TKRD 4 2 5 2 TKID TITP TKRD KEY IN DTMF 3 TKID TTD TITP TITP TITP T/P MUTE KT DP OSC. OSCILLATION High OSCILLATION OSCILLATION Figure 2(a). Normal Dialing Timing Diagram (Tone Mode Without Lock Function) HKS KEY IN DTMF < 600 mS < 300 mS TKRD 4 2 5 2 TKID 3 TTD T/P MUTE TFKD KT DP OSC. TOFD TITP TITP TITP OSCILLATION OSCILLATION Figure 2(b). Normal Dialing Timing Diagram (Tone Mode with Lock Function) - 14 - W91540N SERIES Timing Waveforms, continued HKS KEY IN DTMF < 600mS TKRD R/P T KID TTD T/P MUTE KT DP OSC. TITP TITP High OSCILLATION Figure 2(c). Auto Dialing Timing Diagram (Tone Mode Without Lock Function) < 600mS HKS TKRD KEY IN DTMF TTD T/P MUTE 300mS R/P TITP TITP TFKD KT DP OSC. TOFD OSCILLATION Figure 2(d) Auto Dialing Timing Diagram (Tone Mode with Lock Function) - 15 - Publication Release Date: May 1997 Revision A2 W91540N SERIES Timing Waveforms, continued HKS HFI HFO ON HOOK T/P MUTE CHIP ENBLE High Figure 3. Handfree Timing Diagram HKS KEY IN DP T/P MUTE KT DTMF OSC. < 600mS 300mS 2 R/P 3 TOFD TKID MB MB TIDP TPDP TP TPDP TFKD OSCILLATION Low OSCILLATION Figure 4. Pause Function Timing Diagram - 16 - W91540N SERIES Timing Waveforms, continued < 600mS HKS KEY IN DP T/P MUTE TIDP KT DTMF OSC. TFKD OSCILLATION 300mS TOFD 2 TKID MB */T 3 TPDP TP TITP OSCILLATION Figure 5(a). Pulse-to-tone Timing Diagram (All Versions Except W91544AN) HKS TKRD KEY IN DP T/P MUTE KT DTMF TITP OSC. OSCILLATION 4 TKID MB */T 2 TKID TIDP TPDP TITP OSCILLATION Figure 5(b). Pulse-to-tone Timing Diagram (W91544AN Only) - 17 - Publication Release Date: May 1997 Revision A2 W91540N SERIES Timing Waveforms, continued HKS KEY IN DP F TKID Low F F 3 TFP TFB TKID TKID TFB HFI HFO T/P MUTE KT DTMF TITP OSC. OSCILLATION Figure 6. Flash Timing Diagram - 18 - W91540N SERIES Headquarters No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5792697 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-7197006 Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Kowloon, Hong Kong TEL: 852-27516023 FAX: 852-27552064 Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2730 Orchard Parkway, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668 Taipei Office 11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-7190505 FAX: 886-2-7197502 Note: All data and specifications are subject to change without notice. - 19 - Publication Release Date: May 1997 Revision A2