AH103A

AH103A Product Features • • • • • • • 60 – 2700 MHz +27 dBm P1dB +46 dBm Output IP3 29 dB Gain @ 900 MHz Excellent ACPR MTTF > 100 Years Lead-free/green/RoHS-compliant SOIC-8 Package w/ heat slug The Communications Edge TM Product Information High Gain, High Linearity ½-Watt Amplifier Product Description The AH103A is a high gain, high linearity ½-Watt amplifier. This device is comprised of two individual MMIC amplifiers internally and can be used with an external interstage match for any of the mobile infrastructure frequency bands. The dual-stage amplifier achieves up to +46 dBm IP3 performance with 29 dB gain. The device conforms to WJ Communications’ long history of producing high reliability and quality components. The AH103A has an associated MTTF of a minimum of 100 years at a mounting temperature of 85 °C and is housed in a lead-free /green/RoHS-compliant SOIC-8 package. All devices are 100% RF & DC tested. The product is targeted for use as driver amplifiers for wireless infrastructure where high performance and high linearity are required. Functional Diagram 1 AMP 2 2 AMP 1 7 8 3 6 4 5 Applications • Mobile Infrastructure • W-LAN / ISM / RFID • MDS / MMDS Infrastructure Pin No. 1 2 3, 5, 8, Ground Backside copper RF in (Amp1 in) 4 RF out (Amp2 out) 6 Bias 2 7 Function Amp2 in Amp1 out / Bias 1 Specifications (1) Parameter Operational Bandwidth Test Frequency Gain Output IP3 Output P1dB Test Frequency Gain Input Return Loss Output Return Loss Output IP3 (2) Output P1dB Noise Figure Supply Voltage (Amp1) Supply Voltage (Amp2) Operating Current (3) Typical Performance (1) Units MHz MHz dB dB dBm MHz dB dB dB dBm dBm dB V V mA Min 60 Typ 900 29.1 +46 +27 1900 25.4 19 11 +45 +26.7 3 +4.5 +9 275 Max 2700 Parameter Frequency Gain Input Return Loss Output Return Loss Output IP3 Output P1dB IS-95 Ch. Power (4) @ -45 dBc ACPR Units MHz dB dB dB dBm dBm dBm dBm dB 2.5 900 29.1 20 19 +46 +27 +20.7 Typical 1900 25.4 19 11 +45 +26.7 +20.5 +18.5 3 2.9 +4.5 V @ 75 mA +9 V @ 200 mA 2140 25 24 11 +45 +26.3 23.5 W-CDMA Ch. Power (5) @ -45 dBc ACPR / ACLR +42 +25 Noise Figure Supply Bias Amp1 Supply Bias Amp2 225 330 4. ACPR is measured at 900 and 1900 MHz with a IS-95, 9 Channels Forward, ±885 kHz offset, 30 kHz BW, 1.23 MHz Channel BW. 5. ACLR is measured at 2140 MHz with a 3GPP W-CDMA, Test Model 1+64 DPCH, ±5 MHz offset, 3.84 MHz Channel BW. 1. Test conditions unless otherwise noted: 25 ºC, Vdd1 = +4.5 V, Vdd2 = +9 V, in a tuned application circuit. 2. 3OIP measured with two tones at an output power of +8 dBm/tone separated by 10 MHz. The suppression on the largest IM3 product is used to calculate the 3OIP using a 2:1 rule. 3. Amp1 and Amp2 have a typical current draw of 75 and 200 mA, respectively. Absolute Maximum Rating Parameter Operating Case Temperature Storage Temperature DC Voltage (pin 2) DC Voltage (pin 6, 7) RF Input Power (continuous) Junction Temperature -40 to +85 °C -55 to +125 °C +6 V +11 V 4 dB above Input P1dB +220 °C Rating Ordering Information Part No. AH103A-G AH103A-PCB900 AH103A-PCB1900 AH103A-PCB2140 Description High Gain ½-Watt Amplifier (lead-free/green/RoHS-compliant SOIC-8 Pkg) 0.7 – 1.0 GHz Evaluation Circuit 1.8 – 2.0 GHz Evaluation Circuit 2.1 – 2.2 GHz Evaluation Circuit Operation of this device above any of these parameters may cause permanent damage. Specifications and information are subject to change without notice WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • W eb site: www.wj.com Page 1 of 6 March 2005 AH103A 1 AMP 2 2 AMP 1 7 8 The Communications Edge TM Product Information High Gain, High Linearity ½-Watt Amplifier Typical Device Data Typical AH103A Performance Chain Analysis at 900 MHz Stage 6 Gain (dB) Output P1dB (dBm) Output IP3 (dBm) NF (dB) Voltage (V) +4.5 +9 Current (mA) 75 200 275 3 4 5 Amplifier 1 Amplifier 2 AH103A 14.5 18 39 2.5 14.5 27.5 46.5 3.1 Cumulative Performance Cumulative Performance Output Output Gain NF P1dB IP3 (dB) (dB) (dBm) (dBm) 14.5 18 39 2.5 28.5 26.3 45.7 2.6 29 +26.3 +45.7 2.6 S-Parameters (Amplifier #1, VD = +4.5 V, ID = 75 mA, T = 25°C, calibrated to device leads, pin 4 = port 1, pin 2 = port 2) Freq (MHz) S11 (dB) S11 (ang) S21 (dB) S21 (ang) S12 (dB) S12 (ang) S22 (dB) S22 (ang) 50 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 -5.37 -8.33 -8.71 -8.77 -9.15 -9.05 -9.37 -9.59 -9.64 -9.21 -8.86 -8.31 -8.60 -8.80 -33.79 -28.53 -36.36 -47.76 -61.06 -73.89 -85.84 -97.65 -111.10 -124.09 -136.42 -148.36 -159.16 -170.83 15.86 14.72 14.53 14.39 14.12 14.00 13.79 13.52 13.20 12.86 12.52 12.43 12.06 11.72 160.65 161.63 155.57 147.36 139.46 131.54 123.95 115.85 108.12 100.77 93.26 87.59 80.18 73.78 -22.13 -21.04 -21.01 -20.88 -20.63 -20.79 -20.68 -20.70 -20.64 -20.53 -20.32 -20.44 -20.62 -20.23 22.13 1.23 -2.61 -5.20 -6.95 -8.56 -9.16 -12.14 -13.59 -14.44 -15.72 -19.85 -21.31 -23.96 -10.55 -16.88 -18.18 -18.38 -19.40 -20.14 -21.80 -21.91 -22.45 -22.22 -22.52 -25.39 -28.55 -31.34 -47.75 -35.01 -26.80 -27.81 -27.61 -30.37 -36.89 -45.14 -48.69 -46.08 -35.22 -32.83 10.91 53.94 S-Parameters (Amplifier #2, VD = +9 V, ID = 200 mA, T = 25°C, calibrated to device leads, pin 1 = port 1, pin 6 = port 2) Freq (MHz) S11 (dB) S11 (ang) S21 (dB) S21 (ang) S12 (dB) S12 (ang) S22 (dB) S22 (ang) 50 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 -10.73 -17.49 -16.10 -14.58 -12.52 -10.87 -9.59 -8.67 -7.90 -7.15 -6.58 -5.55 -4.74 -3.92 -73.81 -86.22 -103.75 -121.40 -136.69 -146.69 -156.43 -165.93 -175.53 173.98 162.87 152.83 143.80 136.87 16.87 15.78 15.50 15.19 14.76 14.45 14.01 13.61 13.27 12.83 12.44 11.97 11.24 10.64 155.39 153.56 140.93 125.52 111.04 96.62 83.29 69.48 56.52 42.38 28.36 14.25 0.41 -11.41 -19.73 -19.37 -19.51 -19.71 -20.10 -20.45 -20.94 -21.53 -22.11 -22.90 -23.56 -24.57 -25.97 -27.43 9.77 -9.85 -21.51 -31.31 -41.88 -52.24 -60.36 -70.30 -78.33 -88.46 -96.99 -106.84 -113.76 -122.11 -13.03 -27.33 -28.05 -22.04 -17.78 -14.38 -12.17 -10.50 -9.28 -8.06 -6.74 -5.79 -5.03 -4.60 -77.36 -71.86 -15.36 -19.22 -26.04 -37.86 -49.84 -64.25 -77.69 -89.74 -101.88 -111.67 -121.03 -131.14 Evaluation Board PCB Layout Circuit Board Material: .014” FR-4, 4 layers, .062” total thickness Specifications and information are subject to change without notice WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • W eb site: www.wj.com Page 2 of 6 March 2005 AH103A Typical RF Performance at 25°C Frequency Gain Input Return Loss Output Return Loss Output IP3 Output P1dB IS-95A Ch. Power @ -45 dBc ACPR The Communications Edge TM Product Information High Gain, High Linearity ½-Watt Amplifier Application Circuit: 700 – 1000 MHz (AH103AG-PCB900) 900 MHz 29.1 dB 20 dB 19 dB +46 dBm +27 dBm +20.7 dBm 2.5 dB +9 275 mA Noise Figure Supply Voltage Supply Current Notes: 1. A voltage regulator is used in this circuit (U2) to drop the +9 V to a +5 V usable supply for the first internal amplifier. It is permissible to remove the regulator and operate the 1st amplifier stage directly off of +5 V supply onto Test Point 1 (TP1). The use of a +5 V supply on the 1st amplifier stage requires a dropping resistor of 6.8 Ω. A +4.5 V supply can also be used to bypass the 6.8 Ω and can be applied to Test Point 2 (TP2). S-Parameters Wideband S-Parameters S22 31 30 Gain (dB) 29 28 27 26 700 S21 S11 0 -5 S11, S22 (dB) -10 -15 -20 G a in ( d B ) 30 20 10 0 -10 -20 -30 0 500 1000 1500 2000 2500 3000 Frequency (MHz) Output IP3 ACPR vs. Channel Power IS-95, 9 Ch. Fwd, ±885 kHz offset, 30 kHz Meas BW, 900 MHz S21 S11 S22 750 800 850 900 -25 950 1000 Frequency (MHz) Noise Figure 5 N o is e F i g u re ( d B ) 4 O IP 3 ( d B m ) 3 2 1 0 700 48 46 44 42 40 38 750 800 850 900 950 1000 6 8 10 12 14 -40 -50 -60 -70 -80 16 A C P R (d B c ) 14 Frequency (MHz) Outpu Power per tone (dBm) 16 18 20 Output Channel Power (dBm) 22 Specifications and information are subject to change without notice WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • W eb site: www.wj.com Page 3 of 6 March 2005 AH103A Typical RF Performance at 25°C Frequency Gain Input Return Loss Output Return Loss Output IP3 Output P1dB IS-95A Ch. Power @ -45 dBc ACPR The Communications Edge TM Product Information High Gain, High Linearity ½-Watt Amplifier Application Circuit: 1900 – 2000 MHz (AH103AG-PCB1900) 1900 MHz 25.4 dB 19 dB 11 dB +45 dBm +26.7 dBm +20.5 dBm 3 dB +9 V 275 mA Noise Figure Supply Voltage Supply Current Notes: 1. A voltage regulator is used in this circuit (U2) to drop the +9 V to a +5 V usable supply for the first internal amplifier. It is permissible to remove the regulator and operate the 1st amplifier stage directly off of +5 V supply onto Test Point 1 (TP1). The use of a +5 V supply on the 1st amplifier stage requires a dropping resistor of 6.8 Ω. A +4.5 V supply can also be used to bypass the 6.8 Ω and can be applied to Test Point 2 (TP2). S-Parameters Wideband S-Parameters S22 27 26 Gain (dB) 25 24 23 22 1800 S21 S11 0 -5 S11, S22 (dB) -10 -15 -20 -25 2000 G a in ( d B ) 30 20 10 0 -10 -20 S21 S11 S22 -30 0 500 1000 1500 2000 2500 3000 Frequency (MHz) 1850 1900 1950 Frequency (MHz) Noise Figure 5 N o is e F i g u re ( d B ) 4 O IP 3 ( d B m ) 3 2 1 0 1800 48 46 44 42 40 38 1850 1900 Frequency (MHz) 1950 2000 6 8 10 12 14 Output IP3 ACPR vs. Channel Power -40 -50 -60 -70 -80 IS-95, 9 Ch. Fwd, ±885 kHz offset, 30 kHz Meas BW, 1900 MHz 16 A C P R (d B c ) 14 Output Power per tone (dBm) 16 18 20 Output Channel Power (dBm) 22 Specifications and information are subject to change without notice WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • W eb site: www.wj.com Page 4 of 6 March 2005 AH103A Typical RF Performance at 25°C Frequency Gain Input Return Loss Output Return Loss Output IP3 Output P1dB W-CDMA Ch. Power @ -45 dBc ACPR The Communications Edge TM Product Information High Gain, High Linearity ½-Watt Amplifier Application Circuit: 2110 – 2170 MHz (AH103AG-PCB2140) 2140 MHz 25 dB 24 dB 11 dB +45 dBm +26.3 dBm +18.5 dBm 2.9 dB +9 V 275 mA Noise Figure Supply Voltage Supply Current Notes: 1. A voltage regulator is used in this circuit (U2) to drop the +9 V to a +5 V usable supply for the first internal amplifier. It is permissible to remove the regulator and operate the 1st amplifier stage directly off of +5 V supply onto Test Point 1 (TP1). The use of a +5 V supply on the 1st amplifier stage requires a dropping resistor of 6.8 Ω. A +4.5 V supply can also be used to bypass the 6.8 Ω and can be applied to Test Point 2 (TP2). S-Parameters Wideband S-Parameters S22 27 26 Gain (dB) 25 24 23 22 2050 S21 S11 0 -5 S11, S22 (dB) -10 -15 -20 -25 2250 G a in ( d B ) 30 20 10 0 -10 -20 S21 S11 S22 -30 0 500 1000 1500 2000 2500 3000 Frequency (MHz) 2100 2150 2200 Frequency (MHz) Noise Figure 5 N o is e F i g u re ( d B ) 4 O IP 3 ( d B m ) 3 2 1 0 2000 48 46 44 42 40 38 2050 2100 Frequency (MHz) 2150 2200 6 8 10 12 14 Output IP3 ACLR vs. Channel Power 3GPP W-CDMA, Test Model 1+64 DPCH, ±5 MHz offset, 2140 MHz -40 -45 -50 -55 -60 14 15 16 17 18 Output Channel Power (dBm) 19 16 Output Power per tone (dBm) Specifications and information are subject to change without notice WJ Communications, Inc • Phone 1-800-WJ1-4401 • FAX: 408-577-6621 • e-mail: sales@wj.com • W eb site: www.wj.com Page 5 of 6 March 2005 A C L R (d B c ) AH103A The Communications Edge TM Product Information High Gain, High Linearity ½-Watt Amplifier AH103A-G (Lead-Free Package) Mechanical Information This package is lead-free/green/RoHS-compliant. The plating material on the leads is NiPdAu. It is compatible with both lead-free (maximum 260°C reflow temperature) and lead (maximum 245°C reflow temperature) soldering processes. Outline Drawing Product Marking The component will be marked with an “103AG” designator followed by a alphanumeric lot code on the top surface of the package. Tape and reel specifications for this part are located on the website in the “Application Notes” section. ESD / MSL Information ESD Rating: Value: Test: Standard: ESD Rating: Value: Test: Standard: MSL Rating: Standard: Class 1B Passes 500 V to