WM8750BL

w DESCRIPTION The WM8750BL is a low power, high quality stereo CODEC designed for portable digital audio applications. The device integrates complete interfaces to stereo or mono microphones and a stereo headphone. External component requirements are drastically reduced as no separate microphone or headphone amplifiers are required. Advanced on-chip digital signal processing performs graphic equaliser, 3-D sound enhancement and automatic level control for the microphone or line input. The WM8750BL can operate as a master or a slave, with various master clock frequencies including 12 or 24MHz for USB devices, or standard 256fs rates like 12.288MHz and 24.576MHz. Different audio sample rates such as 96kHz, 48kHz, 44.1kHz are generated directly from the master clock without the need for an external PLL. The WM8750BL operates at supply voltages down to 1.8V, although the digital core can operate at voltages down to 1.42V to save power, and the maximum for all supplies is 3.6 Volts. Different sections of the chip can also be powered down under software control. The WM8750BL is supplied in a very small and thin 5x5mm QFN package, ideal for use in hand-held and portable systems. WM8750BL Stereo CODEC for Portable Audio Applications FEATURES • • • • • DAC SNR 97dB (‘A’ weighted), THD -85dB at 48kHz, 3.3V ADC SNR 88dB (‘A’ weighted), THD -80dB at 48kHz, 3.3V Complete Stereo / Mono Microphone Interface - Programmable ALC / Noise Gate On-chip 400mW BTL Speaker Driver (mono) On-chip Headphone Driver - >40mW output power on 16Ω / 3.3V - THD –73dB at 5mW, SNR 98dB with 16Ω load - No DC blocking capacitors required (capless mode) Separately mixed mono output Digital Graphic Equaliser Low Power - 6 mW stereo playback (1.8V / 1.5V supplies) - 13 mW record & playback (1.8V / 1.5V supplies) Low Supply Voltages - Analogue 1.8V to 3.6V - Digital core: 1.42V to 3.6V - Digital I/O: 1.8V to 3.6V 256fs / 384fs or USB master clock rates: 12MHz, 24MHz Audio sample rates: 8, 11.025, 16, 22.05, 24, 32, 44.1, 48, 88.2, 96kHz generated internally from master clock 5x5x0.9mm QFN package • • • • • • • APPLICATIONS • • • Portable Media Player Mobile phone handsets Mobile gaming BLOCK DIAGRAM WOLFSON MICROELECTRONICS plc To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/ Pre-Production, January 2007, Rev 3.3 Copyright 2007 Wolfson Microelectronics plc WM8750BL TABLE OF CONTENTS Pre-Production DESCRIPTION ................................................................................................................. 1 FEATURES ...................................................................................................................... 1 APPLICATIONS ............................................................................................................... 1 BLOCK DIAGRAM ........................................................................................................... 1 TABLE OF CONTENTS ................................................................................................... 2 PIN CONFIGURATION..................................................................................................... 3 ORDERING INFORMATION ............................................................................................ 3 PIN DESCRIPTION .......................................................................................................... 4 ABSOLUTE MAXIMUM RATINGS ................................................................................... 5 RECOMMENDED OPERATION CONDITIONS ................................................................ 5 ELECTRICAL CHARACTERISTICS................................................................................. 6 TYPICAL PERFORMANCE.............................................................................................. 8 POWER CONSUMPTION ............................................................................................................... 8 OUTPUT DRIVERS ......................................................................................................................... 9 OUTPUT PGA’S LINEARITY......................................................................................................... 10 SIGNAL TIMING REQUIREMENTS ............................................................................... 11 SYSTEM CLOCK TIMING .............................................................................................................11 AUDIO INTERFACE TIMING – MASTER MODE .........................................................................11 AUDIO INTERFACE TIMING – SLAVE MODE .............................................................................12 INTERNAL POWER ON RESET CIRCUIT ..................................................................... 15 DEVICE DESCRIPTION ................................................................................................. 16 INTRODUCTION ...........................................................................................................................16 INPUT SIGNAL PATH ...................................................................................................................16 AUTOMATIC LEVEL CONTROL (ALC) ........................................................................................23 OUTPUT SIGNAL PATH ...............................................................................................................27 ANALOGUE OUTPUTS.................................................................................................................32 ENABLING THE OUTPUTS ..........................................................................................................34 HEADPHONE SWITCH.................................................................................................................34 THERMAL SHUTDOWN ............................................................................................................... 35 HEADPHONE OUTPUT ................................................................................................................36 DIGITAL AUDIO INTERFACE .......................................................................................................37 AUDIO INTERFACE CONTROL ...................................................................................................41 CLOCKING AND SAMPLE RATES...............................................................................................43 CONTROL INTERFACE................................................................................................................45 POWER SUPPLIES.......................................................................................................................46 POWER MANAGEMENT ..............................................................................................................46 REGISTER MAP............................................................................................................. 49 DIGITAL FILTER CHARACTERISTICS.......................................................................... 50 TERMINOLOGY ............................................................................................................................50 DAC FILTER RESPONSES ..........................................................................................................51 ADC FILTER RESPONSES ..........................................................................................................52 DE-EMPHASIS FILTER RESPONSES .........................................................................................53 HIGHPASS FILTER.......................................................................................................................54 APPLICATIONS INFORMATION ................................................................................... 55 RECOMMENDED EXTERNAL COMPONENTS...........................................................................55 LINE INPUT CONFIGURATION....................................................................................................56 MICROPHONE INPUT CONFIGURATION...................................................................................56 MINIMISING POP NOISE AT THE ANALOGUE OUTPUTS ........................................................56 POWER MANAGEMENT EXAMPLES..........................................................................................57 IMPORTANT NOTICE .................................................................................................... 59 ADDRESS......................................................................................................................................59 w Pre-Production Rev 3.3 January 2007 2 Pre-Production WM8750BL PIN CONFIGURATION ORDERING INFORMATION ORDER CODE W M8750BLGEFL W M8750BLGEFL/R Note: Reel quantity = 3500 TEMPERATURE RANGE -25°C to +85°C -25°C to +85°C PACKAGE 32-lead QFN (5x5x0.9mm) (Pb-free) 32-lead QFN (5x5x0.9mm) (Pb-free, tape and reel) MOISTURE PEAK SOLDERING SENSITIVITY LEVEL TEMPERATURE MSL1 MSL1 260oC 260oC w Pre-Production Rev 3.3 January 2007 3 WM8750BL PIN DESCRIPTION PIN NO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Note: It is recommended that the QFN ground paddle should be connected to analogue ground on the application PCB. NAME MCLK DCVDD DBVDD DGND BCLK DACDAT DACLRC ADCDAT ADCLRC MONOOUT OUT3 ROUT1 LOUT1 HPGND ROUT2 LOUT2 HPVDD AVDD AGND VREF VMID MICBIAS RINPUT3 / HPDETECT LINPUT3 RINPUT2 LINPUT2 RINPUT1 LINPUT1 MODE CSB SDIN SCLK Supply Supply Supply Digital Input / Output Digital Input Digital Input / Output Digital Output Digital Input / Output Analogue Output Analogue Output Analogue Output Analogue Output Supply Analogue Output Analogue Output Supply Supply Supply Analogue Output Analogue Output Analogue Output Analogue Input Analogue Input Analogue Input Analogue Input Analogue Input Analogue Input Digital Input Digital Input Digital Input/Output Digital Input TYPE Digital Input Master Clock Digital Core Supply Digital Buffer (I/O) Supply DESCRIPTION Pre-Production Digital Ground (return path for both DCVDD and DBVDD) Audio Interface Bit Clock DAC Digital Audio Data Audio Interface Left / Right Clock/Clock Out ADC Digital Audio Data Audio Interface Left / Right Clock Mono Output Analogue Output 3 (can be used as Headphone Pseudo Ground) Right Output 1 (Line or Headphone) Left Output 1 (Line or Headphone) Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2) Right Output 1 (Line or Headphone or Speaker) Left Output 1 (Line or Headphone or Speaker) Supply for Analogue Output Drivers (LOUT1/2, ROUT1/2, MONOUT) Analogue Supply Analogue Ground (return path for AVDD) Reference Voltage Decoupling Capacitor Midrail Voltage Decoupling Capacitor Microphone Bias Right Channel Input 3 or Headphone Plug-in Detection Left Channel Input 3 Right Channel Input 2 Left Channel Input 2 Right Channel Input 1 Left Channel Input 1 Control Interface Selection Chip Select / Device Address Selection Control Interface Data Input / 2-wire Acknowledge output Control Interface Clock Input w Pre-Production Rev 3.3 January 2007 4 Pre-Production WM8750BL ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are: MSL1 = unlimited floor life at 0.5465fs 0.5465fs -50 dB f > 0.584fs +/- 0.03dB -6dB 0.584fs -50 0 0.5fs +/- 0.03 dB 0.4535fs dB +/- 0.03dB -6dB 0 0.5fs +/-0.03 dB 0.416fs -60 3.7 10.4 21.6 dB Hz -60 0 0.5fs +/- 0.05 dB 0.4535fs dB dB ADC Filter Type 1 (USB mode, 272fs or Normal mode operation) DAC Filter Type 1 (USB mode, 272fs or Normal mode operation) Table 47 ADC/DAC Digital Filters Group Delay TERMINOLOGY 1. 2. Stop Band Attenuation (dB) – the degree to which the frequency spectrum is attenuated (outside audio band) Pass-band Ripple – any variation of the frequency response in the pass-band region w Pre-Production Rev 3.3 January 2007 50 Pre-Production WM8750BL DAC FILTER RESPONSES 0.02 0 0.01 -20 0 Response (dB) -40 Response (dB) 0 0.5 1 1.5 Frequency (Fs) 2 2.5 3 -0.01 -0.02 -0.03 -0.04 -0.05 -60 -80 -100 -0.06 0 0.05 0.1 0.15 0.2 0.25 0.3 Frequency (Fs) 0.35 0.4 0.45 0.5 Figure 27 DAC Digital Filter Frequency Response – Type 0 Figure 28 DAC Digital Filter Ripple – Type 0 0.02 0 0.01 -20 0 Response (dB) -40 Response (dB) -0.01 -0.02 -0.03 -0.04 -60 -80 -0.05 -100 0 0.5 1 1.5 Frequency (Fs) 2 2.5 3 -0.06 0 0.05 0.1 0.15 0.2 0.25 0.3 Frequency (Fs) 0.35 0.4 0.45 0.5 Figure 29 DAC Digital Filter Frequency Response – Type 1 Figure 30 DAC Digital Filter Ripple – Type 1 0.02 0 0.01 -20 0 Response (dB) -40 Response (dB) -0.01 -0.02 -0.03 -0.04 -60 -80 -0.05 -100 0 0.5 1 1.5 Frequency (Fs) 2 2.5 3 -0.06 0 0.05 0.1 0.15 Frequency (Fs) 0.2 0.25 Figure 31 DAC Digital Filter Frequency Response – Type 2 Figure 32 DAC Digital Filter Ripple – Type 2 w Pre-Production Rev 3.3 January 2007 51 WM8750BL 0.25 0 Pre-Production 0.2 -20 0.15 0.1 Response (dB) Response (dB) -40 0.05 0 -0.05 -0.1 -60 -80 -0.15 -0.2 -100 0 0.5 1 1.5 Frequency (Fs) 2 2.5 3 -0.25 0 0.05 0.1 0.15 Frequency (Fs) 0.2 0.25 Figure 33 DAC Digital Filter Frequency Response – Type 3 Figure 34 DAC Digital Filter Ripple – Type 3 ADC FILTER RESPONSES 0.04 0 0.03 -20 0.02 Response (dB) Response (dB) 0.01 0 -0.01 -0.02 -40 -60 -80 -0.03 -100 0 0.5 1 1.5 Frequency (Fs) 2 2.5 3 -0.04 0 0.05 0.1 0.15 0.2 0.25 0.3 Frequency (Fs) 0.35 0.4 0.45 0.5 Figure 35 ADC Digital Filter Frequency Response – Type 0 0 Figure 36 ADC Digital Filter Ripple – Type 0 0.02 0.01 -20 0 Response (dB) -40 Response (dB) -0.01 -0.02 -0.03 -0.04 -60 -80 -0.05 -100 0 0.5 1 1.5 Frequency (Fs) 2 2.5 3 -0.06 0 0.05 0.1 0.15 0.2 0.25 0.3 Frequency (Fs) 0.35 0.4 0.45 0.5 Figure 37 ADC Digital Filter Frequency Response – Type 1 Figure 38 ADC Digital Filter Ripple – Type 1 w Pre-Production Rev 3.3 January 2007 52 Pre-Production 0.25 0 WM8750BL 0.2 -20 0.15 0.1 Response (dB) Response (dB) -40 0.05 0 -0.05 -0.1 -60 -80 -0.15 -0.2 -100 0 0.5 1 1.5 Frequency (Fs) 2 2.5 3 -0.25 0 0.05 0.1 0.15 Frequency (Fs) 0.2 0.25 Figure 39 ADC Digital Filter Frequency Response – Type 2 Figure 40 ADC Digital Filter Ripple – Type 2 0.25 0 0.2 0.15 -20 0.1 Response (dB) Response (dB) -40 0.05 0 -0.05 -0.1 -60 -80 -0.15 -0.2 -100 0 0.5 1 1.5 Frequency (Fs) 2 2.5 3 -0.25 0 0.05 0.1 0.15 Frequency (Fs) 0.2 0.25 Figure 41 ADC Digital Filter Frequency Response – Type 2 Figure 42 ADC Digital Filter Ripple – Type 3 DE-EMPHASIS FILTER RESPONSES 0 0.4 0.3 -2 0.2 Response (dB) -4 Response (dB) 0.1 0 -0.1 -0.2 -6 -8 -0.3 -10 0 2000 4000 6000 8000 10000 Frequency (Fs) 12000 14000 16000 -0.4 0 2000 4000 6000 8000 10000 Frequency (Fs) 12000 14000 16000 Figure 43 De-emphasis Frequency Response (32kHz) Figure 44 De-emphasis Error (32kHz) w Pre-Production Rev 3.3 January 2007 53 WM8750BL 0 0.4 0.3 Pre-Production -2 0.2 Response (dB) -4 Response (dB) 0.1 0 -0.1 -0.2 -6 -8 -0.3 -0.4 -10 0 5000 10000 Frequency (Fs) 15000 20000 0 5000 10000 Frequency (Fs) 15000 20000 Figure 45 De-emphasis Frequency Response (44.1kHz) 0 Figure 46 De-emphasis Error (44.1kHz) 0.4 0.3 -2 0.2 Response (dB) -4 Response (dB) 0.1 0 -0.1 -0.2 -6 -8 -0.3 -0.4 -10 0 5000 10000 Frequency (Fs) 15000 20000 0 5000 10000 Frequency (Fs) 15000 20000 Figure 47 De-emphasis Frequency Response (48kHz) Figure 48 De-emphasis Error (48kHz) HIGHPASS FILTER The WM8750BL has a selectable digital highpass filter in the ADC filter path to remove DC offsets. The filter response is characterised by the following polynomial: H(z) = 1 - z-1 1 - 0.9995z-1 0 Response (dB) -5 -10 -15 0 0.0005 0.001 Frequency (Fs) 0.0015 0.002 Figure 49 ADC Highpass Filter Response w Pre-Production Rev 3.3 January 2007 54 Pre-Production WM8750BL APPLICATIONS INFORMATION RECOMMENDED EXTERNAL COMPONENTS Figure 50 Recommended External Components Diagram w Pre-Production Rev 3.3 January 2007 55 WM8750BL LINE INPUT CONFIGURATION Pre-Production W hen LINPUT1/RINPUT1 or LINPUT2/RINPUT2 are used as line inputs, the microphone boost and ALC functions should normally be disabled. In order to avoid clipping, the user must ensure that the input signal does not exceed AVDD. This may require a potential divider circuit in some applications. It is also recommended to remove RF interference picked up on any cables using a simple first-order RC filter, as high-frequency components in the input signal may otherwise cause aliasing distortion in the audio band. AC signals with no DC bias should be fed to the WM8750BL through a DC blocking capacitor, e.g. 1µF. MICROPHONE INPUT CONFIGURATION MICBIAS R1 680 Ohm to 2.2kOhm check microphone's specification LINPUT1/2/3 RINPUT1/2/3 FROM MICROPHONE C2 1uF AGND R2 47kOhm C1 220pF AGND AGND Figure 51 Recommended Circuit for Line Input For interfacing to a microphone, the ALC function should be enabled and the microphone boost switched on. Microphones held close to a speaker’s mouth would normally use the 13dB gain setting, while tabletop or room microphones would need a 29dB boost. The recommended application circuit is shown above. R1 and R2 form part of the biasing network (refer to Microphone Bias section). R1 connected to MICBIAS is necessary only for electret type microphones that require a voltage bias. R2 should always be present to prevent the microphone input from charging to a high voltage which may damage the microphone on connection. R1 and R2 should be large so as not to attenuate the signal from the microphone, which can have source impedance greater than 2kOhm. C1 together with the source impedance of the microphone and the WM8750BL input impedance forms an RF filter. C2 is a DC blocking capacitor to allow the microphone to be biased at a different DC voltage to the MICIN signal. MINIMISING POP NOISE AT THE ANALOGUE OUTPUTS To minimise any pop or click noise when the system is powered up or down, the following procedures are recommended. POWER UP • Switch on power supplies. By default the WM8750BL is in Standby Mode, the DAC is digitally muted and the Audio Interface, Line outputs and Headphone outputs are all OFF (DACMU = 1 Power Management registers 1 and 2 are all zeros). Enable Vmid and VREF. Enable DACs as required Enable line and / or headphone output buffers as required. Set DACMU = 0 to soft-un-mute the audio DACs. • • • • • • • POWER DOWN Set DACMU = 1 to soft-mute the audio DACs. Disable all output buffers. Switch off the power supplies. w Pre-Production Rev 3.3 January 2007 56 Pre-Production WM8750BL POWER MANAGEMENT (1) AINL/R VREF POWER MANAGEMENT EXAMPLES OPERATION MODE POWER MANAGEMENT (2) DACs MBI DAL DAR LO1 PGAs ADCs ADR Output Buffers RO1 LO2 RO2 MO HPD PGL PGR ADL Stereo Headphone Playback Stereo Line-in Record Stereo Microphone Record Mono Microphone Record Stereo Line-in to Headphone Out Phone Call Speaker Phone Call [ROUT2INV = 1] Record Phone Call [L channel = mic with boost, R channel = RX, enable mono mix] 1 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 0 1 1 1 0 1 1 0 0 0 0 1 0 1 1 1 0 0 0 1 0 1 1 0 0 0 0 1 0 0 1 1 0 1 1 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 1 1 x 0 0 0 x x 0 x Table 48 Register Settings for Power Management w Pre-Production Rev 3.3 January 2007 57 WM8750BL PACKAGE DIMENSIONS FL: 32 PIN QFN PLASTIC PACKAGE 5 X 5 X 0.9 mm BODY, 0.50 mm LEAD PITCH DM030.E Pre-Production CORNER TIE BAR 5 25 D2 B D2/2 32 SEE DETAIL A D L 24 EXPOSED GROUND 6 PADDLE A 1 INDEX AREA (D/2 X E/2) E2/2 E2 SEE DETAIL B E 17 8 2X 16 e 15 B 9 b 2X aaa C aaa C BOTTOM VIEW ccc C (A3) 1 A 0.08 C bbb M C A B 1 TOP VIEW DETAIL A 32x b CORNER TIE BAR 5 C SIDE VIEW SEATING PLANE 1 e/2 TERMINAL TIP A1 L 0. 43 m m 0.5 32x K DETAIL B DATUM 66 m m EXPOSED GROUND PADDLE R 1 L1 e Symbols A A1 A3 b D D2 E E2 e L L1 R K aaa bbb ccc REF: MIN 0.85 0 0.18 4.90 3.2 4.90 3.2 0.35 1 b(min)/2 0.20 Tolerances of Form and Position 0.15 0.10 0.10 JEDEC, MO-220, VARIATION VHHD-2 Dimensions (mm) NOM MAX 0.90 1.00 0.02 0.05 0.2 REF 0.23 0.30 5.00 5.10 3.3 3.4 5.00 5.10 3.3 3.4 0.5 BSC 0.4 0.45 0.1 L1 R NOTE 1 2 2 NOTES: 1. DIMENSION b APPLIED TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm FROM TERMINAL TIP. DIMENSION L1 REPRESENTS TERMINAL PULL BACK FROM PACKAGE SIDE WALL. MAXIMUM OF 0.1mm IS ACCEPTABLE. WHERE TERMINAL PULL BACK EXISTS, ONLY UPPER HALF OF LEAD IS VISIBLE ON PACKAGE SIDE WALL DUE TO HALF ETCHING OF LEADFRAME. 2. FALLS WITHIN JEDEC, MO-220 WITH THE EXCEPTION OF D2, E2: D2,E2: LARGER PAD SIZE CHOSEN WHICH IS JUST OUTSIDE JEDEC SPECIFICATION 3. ALL DIMENSIONS ARE IN MILLIMETRES 4. THIS DRAWING IS SUBJECT TO CHANGE WITHOUT NOTICE. 5. SHAPE AND SIZE OF CORNER TIE BAR MAY VARY WITH PACKAGE TERMINAL COUNT. CORNER TIE BAR IS CONNECTED TO EXPOSED PAD INTERNALLY. 6. REFER TO APPLICATION NOTE WAN_0118 FOR FURTHER INFORMATION REGARDING PCB FOOTPRINTS AND QFN PACKAGE SOLDERING. w Pre-Production Rev 3.3 January 2007 58 Pre-Production WM8750BL IMPORTANT NOTICE W olfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice. Customers should therefore obtain the latest version of relevant information from Wolfson to verify that the information is current. Testing and other quality control techniques are utilised to the extent Wolfson deems necessary to support its warranty. Specific testing of all parameters of each device is not necessarily performed unless required by law or regulation. In order to minimise risks associated with customer applications, the customer must use adequate design and operating safeguards to minimise inherent or procedural hazards. Wolfson is not liable for applications assistance or customer product design. The customer is solely responsible for its selection and use of Wolfson products. Wolfson is not liable for such selection or use nor for use of any circuitry other than circuitry entirely embodied in a Wolfson product. Wolfson’s products are not intended for use in life support systems, appliances, nuclear systems or systems where malfunction can reasonably be expected to result in personal injury, death or severe property or environmental damage. Any use of products by the customer for such purposes is at the customer’s own risk. Wolfson does not grant any licence (express or implied) under any patent right, copyright, mask work right or other intellectual property right of Wolfson covering or relating to any combination, machine, or process in which its products or services might be or are used. Any provision or publication of any third party’s products or services does not constitute Wolfson’s approval, licence, warranty or endorsement thereof. Any third party trade marks contained in this document belong to the respective third party owner. Reproduction of information from Wolfson datasheets is permissible only if reproduction is without alteration and is accompanied by all associated copyright, proprietary and other notices (including this notice) and conditions. Wolfson is not liable for any unauthorised alteration of such information or for any reliance placed thereon. Any representations made, warranties given, and/or liabilities accepted by any person which differ from those contained in this datasheet or in Wolfson’s standard terms and conditions of sale, delivery and payment are made, given and/or accepted at that person’s own risk. Wolfson is not liable for any such representations, warranties or liabilities or for any reliance placed thereon by any person. ADDRESS W olfson Microelectronics plc Westfield House 26 Westfield Road Edinburgh EH11 2QB United Kingdom Tel :: +44 (0)131 272 7000 Fax :: +44 (0)131 272 7001 Email :: sales@wolfsonmicro.com w Pre-Production Rev 3.3 January 2007 59