WM8772_05

w DESCRIPTION The WM8772 is a multi-channel audio codec ideal for DVD and surround sound processing applications for home hi-fi, automotive and other audio visual equipment. A stereo 24-bit multi-bit sigma delta ADC is used. Digital audio output word lengths from 16-32 bits and sampling rates from 32kHz to 96kHz are supported. The 32-lead version allows separate ADC and DAC samples rates. Three stereo 24-bit multi-bit sigma delta DACs are used with oversampling digital interpolation filters. Digital audio input word lengths from 16-32 bits and sampling rates from 8kHz to 192kHz are supported. Each DAC channel has independent digital volume and mute control. The audio data interface supports I2S, left justified, right justified and DSP digital audio formats. The device is controlled via a 3 wire serial interface. The interface provides access to all features including channel selection, volume controls, mutes, de-emphasis and power management facilities. The device is available in a 28 lead SSOP or 32 lead TQFP. WM8772 24-bit, 192kHz 6-Channel Codec with Volume Control FEATURES • Audio Performance − • • • • • 103dB SNR (‘A’ weighted @ 48kHz) DAC − 100dB SNR (‘A’ weighted @ 48kHz) ADC (TQFP) DAC Sampling Frequency: 8kHz – 192kHz ADC Sampling Frequency: 32kHz – 96kHz ADC and DAC can run at different sample rates (32 pin TQFP version only) 3-Wire SPI Serial or Hardware Control Interface Programmable Audio Data Interface Modes − • • • • I2S, Left, Right Justified or DSP − 16/20/24/32 bit Word Lengths Three Independent stereo DAC outputs with independent digital volume controls Master or Slave Audio Data Interface 2.7V to 5.5V Analogue, 2.7V to 3.6V Digital supply Operation 28 lead SSOP or 32 lead TQFP Package APPLICATIONS • • • DVD Players Surround Sound AV Processors and Hi-Fi systems Automotive Audio BLOCK DIAGRAM - 28 LEAD SSOP REFADC VREFN VREFP AGND DOUT MCLK AVDD VREFN VREFP VMID BCLK DIN1 DIN2 DIN3 LRC STEREO DAC VREFN LOW PASS FILTER VOUT1L VOUT1R VOUT2L VOUT2R VOUT3L VOUT3R AINL AINR STEREO ADC AUDIO INTERFACE & DIGITAL FILTERS STEREO DAC LOW PASS FILTER STEREO DAC LOW PASS FILTER CONTROL INTERFACE W WM8772EDS WOLFSON MICROELECTRONICS plc To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/ MC/IWL MD/DM MUTE ML/I2S DVDD DGND MODE Production Data, October 2005, Rev 4.2 Copyright 2005 Wolfson Microelectronics plc WM8772 BLOCK DIAGRAM – 32 LEAD TQFP DACVREFN DACVREFP ADCVREFN ADCMCLK* DOUT ADCLRC* ADCBCLK* DACBCLK* DACLRC* DIN1 DIN2 DIN3 DACMCLK* REFADC Production Data VREFN VREFP AGND AVDD VMID STEREO DAC LOW PASS FILTER VOUT1L VOUT1R VOUT2L VOUT2R VOUT3L VOUT3R AINL AINR STEREO ADC AUDIO INTERFACE & DIGITAL FILTERS STEREO DAC LOW PASS FILTER STEREO DAC LOW PASS FILTER CONTROL INTERFACE W WM8772EFT MC/IWL MD/DM MUTE ML/I2S MODE DVDD DGND * extra pins on TQFP allow separate clocking of ADC and DAC w PD Rev 4.2 October 2005 2 Production Data WM8772 TABLE OF CONTENTS DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM - 28 LEAD SSOP ....................................................................1 BLOCK DIAGRAM – 32 LEAD TQFP ....................................................................2 TABLE OF CONTENTS .........................................................................................3 PIN CONFIGURATION - 28 LEAD SSOP .............................................................5 ORDERING INFORMATION ..................................................................................5 PIN CONFIGURATION 32 LEAD TQFP...............................................................6 ORDERING INFORMATION ..................................................................................6 PIN DESCRIPTION – 28 LEAD SSOP...................................................................7 PIN DESCRIPTION – 32 LEAD TQFP ...................................................................8 ABSOLUTE MAXIMUM RATINGS.........................................................................9 RECOMMENDED OPERATING CONDITIONS ...................................................10 ELECTRICAL CHARACTERISTICS ....................................................................10 TERMINOLOGY .......................................................................................................... 12 DIGITAL FILTER CHARACTERISTICS ...............................................................13 DAC FILTER RESPONSES......................................................................................... 13 ADC FILTER RESPONSES......................................................................................... 14 ADC HIGH PASS FILTER ........................................................................................... 14 DIGITAL DE-EMPHASIS CHARACTERISTICS........................................................... 14 WM8772EDS – 28 LEAD SSOP ..........................................................................16 MASTER CLOCK TIMING....................................................................................16 DIGITAL AUDIO INTERFACE – MASTER MODE ....................................................... 16 MPU INTERFACE TIMING .......................................................................................... 19 DEVICE DESCRIPTION.......................................................................................20 INTRODUCTION ......................................................................................................... 20 AUDIO DATA SAMPLING RATES............................................................................... 20 HARDWARE CONTROL MODES ............................................................................... 21 DIGITAL AUDIO INTERFACE ..................................................................................... 23 POWERDOWN MODES ............................................................................................. 28 ZERO DETECT ........................................................................................................... 28 SOFTWARE CONTROL INTERFACE OPERATION................................................... 29 REGISTER MAP - 28 PIN SSOP ........................................................................30 CONTROL INTERFACE REGISTERS ........................................................................ 31 APPLICATIONS INFORMATION .........................................................................39 RECOMMENDED EXTERNAL COMPONENTS .......................................................... 39 SUGGESTED ANALOGUE LOW PASS POST DAC FILTERS ................................... 40 PACKAGE DIMENSIONS ....................................................................................42 WM8722EFT - 32 LEAD TQFP ............................................................................43 MASTER CLOCK TIMING....................................................................................43 DIGITAL AUDIO INTERFACE – MASTER MODE ....................................................... 43 MPU INTERFACE TIMING .......................................................................................... 46 w PD Rev 4.2 October 2005 3 WM8772 Production Data DEVICE DESCRIPTION.......................................................................................48 INTRODUCTION ......................................................................................................... 48 AUDIO DATA SAMPLING RATES............................................................................... 48 HARDWARE CONTROL MODES ............................................................................... 49 DIGITAL AUDIO INTERFACE ..................................................................................... 51 POWERDOWN MODES ............................................................................................. 57 ZERO DETECT ........................................................................................................... 57 SOFTWARE CONTROL INTERFACE OPERATION................................................... 57 REGISTER MAP – 32 PIN TQFP .........................................................................58 CONTROL INTERFACE REGISTERS ........................................................................ 59 APPLICATIONS INFORMATION .........................................................................69 RECOMMENDED EXTERNAL COMPONENTS .......................................................... 69 SUGGESTED ANALOGUE LOW PASS POST DAC FILTERS ................................... 70 PACKAGE DIMENSIONS ....................................................................................72 IMPORTANT NOTICE ..........................................................................................73 ADDRESS: .................................................................................................................. 73 w PD Rev 4.2 October 2005 4 Production Data WM8772 PIN CONFIGURATION - 28 LEAD SSOP MODE MCLK BCLK LRC DVDD DGND DIN1 DIN2 DIN3 DOUT ML/I2S MC/IWL MD/DM MUTE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 AVDD AGND VOUT3R VOUT3L VOUT2R VOUT2L VOUT1R VOUT1L AINL AINR VMID VREFP VREFN REFADC ORDERING INFORMATION DEVICE W M8772SEDS/V TEMPERATURE RANGE -25 to +85oC o PACKAGE 28-lead SSOP (Pb free) 28-lead SSOP (Pb free, tape and reel) MOISTURE SENSITIVITY LEVEL MSL3 MSL3 PEAK SOLDERING TEMPERATURE 260oC 260oC W M8772SEDS/RV Note: Reel quantity = 2,000 -25 to +85 C w PD Rev 4.2 October 2005 5 WM8772 PIN CONFIGURATION 32 LEAD TQFP VOUT3L VOUT2R VOUT1R VOUT2L VOUT1L AINR AINL VMID Production Data 24 23 22 25 26 27 28 29 30 31 32 1 ADCLRC 2 DACLRC 3 DVDD VOUT3R AGND AVDD MODE ADCMCLK DACMLCK ADCBCLK DACBCLK 21 20 19 18 17 16 15 14 13 12 11 10 9 DACVREFP DACVREFN ADCVREFN REFADC MUTE MD/DM MC/IWL ML/I2S 4 DGND 5 DIN1 6 DIN2 7 DIN3 8 DOUT ORDERING INFORMATION DEVICE W M8772SEFT/V W M8772SEFT/RV TEMPERATURE RANGE -25 to +85oC -25 to +85 C o PACKAGE 32-lead TQFP (Pb free) 32-lead TQFP (Pb free, tape and reel) MOISTURE SENSITIVITY LEVEL MSL2 MSL2 PEAK SOLDERING TEMPERATURE 260oC 260 C o Note: Reel quantity = 2,200 w PD Rev 4.2 October 2005 6 Production Data WM8772 PIN DESCRIPTION – 28 LEAD SSOP PIN 1 NAME MODE TYPE Digital input Control format selection 0 = Software control 1 = Hardware control Master clock; 256, 384, 512 or 768fs (fs = word clock frequency) (combined ADCMCLK and DACMCLK) Audio interface bit clock (combined ADCBCLK and DACBCLK) Audio left/right word clock (combined ADCLRC and DACLRC) Digital positive supply Digital negative supply DAC channel 1 data input DAC channel 2 data input DAC channel 3 data input ADC data output Software Mode: Serial interface Latch signal Hardware Mode: Input Audio Data Format Software Mode: Serial control interface clock Hardware Mode: Audio data input word length Software Mode: Serial interface data Hardware Mode: De-emphasis selection DAC Zero Flag output or DAC mute input ADC reference buffer decoupling pin; 10uF external decoupling ADC and DAC negative supply DAC positive reference supply Midrail divider decoupling pin; 10uF external decoupling ADC right input ADC left input DAC channel 1 left output DAC channel 1 right output DAC channel 2 left output DAC channel 2 right output DAC channel 3 left output DAC channel 3 right output Analogue negative supply and substrate connection Analogue positive supply DESCRIPTION 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 MCLK BCLK LRC DVDD DGND DIN1 DIN2 DIN3 DOUT ML/I2S MC/IWL MD/DM MUTE REFADC VREFN VREFP VMID AINR AINL VOUT1L VOUT1R VOUT2L VOUT2R VOUT3L VOUT3R AGND AVDD Digital input Digital input/output Digital input/output Supply Supply Digital input Digital input Digital input Digital output Digital input Digital input Digital input Digital input/output Analogue output Supply Supply Analogue output Analogue input Analogue input Analogue output Analogue output Analogue output Analogue output Analogue output Analogue output Supply Supply Note: Digital input pins have Schmitt trigger input buffers. w PD Rev 4.2 October 2005 7 WM8772 PIN DESCRIPTION – 32 LEAD TQFP PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 NAME ADCLRC DACLRC DVDD DGND DIN1 DIN2 DIN3 DOUT ML/I2S MC/IWL MD/DM MUTE REFADC ADCVREFN DACVREFN DACVREFP VMID AINR AINL VOUT1L VOUT1R VOUT2L VOUT2R VOUT3L VOUT3R AGND AVDD MODE TYPE Digital Input/Output Digital Input/Output Supply Supply Digital Input Digital Input Digital Input Digital Output Digital Input Digital Input Digital Input Digital Input/Output Analogue Output Supply Supply Supply Analogue Output Analogue Input Analogue Input Analogue Output Analogue Output Analogue Output Analogue Output Analogue Output Analogue Output Supply Supply Digital Input ADC left/right word clock DAC left/right word clock Digital positive supply Digital negative supply DAC channel 1 data input DAC channel 2 data input DAC channel 3 data input ADC data output Software Mode: Serial interface Latch signal Hardware Mode: Input Audio Data Format Software Mode: Serial control interface clock Hardware Mode: Audio data input word length Software Mode: Serial interface data Hardware Mode: De-emphasis selection DAC Zero Flag output or DAC Mute Input DESCRIPTION Production Data ADC reference buffer decoupling pin; 10uF external decoupling ADC negative supply DAC negative supply DAC positive reference supply Midrail divider decoupling pin; 10uF external decoupling ADC right input ADC left input DAC channel 1 left output DAC channel 1 right output DAC channel 2 left output DAC channel 2 right output DAC channel 3 left output DAC channel 3 right output Analogue negative supply and substrate connection Analogue positive supply Control format selection 0 = Software control 1 = Hardware control Master ADC clock; 256, 384, 512 or 768fs (fs = word clock frequency) Master DAC clock; 256, 384, 512 or 768fs (fs = word clock frequency) ADC audio interface bit clock DAC audio interface bit clock 29 30 31 32 ADCMCLK DACMCLK ADCBCLK DACBCLK Digital Input Digital Input Digital Input/Output Digital Input/Output Note: Digital input pins have Schmitt trigger input buffers. w PD Rev 4.2 October 2005 8 Production Data WM8772 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are: MSL1 = unlimited floor life at