WM8786_07

w 24-Bit, 192kHz Stereo ADC DESCRIPTION The WM8786 is a stereo audio ADC with differential inputs designed for high performance recordable media applications. Data is provided as a PCM output. Stereo 24-bit multi-bit sigma-delta ADCs are used with digital audio output word lengths of 16 to 32 bits, and sampling rates from 8kHz to 192kHz. The device also has a high pass filter to remove residual DC offsets. The device is hardware controlled. Pin programming provides access to all features including oversampling rate, audio format, powerdown, master/slave control and digital signal manipulation. The device is supplied in a 20-lead SSOP package. WM8786 FEATURES • • • • • • • • SNR 111dB (‘A’ weighted @ 48kHz) THD -102dB (at -0.1dB) Sampling Frequency: 8 – 192kHz Hardware Control Interface Master or Slave Clocking Mode Programmable Audio Data Interface Modes - I2S, Left, Right Justified or DSP - 24-Bit Word Length Supply Voltages - Analogue 4.5 to 5.5V - Digital core: 2.7V to 3.6V 20-lead SSOP package APPLICATIONS • • • • Recordable DVD Players Personal Video Recorders High End Sound Cards Studio Audio Processing Equipment BLOCK DIAGRAM W OLFSON MICROELECTRONICS plc To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/ Production Data, February 2007, Rev 4.2 Copyright 2007 Wolfson Microelectronics plc WM8786 TABLE OF CONTENTS Production Data DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 PIN DESCRIPTION ................................................................................................4 ABSOLUTE MAXIMUM RATINGS.........................................................................5 RECOMMENDED OPERATING CONDITIONS .....................................................5 ELECTRICAL CHARACTERISTICS ......................................................................6 TERMINOLOGY ............................................................................................................ 7 SIGNAL TIMING REQUIREMENTS .......................................................................8 SYSTEM CLOCK TIMING ............................................................................................. 8 AUDIO INTERFACE TIMING – MASTER MODE, PCM DATA ...................................... 8 AUDIO INTERFACE TIMING – SLAVE MODE, PCM DATA ......................................... 9 POWER-ON RESET ................................................................................................... 10 DIGITAL FILTER CHARACTERISTICS ...............................................................11 TERMINOLOGY .......................................................................................................... 11 HIGH PASS FILTER TRANSFER CHARACTERISTIC................................................ 11 FILTER RESPONSES ..........................................................................................12 DEVICE DESCRIPTION.......................................................................................16 INTRODUCTION ......................................................................................................... 16 DIGITAL AUDIO INTERFACE ..................................................................................... 16 AUDIO INTERFACE CONTROL.................................................................................. 19 OVERSAMPLING RATIOS AND SIGMA-DELTA MODULATOR FREQUENCY.......... 19 MASTER CLOCK AND AUDIO SAMPLE RATES........................................................ 20 MLCK AND LRCLK PHASE RELATIONSHIP.............................................................. 20 APPLICATIONS INFORMATION .........................................................................21 RECOMMENDED EXTERNAL COMPONENTS .......................................................... 21 RECOMMENDED PCB LAYOUT ................................................................................ 22 PACKAGE DIMENSIONS ....................................................................................23 IMPORTANT NOTICE ..........................................................................................24 ADDRESS: .................................................................................................................. 24 w PD Rev 4.2 February 2007 2 Production Data WM8786 PIN CONFIGURATION AINL+ AINLVREFGND AVDD AGND LRCLK DOUT BCLK MCLK MS0 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 AINR+ AINRVREF VMID DGND DVDD OSR1 OSR0 AUDIOF1 AUDIOF0 ORDERING INFORMATION ORDER CODE W M8786GEDS/V TEMPERATURE RANGE -25°C to +85°C PACKAGE 20-lead SSOP (Pb-free) 20-lead SSOP, (Pb-free, tape and reel) MOISTURE SENSITIVITY LEVEL MSL3 PEAK SOLDERING TEMPERATURE 260oC W M8786GEDS/RV -25°C to +85°C MSL3 260oC Note: Reel quantity = 2,000 w PD Rev 4.2 February 2007 3 WM8786 PIN DESCRIPTION PIN 1 2 3 4 5 6 7 8 9 10 NAME AINL+ AINLVREFGND AVDD AGND LRCLK DOUT BCLK MCLK MS0 (pull down pad) AUDIOF0 AUDIOF1 TYPE Analogue Input Analogue Input Analogue Reference Supply Supply Digital Input / Output Digital Output Digital Input / Output Digital Input Digital Input DESCRIPTION Left Channel Positive Input Left Channel Negative Input Negative Reference Connection Analogue Supply Analogue Ground (return path for AVDD) Audio Interface Left / Right Clock ADC Digital Audio Data Audio Interface Bit Clock Master Clock Production Data Master/Slave Control 0 = Slave Mode Audio Interface 1 = Master Mode Audio Interface @ 256fs (or @128fs in quad rate) Audio Format Selection 00 = 24 bit right justified audio data format 01 = 24 bit left audio data format 10 = I2S audio data format 11 = DSP audio data format Oversampling Rate Control 00 = Single rate (48kHz) 01 = Dual rate (96kHz) 10 = Quad rate (192kHz) 11 = Not valid Digital Supply Digital Ground (return path for DVDD) Midrail Voltage Decoupling Capacitor Reference Voltage Decoupling Capacitor Right Channel Negative Input Right Channel Positive Input 11 12 Digital Input Digital Input 13 14 OSR0 (pull down pad) OSR1 Digital Input Digital Input 15 16 17 18 19 20 DVDD DGND VMID VREF AINRAINR+ Supply Supply Analogue Output Analogue Reference Analogue Input Analogue Input w PD Rev 4.2 February 2007 4 Production Data WM8786 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are: MSL1 = unlimited floor life at 0.546fs 0.546fs -85 32/fs dB s 0 0.5fs +/- 0.005 dB 0.454fs dB s dB ADC Sample Rate (Dual Rate - 96kHz typically) Passband TERMINOLOGY 1. 2. Stop Band Attenuation (dB) - the degree to which the frequency spectrum is attenuated (outside audio band) Pass-band Ripple – any variation of the frequency response in the pass-band region HIGH PASS FILTER TRANSFER CHARACTERISTIC The high pass filter response is defined by the following polynomial: H(z) = 1 - z -1 1 - (1 - α )z -1 where α = 2-11 for single rate (48k) mode α = 2-12 for dual rate (96k) mode α = 2-13 for quad rate (192k) mode w PD Rev 4.2 February 2007 11 WM8786 FILTER RESPONSES SINGLE RATE 48k Production Data 0 -20 Response (dB) -40 -60 -80 - 100 0 0.5 1 1.5 2 2.5 3 3.5 4 Frequency (Fs) Figure 6 Single Rate 48k Filter Response 0 -20 Response (dB) -40 -60 -80 - 100 0.4 0.45 0.5 Frequency (Fs) 0.55 0.6 Figure 7 Single Rate 48k Filter Response 0.15 0.1 Response (dB) 0.05 0 -0.05 -0.1 - 0.15 0 0.1 0.2 Frequency (Fs) Figure 8 Single Rate 48k Filter Response 0.3 0.4 0.5 w PD Rev 4.2 February 2007 12 Production Data WM8786 DUAL RATE 96k 0 -20 Response (dB) -40 -60 -80 - 100 0 0.5 1 1.5 2 2.5 3 3.5 4 Frequency (Fs) Figure 9 Dual Rate 96k Filter Response 0 -20 Response (dB) -40 -60 -80 - 100 0.4 0.45 0.5 Frequency (Fs) 0.55 0.6 Figure 10 Dual Rate 96k Filter Response 0.15 0.1 Response (dB) 0.05 0 -0.05 -0.1 - 0.15 0 0.1 0.2 Frequency (Fs) Figure 11 Dual Rate 96k Filter Response 0.3 0.4 0.5 w PD Rev 4.2 February 2007 13 WM8786 QUAD RATE 192k Production Data 0 -20 Response (dB) -40 -60 -80 - 100 0 0.5 1 1.5 2 2.5 3 3.5 4 Frequency (Fs) Figure 12 Quad Rate 192k Filter Response 0 -20 Response (dB) -40 -60 -80 - 100 0.4 0.5 0.6 0.7 0.8 0.9 1 Frequency (Fs) Figure 13 Quad Rate 192k Filter Response -2.5 -2.6 -2.7 -2.8 Response (dB) -2.9 -3 -3.1 -3.2 -3.3 -3.4 - 3.5 0 0.1 0.2 Frequency (Fs) 0.3 0.4 0.5 Figure 14 Quad Rate 192k Filter Response w PD Rev 4.2 February 2007 14 Production Data WM8786 HIGH PASS FILTER 5 0 Response (dB) -5 -10 -15 -20 0 0.0005 0.001 Frequency (Fs) Figure 15 Single Rate 48k High Pass Filter Response 0.0015 0.002 5 0 Response (dB) -5 -10 -15 -20 0 0.0005 0.001 Frequency (Fs) Figure 16 Dual Rate 96k High Pass Filter Response 0.0015 0.002 5 0 Response (dB) -5 -10 -15 -20 0 0.0005 0.001 Frequency (Fs) Figure 17 Quad Rate 192k High Pass Filter Response 0.0015 0.002 w PD Rev 4.2 February 2007 15 WM8786 DEVICE DESCRIPTION INTRODUCTION Production Data The WM8786 is a high performance stereo audio ADC designed for demanding recording applications such as DVD recorders, studio mixers, PVRs, and AV amplifiers. The WM8786 consists of stereo line level inputs, followed by a sigma-delta modulator and digital filtering. The WM8786 uses a multi-bit high-order oversampling architecture delivering high SNR operating at oversampling ratios from 128fs to 32fs according to the sample rate. Sample rates from 8kHz to 192kHz are supported. The WM8786 supports master clock rates from 128fs to 768fs. The digital filter is a high performance linear phase FIR filter. The digital filters are optimised for each sample rate. Also included is a high pass filter to remove residual DC offsets from the input signal. The output from the ADC is available on a configurable digital audio interface. It supports a number of audio data formats including I2S, Left justified and Right justified or DSP, and can operate in master or slave modes. The WM8786 functionality is controlled in hardware via specific pins. It is fully compatible and an ideal partner for a range of industry standard microprocessors, controllers and DSPs. The WM8786 can be powered down to reduce system power consumption. DIGITAL AUDIO INTERFACE The digital audio interface uses three pins: • • • DOUT: ADC data output LRCLK: ADC data alignment clock BCLK: Bit clock, for synchronisation The digital audio interface takes the data from the internal ADC digital filters and places it on DOUT and LRCLK. DOUT is the formatted digital audio data stream output from the ADC digital filters with left and right channels multiplexed together. LRCLK is an alignment clock that controls whether Left or Right channel data is present on the DOUT line. DOUT and LRCLK are synchronous with the BCLK signal with each data bit transition signified by a BCLK high to low transition. DOUT is always an output. BCLK and LRCLK maybe inputs or outputs depending whether the device is in Master or Slave mode. (see Master and Slave Mode Operation, below). Four different audio data formats are supported: • • • • Left justified Right justified I 2S DSP They are described in Audio Data Formats, below. Refer to the Electrical Characteristic section for timing information. MASTER AND SLAVE MODE OPERATION The WM8786 can be configured as either a master or slave mode device. As a master device the WM8786 generates BCLK and LRCLK and thus controls sequencing of the data transfer on DOUT. In slave mode, the WM8786 responds with data to clocks it receives over the digital audio interface. The mode can be selected using the MS0 pin. Master and slave modes are illustrated below. MS0 PIN STATUS Low High High INTERFACE FORMAT Slave Master (@256fs in oversampling ratio = single or dual rate) Master (@192fs in oversampling ratio = quad rate) Table 2 Control Interface Mode Selection w PD Rev 4.2 February 2007 16 Production Data WM8786 Figure 18a Master Mode Figure 18b Slave Mode AUDIO DATA FORMATS In Left Justified mode, the MSB is available on the first rising edge of BCLK following an LRCLK transition. The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles before each LRCLK transition. Figure 19 Left Justified Audio Interface (assuming n-bit word length) In Right Justified mode, the LSB is available on the last rising edge of BCLK before an LRCLK transition. All other bits are transmitted before (MSB first). Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles after each LRCLK transition. Figure 20 Right Justified Audio Interface (assuming n-bit word length) w PD Rev 4.2 February 2007 17 WM8786 2 Production Data In I S mode, the MSB is available on the second rising edge of BCLK following an LRCLK transition. The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and the MSB of the next. Figure 21 I2S Justified Audio Interface (assuming n-bit word length) In DSP/PCM mode, the left channel MSB is available on the 2nd rising edge of BCLK following a rising edge of LRC. Right channel data immediately follows left channel data. Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles between the LSB of the right channel data and the next sample. In device master mode, the LRC output will resemble the frame pulse shown in Figure 22. In device slave mode, Figure 23 it is possible to use any length of frame pulse less than 1/fs, providing the falling edge of the frame pulse occurs greater than one BCLK period before the rising edge of the next frame pulse. Figure 22 DSP/PCM Mode Audio Interface (mode A, Master) Figure 23 DSP/PCM Mode Audio Interface (mode A, Slave) w PD Rev 4.2 February 2007 18 Production Data WM8786 AUDIO INTERFACE CONTROL The audio interface is controlled using the AUDIOF0 and AUDIOF1 pins. Dynamically changing the audio format may cause erroneous operation of the interfaces and is therefore not recommended. All ADC data is signed 2’s complement. The length of the digital audio data is always 24 bits. AUDIOF1 PIN STATUS Low Low High High AUDIOF0 PIN STATUS Low High Low High AUDIO INTERFACE FORMAT 24-bit right justified 24-bit left justified 24-bit I2S 24-bit DSP AUDIO INTERFACE CONTROL Table 3 Audio Interface Format Selection OVERSAMPLING RATIOS AND SIGMA-DELTA MODULATOR FREQUENCY For correct operation of the device and optimal performance, the user must select the appropriate ADC modulator oversampling ratio. The oversampling ratio is selected using the OSR0 and OSR1 pins. OSR1 PIN STATUS Low Low High High Table 4 Oversampling Ratio Selection The WM8786 can operate at sample rates from 8kHz to 192kHz. The WM8786 uses a sigma-delta modulator that operates at frequencies between 1.024MHz and 6.144MHz SAMPLING RATE (LRCLK) 8kHz 32kHz 44.1kHz 48kHz 96kHz 192kHz OVERSAMPLING RATIO SIGMA-DELTA MODULATOR FREQUENCY (MHZ) 1.024 4.096 5.6448 6.144 6.144 6.144 OSR0 PIN STATUS Low High Low High OVERSAMPLING RATIO CONTROL Single Rate (128fs) Dual Rate (64fs) Quad Rate (32fs) Not Valid Single Rate (128fs) Single Rate (128fs) Single Rate (128fs) Single Rate (128fs) Dual Rate (64fs) Quad Rate (32fs) Table 5 Sigma-delta Modulator Frequency w PD Rev 4.2 February 2007 19 WM8786 MASTER CLOCK AND AUDIO SAMPLE RATES Production Data The master clock (MCLK) is used to operate the digital filters and the noise shaping circuits. The WM8786 supports a wide range of master clock frequencies, and can generate many commonly used audio sample rates directly from the master clock. The following tables show the recommended Master clock frequencies for different sample rates. In Master Mode, with oversampling ratio = single rate or dual rate, Master clock frequency of 256 is supported. SAMPLING RATE (LRCLK) 32kHz 44.1kHz 48kHz 96kHz OVERSAMPLING RATIO Single Rate Single Rate Single Rate Dual Rate MASTER CLOCK FREQUENCY (MHz) 256fs 8.192 11.2896 12.288 24.576 Table 6 Master Mode: Recommended Master Clock Frequency Selection In Master Mode, with oversampling ratio = quad rate, Master clock frequency of 192 is supported. SAMPLING RATE (LRCLK) 192kHz OVERSAMPLING RATIO Quad Rate MASTER CLOCK FREQUENCY (MHz) 128fs 24.576 Table 7 Master Mode: Recommended Master Clock Frequency Selection In Slave Mode, Master clock frequencies of 128fs, 192fs, 256fs, 384fs, 512fs and 768fs are supported.. The WM8786 automatically detects the audio sample rate, in slave mode. SAMPLING RATE (LRCLK) 32kHz 44.1kHz 48kHz 96kHz 192kHz OVERSAMPLING RATIO Single Rate Single Rate Single Rate Dual Rate Quad Rate MASTER CLOCK FREQUENCY (MHz) 128fs 24.576 192fs 36.864 256fs 8.192 11.2896 12.288 24.576 384fs 12.288 16.9344 18.432 36.864 512fs 16.384 22.5792 24.576 768fs 24.576 33.8688 36.864 - Table 8 Slave Mode: Recommended Master Clock Frequency Selection MLCK AND LRCLK PHASE RELATIONSHIP The WM8786 does not require a specific phase relationship between MLCK and LRCLK. If the relationship between MCLK and LRCLK changes by more than +/-8 BCLKs in a 64 BLCK frame, the WM8786 will attempt to re-synchronise During re-synchronisation, data samples may be dropped or duplicated. w PD Rev 4.2 February 2007 20 Production Data WM8786 APPLICATIONS INFORMATION RECOMMENDED EXTERNAL COMPONENTS Notes: 1. 2. 3. 4. AGND and DGND should be connected as close to the WM8786 as possible. C1 to C6 should be placed as close to the WM8786 device as possible. Capacitor types should be chosen carefully. Capacitors with very low ESR are recommended for optimum performance, such as X7R. VMID and VREF decoupling capacitors must be high quality electrolytic capacitors to achieve datasheet performance; ceramic capacitors are not acceptable. An active input filter is required to achieve datasheet performance. The circuit shown is a tested inverting reference example. Figure 24 External Component Diagram w PD Rev 4.2 February 2007 21 WM8786 RECOMMENDED PCB LAYOUT Production Data The WM8786 is sensitive to the routing of the ground return currents for VREF, VMID and AVDD and care should be taken to ensure that these currents do not interfere. Figure 25 below shows a recommended PCB layout (with high frequency current paths) for the WM8786 that will demonstrate datasheet performance: To DVDD Supply + C6 + C3 C5 C4 C2 C1 Top Layer Copper Bottom Layer Copper Via To AVDD Supply Figure 25 Recommended PCB Layout for VREF, VMID, AVDD and DVDD Decoupling Notes: 1. 2. High frequency noise on VREF is decoupled through C5, and the return path should be directly to VREFGND. The route from the negative terminal of C6 to C5 and then to VREFGND should be made on the top layer only and should not connect to the ground flood on the top layer. This ensures that the VREF return current is returned directly to VREFGND as shown by the black arrows. The negative terminal of C6 should be connected to the ground plane on the underside of the board only. High frequency noise on VMID is decoupled through C4, and the return path should be directly to AGND. Via to bottom layer on VMID used to connect to bottom layer route to positive terminal of C3. The route from C4 to AGND should be made on the top layer only. This ensures that the VMID return current is returned to AGND as shown by the white arrows. AVDD is decoupled to AGND through C1. The ground return currents are not shown in this diagram. DVDD is decoupled to DGND through C2. The ground return currents are not shown in this diagram. DGND should not be connected directly to the ground flood on the top layer under the WM8786. This will ensure that noise in the digital ground does not interfere with the critical routing of VREF and VMID. 3. 4. 5. 6. 7. 8. 9. 10. Bottom layer ground flood not shown for clarity. 11. See the WM8786 Evaluation Board for an example of this layout in use. w PD Rev 4.2 February 2007 22 Production Data WM8786 PACKAGE DIMENSIONS DS: 20 PIN SSOP (7.2 x 5.3 x 1.75 mm) DM0015.C b 20 e 11 E1 E 1 10 GAUGE PLANE Θ D A A2 A1 -C0.10 C SEATING PLANE c L L1 0.25 Symbols A A1 A2 b c D e E E1 L L1 θ REF: MIN ----0.05 1.65 0.22 0.09 6.90 7.40 5.00 0.55 0 o Dimensions (mm) NOM --------1.75 0.30 ----7.20 0.65 BSC 7.80 5.30 0.75 1.25 REF o 4 JEDEC.95, MO -150 MAX 2.0 ----1.85 0.38 0.25 7.50 8.20 5.60 0.95 8 o NOTES: A. ALL LINEAR DIMENSIONS ARE IN MILLIMETERS. B. THIS DRAWING IS SUBJECT TO CHANGE WITHOUT NOTICE. C. BODY DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSION, NOT TO EXCEED 0.20MM. D. MEETS JEDEC.95 MO-150, VARIATION = AE. REFER TO THIS SPECIFICATION FOR FURTHER DETAILS. w PD Rev 4.2 February 2007 23 WM8786 IMPORTANT NOTICE Production Data W olfson Microelectronics plc (“Wolfson”) products and services are sold subject to Wolfson’s terms and conditions of sale, delivery and payment supplied at the time of order acknowledgement. Wolfson warrants performance of its products to the specifications in effect at the date of shipment. Wolfson reserves the right to make changes to its products and specifications or to discontinue any product or service without notice. Customers should therefore obtain the latest version of relevant information from Wolfson to verify that the information is current. Testing and other quality control techniques are utilised to the extent Wolfson deems necessary to support its warranty. Specific testing of all parameters of each device is not necessarily performed unless required by law or regulation. In order to minimise risks associated with customer applications, the customer must use adequate design and operating safeguards to minimise inherent or procedural hazards. Wolfson is not liable for applications assistance or customer product design. The customer is solely responsible for its selection and use of Wolfson products. Wolfson is not liable for such selection or use nor for use of any circuitry other than circuitry entirely embodied in a Wolfson product. Wolfson’s products are not intended for use in life support systems, appliances, nuclear systems or systems where malfunction can reasonably be expected to result in personal injury, death or severe property or environmental damage. Any use of products by the customer for such purposes is at the customer’s own risk. Wolfson does not grant any licence (express or implied) under any patent right, copyright, mask work right or other intellectual property right of Wolfson covering or relating to any combination, machine, or process in which its products or services might be or are used. Any provision or publication of any third party’s products or services does not constitute Wolfson’s approval, licence, warranty or endorsement thereof. Any third party trade marks contained in this document belong to the respective third party owner. Reproduction of information from Wolfson datasheets is permissible only if reproduction is without alteration and is accompanied by all associated copyright, proprietary and other notices (including this notice) and conditions. Wolfson is not liable for any unauthorised alteration of such information or for any reliance placed thereon. Any representations made, warranties given, and/or liabilities accepted by any person which differ from those contained in this datasheet or in Wolfson’s standard terms and conditions of sale, delivery and payment are made, given and/or accepted at that person’s own risk. Wolfson is not liable for any such representations, warranties or liabilities or for any reliance placed thereon by any person. ADDRESS: W olfson Microelectronics plc Westfield House 26 Westfield Road Edinburgh EH11 2QB United Kingdom Tel :: +44 (0)131 272 7000 Fax :: +44 (0)131 272 7001 Email :: sales@wolfsonmicro.com w PD Rev 4.2 February 2007 24