WM8804GEDS

w DESCRIPTION The WM8804 is a high performance consumer mode S/PDIF transceiver with support for 1 received channel and 1 transmitted channel. A crystal derived, or externally provided high quality master clock is used to allow low jitter recovery of S/PDIF supplied master clocks. Generation of all typically used audio clocks is possible using the high performance internal PLL. A dedicated CLKOUT pin provides a high drive clock output. A pass through option is provided which allows the device simply to be used to clean up (de-jitter) the received digital audio signals. The device may be used under software control or stand alone hardware control modes. In software control mode, both 2-wire with read back and 3-wire interface modes are supported. Status and error monitoring is built-in and results can be read back over the control interface, on the GPO pins or streamed over the audio data interface in ‘With Flags’ mode (audio data with status flags appended). The audio data interface supports I S, left justified, right justified and DSP audio formats of 16-24 bit word length, with sample rates from 32 to 192ks/s. The device is supplied in a 20-lead Pb-free SSOP package. 2 WM8804 1:1 Digital Interface Transceiver with PLL FEATURES • • • • • • S/PDIF (IEC60958-3) compliant. Advanced jitter attenuating PLL with low intrinsic period jitter of 50 ps RMS. S/PDIF recovered clock using PLL, or stand alone crystal derived clock generation. Supports 10 – 27MHz crystal clock frequencies. 2-wire / 3-Wire serial or hardware control interface. Programmable audio data interface modes: I2S, Left, Right Justified or DSP 16/20/24 bit word lengths 1 channel receiver input and 1 channel transmit output. Auto frequency detection / synchronisation. Selectable output status data bits. Up to 3 configurable GPO pins. De-emphasis flag output. Non-audio detection including DOLBYTM and DTSTM. Channel status changed flag. Configurable clock distribution with selectable output MCLK rate of 512fs, 256fs, 128fs and 64fs. 2.7 to 3.6V digital and PLL supply voltages. 20-lead SSOP package. • • • • • • • • • • APPLICATIONS • • • • AV processors and Hi-Fi systems Music industry applications DVD-P/DVD-RW Digital TV BLOCK DIAGRAM WOLFSON MICROELECTRONICS plc To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/ Production Data, September 2007, Rev 4.1 Copyright ©2007 Wolfson Microelectronics plc WM8804 TABLE OF CONTENTS Production Data DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 BLOCK DIAGRAM .................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................3 ORDERING INFORMATION ..................................................................................3 PIN DESCRIPTION ................................................................................................4 ABSOLUTE MAXIMUM RATINGS.........................................................................5 RECOMMENDED OPERATING CONDITIONS .....................................................6 SUPPLY CURRENT ...................................................................................................... 6 ELECTRICAL CHARACTERISTICS ......................................................................6 MASTER CLOCK TIMING ............................................................................................. 7 MASTER CLOCK TIMING ............................................................................................. 7 DIGITAL AUDIO INTERFACE – MASTER MODE ......................................................... 7 DIGITAL AUDIO INTERFACE – SLAVE MODE ............................................................ 8 CONTROL INTERFACE – 3-WIRE MODE.................................................................... 9 CONTROL INTERFACE – 2-WIRE MODE.................................................................. 10 DEVICE DESCRIPTION.......................................................................................11 INTRODUCTION ......................................................................................................... 11 POWER UP CONFIGURATION .................................................................................. 12 CONTROL INTERFACE OPERATION ........................................................................ 14 HARDWARE CONTROL MODE.................................................................................. 18 DIGITAL ROUTING CONTROL................................................................................... 20 MASTER CLOCK AND PHASE LOCKED LOOP......................................................... 21 SOFTWARE MODE INTERNAL CLOCKING .............................................................. 21 HARDWARE MODE INTERNAL CLOCKING .............................................................. 30 S/PDIF TRANSMITTER............................................................................................... 31 S/PDIF RECEIVER...................................................................................................... 34 GENERAL PURPOSE OUTPUT (GPO) CONFIGURATION ....................................... 43 DIGITAL AUDIO INTERFACE ..................................................................................... 44 AUDIO DATA FORMATS ............................................................................................ 45 REGISTER MAP ......................................................................................................... 52 APPLICATIONS INFORMATION .........................................................................63 RECOMMENDED EXTERNAL COMPONENTS .......................................................... 63 PACKAGE DIMENSIONS ....................................................................................65 IMPORTANT NOTICE ..........................................................................................66 ADDRESS: .................................................................................................................. 66 w PD Rev 4.1 September 2007 2 Production Data WM8804 PIN CONFIGURATION ( Top View ) ORDERING INFORMATION DEVICE W M8804GEDS W M8804GEDS/R Note: Reel quantity = 2,000 TEMPERATURE RANGE -25 to +85oC -25 to +85oC PACKAGE 20-lead SSOP (Pb-free) 20-lead SSOP (Pb-free, tape and reel) MOISTURE SENSITIVITY LEVEL MSL1 MSL1 PEAK SOLDERING TEMPERATURE 260oC 260oC w PD Rev 4.1 September 2007 3 WM8804 PIN DESCRIPTION PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Notes: 1. 2. Digital input pins have Schmitt trigger input buffers. Refer to Table 6 Device Configuration at Power up or Hardware Reset NAME SCLK GPO0 / SWIFMODE SDIN / HWMODE SDOUT / GPO2 CSB / GPO1 RESETB PVDD PGND CLKOUT XOP XIN DOUT DIN BCLK LRCLK MCLK TX0 DGND DVDD RX0 TYPE Digital In/Out Digital In/Out Digital Input Digital In/Out Digital In/Out Digital Input Supply Supply Digital Out Digital Output Digital Input Digital Out Digital In Digital In/Out Digital In/Out Digital In/Out Digital Out Supply Supply Digital In DESCRIPTION Production Data Control interface clock / GPO in hardware control mode. See note 2. General purpose digital output or selected functionality at hardware reset. See note 2. Control interface data input and hardware/software mode select at hardware reset. See note 2. Control interface data output in 3-wire software control mode/ GPO in hardware control mode or 2-wire software control mode. See note 2. Chip select / GPO in hardware control mode or 2-wire software control Mode. See note 2 System reset (active low) PLL core supply PLL ground High drive clock output at 64fs, 128fs, 256fs and 512fs Crystal output Crystal input Audio interface data output Audio interface data input Audio interface bit clock Audio interface left/right word clock Master clock input or output S/PDIF transmit channel Digital ground Digital core supply S/PDIF receive channel w PD Rev 4.1 September 2007 4 Production Data WM8804 ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are: MSL1 = unlimited floor life at