0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
WM8976

WM8976

  • 厂商:

    WOLFSON

  • 封装:

  • 描述:

    WM8976 - Stereo CODEC With Speaker Driver - Wolfson Microelectronics plc

  • 数据手册
  • 价格&库存
WM8976 数据手册
w Stereo CODEC With Speaker Driver DESCRIPTION The WM8976 is a low power, high quality CODEC designed for portable applications such as multimedia phone, digital still camera or digital camcorder. The device integrates a preamp for differential microphone, and includes drivers for speakers, headphone and differential or stereo line output. External component requirements are reduced as no separate microphone or headphone amplifiers are required. Advanced on-chip digital signal processing includes a 5-band equaliser, a mixed signal Automatic Level Control for the microphone or line input through the ADC as well as a purely digital limiter function for record or playback. Additional digital filtering options are available in the ADC path, to cater for application filtering such as ‘wind noise reduction’. The WM8976 digital audio interface can operate as a master or a slave. An internal PLL can generate all required audio clocks for the CODEC from common reference clock frequencies, such as 12MHz and 13MHz. The WM8976 operates at analogue supply voltages from 2.5V to 3.3V, although the digital core can operate at voltages down to 1.71V to save power. The speaker outputs and OUT3/4 line outputs can run from a 5V supply if increased output power is required. Individual sections of the chip can also be powered down under software control. WM8976 FEATURES Stereo CODEC: • DAC SNR 98dB, THD -84dB (‘A’ weighted @ 48kHz) • ADC SNR 95dB, THD -84dB (‘A’ weighted @ 48kHz) • On-chip Headphone Driver with ‘capless’ option - 40mW per channel into 16Ω / 3.3V SPKVDD • 0.9W output power into 8Ω BTL speaker / 5V SPKVDD - Capable of driving piezo speakers - Stereo speaker drive configuration Mic Preamps: • Differential or single-ended microphone interfaces - Programmable preamp gain - Psuedo differential input with common mode rejection - Programmable ALC / Noise Gate in ADC path • Low-noise bias supplied for electret microphone Other Features: • Enhanced 3-D function for improved stereo separation • Digital playback limiter • 5-band Equaliser (record or playback) • Programmable ADC High Pass Filter (wind noise reduction) • Programmable ADC Notch Filter • Aux inputs for stereo analog input signals or ‘beep’ • On-chip PLL supporting 12, 13, 19.2MHz and other clocks • Support for 8, 11.025, 12, 16, 22.05, 24, 32, 44.1 and 48kHz sample rates • Low power, low voltage - 2.5V to 3.6V (digital: 1.71V to 3.6V) • 5x5mm 32-lead QFN package APPLICATIONS • • Stereo Camcorder or DSC Multimedia Phone WOLFSON MICROELECTRONICS plc To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/ Pre-Production, April 2006, Rev 3.0 Copyright 2006 Wolfson Microelectronics plc WM8976 TABLE OF CONTENTS Pre-Production DESCRIPTION .......................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................4 ORDERING INFORMATION ..................................................................................4 PIN DESCRIPTION ................................................................................................5 ABSOLUTE MAXIMUM RATINGS.........................................................................6 RECOMMENDED OPERATING CONDITIONS .....................................................6 ELECTRICAL CHARACTERISTICS ......................................................................7 TERMINOLOGY .......................................................................................................... 10 SPEAKER OUTPUT THD VERSUS POWER ......................................................11 POWER CONSUMPTION ....................................................................................12 AUDIO PATHS OVERVIEW .................................................................................14 SIGNAL TIMING REQUIREMENTS .....................................................................15 SYSTEM CLOCK TIMING ........................................................................................... 15 AUDIO INTERFACE TIMING – MASTER MODE ........................................................ 15 AUDIO INTERFACE TIMING – SLAVE MODE............................................................ 16 CONTROL INTERFACE TIMING – 3-WIRE MODE .................................................... 17 CONTROL INTERFACE TIMING – 2-WIRE MODE .................................................... 18 DEVICE DESCRIPTION.......................................................................................19 INTRODUCTION ......................................................................................................... 19 INPUT SIGNAL PATH ................................................................................................. 21 ANALOGUE TO DIGITAL CONVERTER (ADC).......................................................... 25 INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC) .......................................... 29 OUTPUT SIGNAL PATH ............................................................................................. 41 3D STEREO ENHANCEMENT .................................................................................... 48 ANALOGUE OUTPUTS............................................................................................... 48 DIGITAL AUDIO INTERFACES................................................................................... 63 AUDIO SAMPLE RATES ............................................................................................. 68 MASTER CLOCK AND PHASE LOCKED LOOP (PLL) ............................................... 68 COMPANDING............................................................................................................ 70 GENERAL PURPOSE INPUT/OUTPUT...................................................................... 72 OUTPUT SWITCHING (JACK DETECT)..................................................................... 73 CONTROL INTERFACE.............................................................................................. 74 RESETTING THE CHIP .............................................................................................. 75 POWER SUPPLIES .................................................................................................... 76 RECOMMENDED POWER UP/DOWN SEQUENCE .................................................. 77 POWER MANAGEMENT ............................................................................................ 81 REGISTER MAP...................................................................................................82 REGISTER BITS BY ADDRESS ..........................................................................84 DIGITAL FILTER CHARACTERISTICS ...............................................................99 TERMINOLOGY .......................................................................................................... 99 DAC FILTER RESPONSES....................................................................................... 100 ADC FILTER RESPONSES....................................................................................... 100 HIGHPASS FILTER................................................................................................... 101 5-BAND EQUALISER ................................................................................................ 102 APPLICATION INFORMATION..........................................................................106 RECOMMENDED EXTERNAL COMPONENTS ........................................................ 106 w PP Rev 3.0 April 2006 2 Pre-Production WM8976 PACKAGE DIAGRAM ........................................................................................107 IMPORTANT NOTICE ........................................................................................108 ADDRESS: ................................................................................................................ 108 w PP Rev 3.0 April 2006 3 WM8976 PIN CONFIGURATION Pre-Production ORDERING INFORMATION ORDER CODE W M8976GEFL/V W M8976GEFL/RV Note: Reel quantity = 3,500 TEMPERATURE RANGE -25°C to +85°C -25°C to +85°C PACKAGE 32-lead QFN (5 x 5 mm) (Pb-free) 32-lead QFN (5 x 5 mm) (Pb-free, tape and reel) MOISTURE SENSITIVITY LEVEL MSL3 MSL3 PEAK SOLDERING TEMPERATURE 260oC 260oC w PP Rev 3.0 April 2006 4 Pre-Production WM8976 PIN DESCRIPTION PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 NAME LIP LIN L2/GPIO2 DNC DNC DNC LRC BCLK ADCDAT DACDAT MCLK DGND DCVDD DBVDD CSB/GPIO1 SCLK SDIN MODE AUXL AUXR OUT4 OUT3 ROUT2 SPKGND LOUT2 SPKVDD VMID AGND ROUT1 LOUT1 AVDD MICBIAS TYPE Analogue input Analogue input Analogue input Do not connect Do not connect Do not connect Digital Input / Output Digital Input / Output Digital Output Digital Input Digital Input Supply Supply Supply Digital Input / Output Digital Input Digital Input / Output Digital Input Analogue input Analogue input Analogue Output Analogue Output Analogue Output Supply Analogue Output Supply Reference Supply Analogue Output Analogue Output Supply Analogue Output Mic Pre-amp positive input Mic Pre-amp negative input Line input/secondary mic pre-amp positive input/GPIO2 pin Leave this pin floating Leave this pin floating Leave this pin floating DAC and ADC Sample Rate Clock Digital Audio Port Clock ADC Digital Audio Data Output DAC Digital Audio Data Input Master Clock Input Digital ground Digital core logic supply Digital buffer (I/O) supply 3-Wire Control Interface Chip Select / GPIO1 pin 3-Wire Control Interface Clock Input / 2-Wire Control Interface Clock Input 3-Wire Control Interface Data Input / 2-Wire Control Interface Data Input Control Interface Selection Left Auxillary input Right Auxillary input Buffered midrail Headphone pseudo-ground, or Right line output or MONO mix output Buffered midrail Headphone pseudo-ground, or Left line output Second right output, or BTL speaker driver positive output Speaker ground (feeds speaker amp and OUT3/OUT4) Second left output, or BTL speaker driver negative output Speaker supply (feed speaker amp only) Decoupling for ADC and DAC reference voltage Analogue ground (feeds ADC and DAC) Headphone or Line Output Right Headphone or Line Output Left Analogue supply (feeds ADC and DAC) Microphone Bias DESCRIPTION Note: It is recommended that the QFN ground paddle should be connected to analogue ground on the application PCB. Refer to the application note WAN_0118 on “Guidelines on How to Use QFN Packages and Create Associated PCB Footprints” w PP Rev 3.0 April 2006 5 WM8976 ABSOLUTE MAXIMUM RATINGS Pre-Production Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are: MSL1 = unlimited floor life at
WM8976 价格&库存

很抱歉,暂时无法提供与“WM8976”相匹配的价格&库存,您可以联系我们找货

免费人工找货