WM8978_06

w Stereo CODEC With Speaker Driver DESCRIPTION The WM8978 is a low power, high quality stereo CODEC designed for portable applications such as multimedia phone, digital still camera or digital camcorder. The device integrates preamps for stereo differential mics, and includes drivers for speakers, headphone and differential or stereo line output. External component requirements are reduced as no separate microphone or headphone amplifiers are required. Advanced on-chip digital signal processing includes a 5-band equaliser, a mixed signal Automatic Level Control for the microphone or line input through the ADC as well as a purely digital limiter function for record or playback. Additional digital filtering options are available in the ADC path, to cater for application filtering such as ‘wind noise reduction’. The WM8978 digital audio interface can operate as a master or a slave. An internal PLL can generate all required audio clocks for the CODEC from common reference clock frequencies, such as 12MHz and 13MHz. The WM8978 operates at analogue supply voltages from 2.5V to 3.3V, although the digital core can operate at voltages down to 1.71V to save power. The speaker outputs and OUT3/4 line outputs can run from a 5V supply if increased output power is required. Individual sections of the chip can also be powered down under software control. WM8978 FEATURES Stereo CODEC: • DAC SNR 98dB, THD -84dB (‘A’ weighted @ 48kHz) • ADC SNR 95dB, THD -84dB (‘A’ weighted @ 48kHz) • On-chip Headphone Driver with ‘capless’ option 40mW per channel into 16Ω / 3.3V SPKVDD • 0.9W output power into 8Ω BTL speaker / 5V SPKVDD Capable of driving piezo speakers Stereo speaker drive configuration Mic Preamps: • Stereo Differential or mono microphone Interfaces Programmable preamp gain Psuedo differential inputs with common mode rejection Programmable ALC / Noise Gate in ADC path • Low-noise bias supplied for electret microphones Other Features: • Enhanced 3-D function for improved stereo separation • Digital playback limiter • 5-band Equaliser (record or playback) • Programmable ADC High Pass Filter (wind noise reduction) • Programmable ADC Notch Filter • Aux inputs for stereo analog input signals or ‘beep’ • On-chip PLL supporting 12, 13, 19.2MHz and other clocks • Support for 8, 11.025, 12, 16, 22.05, 24, 32, 44.1 and 48kHz sample rates • Low power, low voltage 2.5V to 3.6V (digital: 1.71V to 3.6V) • 5x5mm 32-lead QFN package APPLICATIONS BLOCK DIAGRAM • • Stereo Camcorder or DSC Multimedia Phone WOLFSON MICROELECTRONICS plc To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/ Pre-Production, May 2006, Rev 3.0 Copyright 2006 Wolfson Microelectronics plc WM8978 TABLE OF CONTENTS Pre-Production DESCRIPTION .......................................................................................................1 BLOCK DIAGRAM .................................................................................................1 FEATURES.............................................................................................................1 APPLICATIONS .....................................................................................................1 TABLE OF CONTENTS .........................................................................................2 PIN CONFIGURATION...........................................................................................4 ORDERING INFORMATION ..................................................................................4 PIN DESCRIPTION ................................................................................................5 ABSOLUTE MAXIMUM RATINGS.........................................................................6 RECOMMENDED OPERATING CONDITIONS .....................................................6 ELECTRICAL CHARACTERISTICS ......................................................................7 TERMINOLOGY .......................................................................................................... 10 SPEAKER OUTPUT THD VERSUS POWER ......................................................11 POWER CONSUMPTION ....................................................................................12 AUDIO PATHS OVERVIEW .................................................................................14 SIGNAL TIMING REQUIREMENTS .....................................................................15 SYSTEM CLOCK TIMING ........................................................................................... 15 AUDIO INTERFACE TIMING – MASTER MODE ........................................................ 15 AUDIO INTERFACE TIMING – SLAVE MODE............................................................ 16 CONTROL INTERFACE TIMING – 3-WIRE MODE .................................................... 17 CONTROL INTERFACE TIMING – 2-WIRE MODE .................................................... 18 INTERNAL POWER ON RESET CIRCUIT ..........................................................19 RECOMMENDED POWER UP/DOWN SEQUENCE .................................................. 21 DEVICE DESCRIPTION.......................................................................................25 INTRODUCTION ......................................................................................................... 25 INPUT SIGNAL PATH ................................................................................................. 27 ANALOGUE TO DIGITAL CONVERTER (ADC).......................................................... 34 INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC) .......................................... 40 OUTPUT SIGNAL PATH ............................................................................................. 52 3D STEREO ENHANCEMENT .................................................................................... 59 ANALOGUE OUTPUTS............................................................................................... 59 DIGITAL AUDIO INTERFACES................................................................................... 75 AUDIO SAMPLE RATES ............................................................................................. 80 MASTER CLOCK AND PHASE LOCKED LOOP (PLL) ............................................... 80 COMPANDING............................................................................................................ 83 GENERAL PURPOSE INPUT/OUTPUT...................................................................... 85 OUTPUT SWITCHING (JACK DETECT)..................................................................... 86 CONTROL INTERFACE.............................................................................................. 88 RESETTING THE CHIP .............................................................................................. 89 POWER SUPPLIES .................................................................................................... 89 POWER MANAGEMENT ............................................................................................ 90 REGISTER MAP...................................................................................................91 REGISTER BITS BY ADDRESS ................................................................................. 93 DIGITAL FILTER CHARACTERISTICS .............................................................110 TERMINOLOGY ........................................................................................................ 110 DAC FILTER RESPONSES....................................................................................... 111 ADC FILTER RESPONSES....................................................................................... 111 HIGHPASS FILTER................................................................................................... 112 5-BAND EQUALISER ................................................................................................ 113 w PP Rev 3.0 May 2006 2 Pre-Production WM8978 APPLICATION INFORMATION..........................................................................117 RECOMMENDED EXTERNAL COMPONENTS ........................................................ 117 PACKAGE DIAGRAM ........................................................................................118 IMPORTANT NOTICE ........................................................................................119 ADDRESS: ................................................................................................................ 119 w PP Rev 3.0 May 2006 3 WM8978 PIN CONFIGURATION Pre-Production ORDERING INFORMATION ORDER CODE W M8978GEFL/V W M8978GEFL/RV Note: Reel quantity = 3,500 TEMPERATURE RANGE -25°C to +85°C -25°C to +85°C PACKAGE 32-lead QFN (5 x 5 mm) (Pb-free) 32-lead QFN (5 x 5 mm) (Pb-free, tape and reel) MOISTURE SENSITIVITY LEVEL MSL3 MSL3 PEAK SOLDERING TEMPERATURE 260oC 260oC w PP Rev 3.0 May 2006 4 Pre-Production WM8978 PIN DESCRIPTION PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 NAME LIP LIN L2/GPIO2 RIP RIN R2/GPIO3 LRC BCLK ADCDAT DACDAT MCLK DGND DCVDD DBVDD CSB/GPIO1 SCLK SDIN MODE AUXL AUXR OUT4 OUT3 ROUT2 SPKGND LOUT2 SPKVDD VMID AGND ROUT1 LOUT1 AVDD MICBIAS TYPE Analogue input Analogue input Analogue input Analogue input Analogue input Analogue input Digital Input / Output Digital Input / Output Digital Output Digital Input Digital Input Supply Supply Supply Digital Input / Output Digital Input Digital Input / Output Digital Input Analogue input Analogue input Analogue Output Analogue Output Analogue Output Supply Analogue Output Supply Reference Supply Analogue Output Analogue Output Supply Analogue Output DESCRIPTION Left Mic Pre-amp positive input Left Mic Pre-amp negative input Left channel line input/secondary mic pre-amp positive input/GPIO2 pin Right Mic Pre-amp positive input Right Mic Pre-amp negative input Right channel line input/secondary mic pre-amp positive input/GPIO3 pin DAC and ADC Sample Rate Clock Digital Audio Port Clock ADC Digital Audio Data Output DAC Digital Audio Data Input Master Clock Input Digital ground Digital core logic supply Digital buffer (I/O) supply 3-Wire Control Interface Chip Select / GPIO1 pin 3-Wire Control Interface Clock Input / 2-Wire Control Interface Clock Input 3-Wire Control Interface Data Input / 2-Wire Control Interface Data Input Control Interface Selection Left Auxillary input Right Auxillary input Buffered midrail Headphone pseudo-ground, or Right line output or MONO mix output Buffered midrail Headphone pseudo-ground, or Left line output Second right output, or BTL speaker driver positive output Speaker ground (feeds speaker amp and OUT3/OUT4) Second left output, or BTL speaker driver negative output Speaker supply (feed speaker amp only) Decoupling for ADC and DAC reference voltage Analogue ground (feeds ADC and DAC) Headphone or Line Output Right Headphone or Line Output Left Analogue supply (feeds ADC and DAC) Microphone Bias Note: It is recommended that the QFN ground paddle should be connected to analogue ground on the application PCB. Refer to the application note WAN_0118 on “Guidelines on How to Use QFN Packages and Create Associated PCB Footprints”. w PP Rev 3.0 May 2006 5 WM8978 ABSOLUTE MAXIMUM RATINGS Pre-Production Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are: MSL1 = unlimited floor life at