Z86E3312PEC

PRELIMINARY PRODUCT SPECIFICATION 1 Z86E33/733/E34 Z86E43/743/E44 1 CMOS Z8 OTP MICROCONTROLLERS FEATURES Device ROM (KB) RAM* (Bytes) I/O Lines Speed (MHz) Z86E33 Z86733 Z86E34 Z86E43 Z86743 Z86E44 4 8 16 4 8 16 237 237 237 236 236 236 24 24 24 32 32 32 12 12 12 12 12 12 Note: *General-Purpose ■ Standard Temperature (VCC = 3.5V to 5.5V) ■ Extended Temperature (VCC = 4.5V to 5.5V) ■ Available Packages: 28-Pin DIP/SOIC/PLCC OTP (E33/733/E34) 40-Pin DIP OTP (E43/743/E44) 44-Pin PLCC/QFP OTP (E43/743/E44) ■ Software Enabled Watch-Dog Timer (WDT) ■ Push-Pull/Open-Drain Programmable on Port 0, Port 1, and Port 2 ■ 24/32 Input/Output Lines ■ Clock-Free WDT Reset ■ Auto Power-On Reset (POR) ■ Programmable OTP Options: RC Oscillator EPROM Protect Auto Latch Disable Permanently Enabled WDT Crystal Oscillator Feedback Resistor Disable RAM Protect ■ Low-Power Consumption: 60 mW ■ Fast Instruction Pointer: 0.75 µs ■ Two Standby Modes: STOP and HALT ■ Digital Inputs CMOS Levels, Schmitt-Triggered ■ Software Programmable Low EMI Mode ■ Two Programmable 8-Bit Counter/Timers Each with a 6-Bit Programmable Prescaler ■ Six Vectored, Priority Interrupts from Six Different Sources ■ Two Comparators ■ On-Chip Oscillator that Accepts a Crystal, Ceramic Resonator, LC, RC, or External Clock Drive GENERAL DESCRIPTION The Z86E33/733/E34/E43/743/E44 8-Bit One-Time Programmable (OTP) Microcontrollers are members of Zilog's single-chip Z8 ® MCU family featuring enhanced wake-up circuitry, programmable Watch-Dog Timers, Low Noise EMI options, and easy hardware/software system expansion capability. Four basic address spaces support a wide range of memory configurations. The designer has access to three addi- DS97Z8X1500 tional control registers that allow easy access to register mapped peripheral and I/O circuits. For applications demanding powerful I/O capabilities, the Z86E33/733/E34 have 24 pins, and the Z86E43/743/E44 have 32 pins of dedicated input and output. These lines are grouped into four ports, eight lines per port, and are configurable under software control to provide timing, status sig- PRELIMINARY 1 Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Zilog GENERAL DESCRIPTION (Continued) nals, and parallel I/O with or without handshake, and address/data bus for interfacing external memory. Power connections follow conventional descriptions below: Notes: All signals with a preceding front slash, "/", are active Low. For example, B//W (WORD is active Low); /B/W (BYTE is active Low, only). Connection Circuit Device Power VCC VDD Ground GND VSS (E43/743/E44 Only) Output Input VCC GND XTAL /AS /DS R//W /RESET Machine Timing & Instruction Control Port 3 Counter/ Timers (2) RESET WDT, POR ALU FLAGS Interrupt Control Two Analog Comparators OTP Register Pointer Register File Program Counter Port 0 Port 1 Port 2 4 I/O (Bit Programmable) 4 Address or I/O (Nibble Programmable) 8 Address/Data or I/O (Byte Programmable) (E43/743/E44 Only) Figure 1. Functional Block Diagram 2 PRELIMINARY DS97Z8X1500 Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Zilog D7 - 0 1 AD 11- 0 Z8 MCU AD 11- 0 Address MUX D7 - 0 AD 13- 0 Address Counter EPROM TEST ROM Data MUX D7 - 0 Z8 Port 2 OTP Options PGM + Test Mode Logic VPP P33 CLR CLK (P00) (P01) EPM P32 /OE P31 /PGM P02 /CE XT1 Figure 2. EPROM Programming Block Diagram DS97Z8X1500 PRELIMINARY 3 Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Zilog PIN IDENTIFICATION Table 1. 40-Pin DIP Pin Identification Standard Mode R//w P25 P26 P27 P04 P05 P06 P14 P15 P07 VCC P16 P17 XTAL2 XTAL1 P31 P32 P33 P34 /AS 1 40 DIP 40 - Pin 20 21 /DS P24 P23 P22 P21 P20 P03 P13 P12 GND P02 P11 P10 P01 P00 P30 P36 P37 P35 /RESET Figure 3. 40-Pin DIP Pin Configuration Standard Mode 4 Pin # Symbol Function Direction 1 2-4 5-7 8-9 10 11 R//W P25-P27 P04-P06 P14-P15 P07 VCC Read/Write Port 2, Pins 5,6,7 Port 0, Pins 4,5,6 Port 1, Pins 4,5 Port 0, Pin 7 Power Supply Output In/Output In/Output In/Output In/Output 12-13 14 15 16-18 19 20 21 22 23 24 25 26-27 28-29 30 31 32-33 34 35-39 40 P16-P17 XTAL2 XTAL1 P31-P33 P34 /AS /RESET P35 P37 P36 P30 P00-P01 P10-P11 P02 GND P12-P13 P03 P20-P24 /DS Port 1, Pins 6,7 Crystal Oscillator Crystal Oscillator Port 3, Pins 1,2,3 Port 3, Pin 4 Address Strobe Reset Port 3, Pin 5 Port 3, Pin 7 Port 3, Pin 6 Port 3, Pin 0 Port 0, Pins 0,1 Port 1, Pins 0,1 Port 0, Pin 2 Ground Port 1, Pins 2,3 Port 0, Pin 3 Port 2, Pins 0,1,2,3,4 Data Strobe In/Output Output Input Input Output Output Input Output Output Output Input In/Output In/Output In/Output PRELIMINARY In/Output In/Output In/Output Output DS97Z8X1500 Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Zilog 1 6 P21 P22 P23 P24 /DS NC R//W P25 P26 P27 P04 1 40 39 7 44-Pin PLCC 17 29 28 18 P30 P36 P37 P35 /RESET R//RL /AS P34 P33 P32 P31 Figure 4. 44-Pin PLCC Pin Configuration Standard Mode Table 2. 44-Pin PLCC Pin Identification Pin # Symbol Function 1-2 3-4 5 6-10 11 12 13 14-16 17-19 20-21 22 23-24 25-26 27 GND P12-P13 P03 P20-P24 /DS NC R//W P25-P27 P04-P06 P14-P15 P07 VCC P16-P17 XTAL2 Ground Port 1, Pins 2,3 Port 0, Pin 3 Port 2, Pins 0,1,2,3,4 Data Strobe No Connection Read/Write Port 2, Pins 5,6,7 Port 0, Pins 4,5,6 Port 1, Pins 4,5 Port 0, Pin 7 Power Supply Port 1, Pins 6,7 Crystal Oscillator DS97Z8X1500 Direction In/Output In/Output In/Output Output Output In/Output In/Output In/Output In/Output In/Output Output Table 2. 44-Pin PLCC Pin Identification Pin # Symbol Function Direction 28 29-31 32 33 34 35 36 37 38 39 40-41 42-43 44 XTAL1 P31-P33 P34 /AS R//RL /RESET P35 P37 P36 P30 P00-P01 P10-P11 P02 Crystal Oscillator Port 3, Pins 1,2,3 Port 3, Pin 4 Address Strobe ROM/ROMless select Reset Port 3, Pin 5 Port 3, Pin 7 Port 3, Pin 6 Port 3, Pin 0 Port 0, Pins 0,1 Port 1, Pins 0,1 Port 0, Pin 2 Input Input Output Output Input Input Output Output Output Input In/Output In/Output In/Output PRELIMINARY 5 Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Zilog PIN IDENTIFICATION (Continued) 33 P21 P22 P23 P24 /DS NC R//W P25 P26 P27 P04 23 22 34 44-Pin QFP 12 11 44 1 P30 P36 P37 P35 /RESET R//RL /AS P34 P33 P32 P31 Figure 5. 44-Pin QFP Pin Configuration Standard Mode Table 3. 44-Pin QFP Pin Identification Table 3. 44-Pin QFP Pin Identification Pin # Symbol Function Direction Pin # Symbol Function Direction 1-2 3-4 5 6-7 8-9 10 11 12-14 15 16 17 18 19 20 21 P05-P06 P14-P15 P07 VCC P16-P17 XTAL2 XTAL1 P31-P33 P34 /AS R//RL /RESET P35 P37 P36 Port 0, Pins 5,6 Port 1, Pins 4,5 Port 0, Pin 7 Power Supply Port 1, Pins 6,7 Crystal Oscillator Crystal Oscillator Port 3, Pins 1,2,3 Port 3, Pin 4 Address Strobe ROM/ROMless select Reset Port 3, Pin 5 Port 3, Pin 7 Port 3, Pin 6 In/Output In/Output In/Output 22 23-24 25-26 27 28-29 30-31 32 33-37 38 39 40 41-43 44 P30 P00-P01 P10-P11 P02 GND P12-P13 P03 P20-24 /DS NC R//W P25-P27 P04 Port 3, Pin 0 Port 0, Pin 0,1 Port 1, Pins 0,1 Port 0, Pin 2 Ground Port 1, Pins 2,3 Port 0, Pin 3 Port 2, Pins 0,1,2,3,4 Data Strobe No Connection Read/Write Port 2, Pins 5,6,7 Port 0, Pin 4 Input In/Output In/Output In/Output 6 In/Output Output Input Input Output Output Input Input Output Output Output PRELIMINARY In/Output In/Output In/Output Output Output In/Output In/Output DS97Z8X1500 Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Zilog Table 4. 40-Pin DIP Package Pin Identification EPROM Mode NC D5 D6 D7 NC NC NC NC NC NC VCC NC NC NC /CE /OE EPM VPP NC NC 1 40 40-Pin DIP 20 21 NC D4 D3 D2 D1 D0 NC NC NC GND /PGM NC NC CLK CLR NC NC NC NC NC Figure 6. 40-Pin DIP Pin Configuration EPROM Mode DS97Z8X1500 Pin # Symbol Function 1 2-4 5-10 11 NC D5-D7 NC VCC No Connection Data 5,6,7 No Connection Power Supply 12-14 15 16 17 18 19-25 26 27 28-29 30 31 32-34 35-39 40 NC /CE /OE EPM VPP NC CLR CLK NC /PGM GND NC D0-D4 NC No Connection Chip Select Output Enable EPROM Prog. Mode Prog. Voltage No Connection Clear Clock No Connection Prog. Mode Ground No Connection Data 0,1,2,3,4 No Connection PRELIMINARY 1 Direction In/Output Input Input Input Input Input Input Input In/Output 7 Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Zilog PIN IDENTIFICATION (Continued) 6 D1 D2 D3 D4 NC NC NC D5 D6 D7 NC 1 40 39 7 44 -Pin PLCC 17 29 28 18 NC NC NC NC NC NC NC NC VPP EPM /OE Figure 7. 44-Pin PLCC Pin Configuration EPROM Programming Mode Table 5. 44-Pin PLCC Pin Configuration EPROM Programming Mode Pin # Symbol Function 1-2 3-5 6-10 11-13 14-16 17-22 23-24 25-27 28 GND NC D0-D4 NC D5-D7 NC VCC NC /CE Ground No Connection Data 0,1,2,3,4 No Connection Data 5,6,7 No Connection Power Supply No Connection Chip Select 8 Direction Table 5. 44-Pin PLCC Pin Configuration EPROM Programming Mode Pin # Symbol Function Direction 29 30 /OE EPM Input Input 31 VPP Output Enable EPROM Prog. Mode Prog. Voltage 32-39 40 41 42-43 44 NC CLR CLK NC /PGM No Connection Clear Clock No Connection Prog. Mode In/Output In/Output Input PRELIMINARY Input Input Input Input DS97Z8X1500 Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Zilog 1 33 D1 D2 D3 D4 NC NC NC D5 D6 D7 NC 23 22 34 44 -Pin QFP 12 11 44 1 NC NC NC NC NC NC NC NC VPP EPM /OE Figure 8. 44-Pin QFP Pin Configuration EPROM Programming Mode Table 6. 44-Pin QFP Pin Identification EPROM Programming Mode Pin # Symbol Function 1-5 6-7 NC VCC No Connection Power Supply 8-10 11 12 13 NC /CE /OE EPM 14 VPP No Connection Chip Select Output Enable EPROM Prog. Mode Prog. Voltage 15-22 23 NC CLR No Connection Clear DS97Z8X1500 Table 6. 44-Pin QFP Pin Identification EPROM Programming Mode Direction Pin # Symbol Function Direction CLK NC /PGM GND NC D0-D4 NC D5-D7 NC Clock No Connection Prog. Mode Ground No Connection Data 0,1,2,3,4 No Connection Data 5,6,7 No Connection Input Input Input Input 24 25-26 27 28-29 30-32 33-37 38-40 41-43 44 Input Input In/Output In/Output Input PRELIMINARY 9 Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Zilog PIN IDENTIFICATION (Continued) P25 P26 P27 P04 P05 P06 P07 VCC XTAL2 XTAL1 P31 P32 P33 P34 1 28 28-Pin DIP/SOIC 14 15 P24 P23 P22 P21 P20 P03 VSS P02 P01 P00 P30 P36 P37 P35 4 XXX P05 XXX P06 XXX P07 VCC XXX XXX XT2 XXX XT1 XXX P31 Figure 9. Standard Mode 28-Pin DIP/SOIC Pin Configuration 1 5 26 25 28-Pin PLCC 11 12 19 18 P21 XXX XXX P20 XXX P03 XXX VSS XXX P02 XXX P01 XXX P00 Figure 10. Standard Mode 28-Pin PLCC Pin Configuration Table 7. 28-Pin DIP/SOIC/PLCC Pin Identification Standard Mode Pin # Symbol Function 1-3 4-7 8 P25-P27 P04-P07 VCC Port 2, Pins 5,6, In/Output Port 0, Pins 4,5,6,7 In/Output Power Supply 9 10 11-13 14-15 16 17 18 19-21 22 XTAL2 XTAL1 P31-P33 P34-P35 P37 P36 P30 P00-P02 VSS Crystal Oscillator Crystal Oscillator Port 3, Pins 1,2,3 Port 3, Pins 4,5 Port 3, Pin 7 Port 3, Pin 6 Port 3, Pin 0 Port 0, Pins 0,1,2 Ground Output Input Input Output Output Output Input In/Output 23 24-28 P03 P20-P24 Port 0, Pin 3 Port 2, Pins 0,1,2,3,4 In/Output In/Output 10 Direction PRELIMINARY DS97Z8X1500 Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Zilog D5 D6 D7 NC NC NC NC VCC NC /CE /OE EPM VPP NC 1 28 28-Pin DIP/SOIC 14 15 Table 8. 28-Pin EPROM Pin Identification EPROM Mode D4 D3 D2 D1 D0 NC VSS /PGM CLK CLR NC NC NC NC Figure 11. EPROM Programming Mode 28-Pin DIP/SOIC Pin Configuration 4 XXX NC XXX NC XXX NC VCC XXX XXX NC XXX /CE XXX /OE 1 5 26 25 28-Pin PLCC 11 12 19 18 Pin # Symbol Function Direction 1-3 4-7 8 D5-D7 NC VCC Data 5,6,7 No Connection Power Supply In/Output 9 10 11 12 NC /CE /OE EPM 13 VPP No connection Chip Select Output Enable EPROM Prog. Mode Prog. Voltage 14-18 19 20 21 22 NC CLR CLK /PGM VSS No Connection Clear Clock Prog. Mode Ground 23 24-28 NC D0-D4 No Connection Data 0,1,2,3,4 1 Input Input Input Input Input In/Output D1 XXX XXX D0 XXX NC XXX VSS XXX /PGM XXX CLK XXX CLR Figure 12. EPROM Programming Mode 28-Pin PLCC Pin Configuration DS97Z8X1500 PRELIMINARY 11 Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Zilog ABSOLUTE MAXIMUM RATINGS Parameter Min Max Units Ambient Temperature under Bias Storage Temperature Voltage on any Pin with Respect to VSS [Note 1] –40 –65 –0.6 +105 +150 +7 C C V Voltage on VDD Pin with Respect to VSS –0.3 +7 V Voltage on XTAL1, P32, P33 and /RESET Pins with Respect to VSS [Note 2] –0.6 VDD+1 V Total Power Dissipation Maximum Allowable Current out of VSS 1.21 220 W mA Maximum Allowable Current into VDD 180 mA +600 +600 25 25 3 µA µA mA mA mA Maximum Allowable Current into an Input Pin [Note 3] Maximum Allowable Current into an Open-Drain Pin [Note 4] Maximum Allowable Output Current Sunk by Any I/O Pin Maximum Allowable Output Current Sourced by Any I/O Pin Maximum Allowable Output Current Sunk by /RESET Pin –600 –600 Notes: 1. This applies to all pins except XTAL pins and where otherwise noted. 2. There is no input protection diode from pin to VDD. 3. This excludes XTAL pins. 4. Device pin is not at an output Low state. Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at any condition above those indicated in the operational sections of these specifications is not implied. Exposure to absolute maximum rating conditions for an extended period may affect device reliability. Total power dissipation should not exceed 1.2 W for the package. Power dissipation is calculated as follows: Total Power Dissipation = VDD x [ IDD – (sum of IOH) ] + sum of [ (VDD – VOH) x IOH ] + sum of (V0L x I0L) STANDARD TEST CONDITIONS The characteristics listed below apply for standard test conditions as noted. All voltages are referenced to Ground. Positive current flows into the referenced pin (Test Load). From Output Under Test 150 pF Figure 13. Test Load Diagram 12 PRELIMINARY DS97Z8X1500 Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Zilog CAPACITANCE TA = 25°C, VCC = GND = 0V, f = 1.0 MHz; unmeasured pins returned to GND. Parameter 1 Min Max 0 0 0 12 pF 12 pF 12 pF Input capacitance Output capacitance I/O capacitance DC ELECTRICAL CHARACTERISTICS TA= 0 °C to +70 °C Sym Parameter VCC Note [3] Min Max Typical @ 25°C Units Conditions Notes VCH Clock Input High Voltage 3.5V 5.5V 0.7 VCC 0.7 VCC VCC+0.3 VCC+0.3 1.8 2.5 V V VCL Clock Input Low Voltage 3.5V 5.5V GND-0.3 GND-0.3 0.2 VCC 0.2 VCC 0.9 1.5 V V VIH Input High Voltage 3.5V 5.5V 0.7 VCC 0.7 VCC VCC+0.3 VCC+0.3 2.5 2.5 V V VIL Input Low Voltage 3.5V 5.5V GND-0.3 GND-0.3 0.2 VCC 0.2 VCC 1.5 1.5 V V VOH Output High Voltage Low EMI Mode 3.5V 5.5V VCC–0.4 VCC -0.4 3.3 4.8 V V IOH = – 0.5 mA VOH1 Output High Voltage 3.5V 5.5V VCC–0.4 VCC–0.4 3.3 4.8 V V IOH = -2.0 mA IOH = -2.0 mA VOL Output Low Voltage Low EMI Mode 3.5V 5.5V 0.4 0.4 0.2 0.2 V V IOL = +1.0 mA IOL = +1.0 mA VOL1 Output Low Voltage 3.5V 5.5V 0.4 0.4 0.1 0.1 V V IOL = + 4.0 mA IOL = + 4.0 mA 8 8 VOL2 Output Low Voltage 3.5V 5.5V 1.2 1.2 0.5 0.5 V V IOL = + 10 mA IOL = + 10 mA 8 8 VRH Reset Input High Voltage 3.5V 5.5V .8 VCC .8 VCC VCC VCC 1.7 2.1 V V 13 13 VRL Reset Input Low Voltage 3.5V 5.5V GND –0.3 GND –0.3 0.2 VCC 0.2 VCC 1.3 1.7 V V 13 13 VOLR Reset Output Low Voltage 3.5V 5.5V 0.6 0.6 0.3 0.2 V V VOFFSET Comparator Input Offset Voltage Input Common Mode Voltage Range 3.5V 5.5V 3.5V 5.5V 10 10 0 0 25 25 VCC -1.0V VCC -1.0V mV mV V V IIL Input Leakage 3.5V 5.5V –1 –1 2 2 0.032 0.032 µA µA VIN = 0V, VCC VIN = 0V, VCC IOL Output Leakage 3.5V 5.5V –1 -1 2 2 0.032 0.032 µA µA VIN = 0V, VCC VIN = 0V, VCC VICR DS97Z8X1500 PRELIMINARY Driven by External Clock Generator Driven by External Clock Generator IOL = +1.0 mA IOL = +1.0 mA 13 13 10 10 13 Z86E33/733/E34/E43/743/E44 CMOS Z8 OTP Microcontrollers Zilog DC ELECTRICAL CHARACTERISTICS (Continued) TA= 0 °C to +70 °C Sym Parameter IIR Reset Input Current ICC Supply Current ICC1 Standby Current Halt Mode VCC Note [3] 3.5V 5.5V 3.5V 5.5V 3.5V 5.5V Min Max Typical @ 25°C Units –20 –20 –130 –180 15 20 4 6 –65 –112 5 15 2 4 µA µA mA mA mA mA 3 5 10 10 15 30 1.5 3 2 3 7 10 mA mA µA µA µA µA Conditions @ 12 MHz @ 12 MHz VIN = 0V, VCC @ 12 MHz Clock Divide by 16 @ 12 MHz VIN = 0V, VCC VIN = 0V, VCC VIN = 0V, VCC VIN = 0V, VCC Notes 4,5 4,5 4,5 4,5 ICC2 Standby Current Stop Mode 3.5V 5.5V 3.5V 5.5V 3.5V 5.5V 4,5 4,5 6,11 6,11 6,11,14 6,11,14 IALL Auto Latch Low Current 3.5V 5.5V 0.7 1.4 8 15 2.4 4.7 µA µA 0V