PRELIMINARY PRODUCT SPECIFICATION
1
Z86E30/E31/E40
1
Z8 4K OTP MICROCONTROLLER
FEATURES
Device
ROM
(KB)
RAM*
(Bytes)
I/O
Lines
Speed
(MHz)
Z86E30
Z86E31
Z86E40
4
2
4
237
125
236
24
24
32
16
16
16
■
Programmable OTP Options:
RC Oscillator
EPROM Protect
Auto Latch Disable
Permanently Enabled WDT
Crystal Oscillator Feedback Resistor Disable
RAM Protect
■
Low-Power Consumption: 60 mW
■
Fast Instruction Pointer: 0.75 µs
Note: *General-Purpose
■
Standard Temperature (VCC = 3.5V to 5.5V)
■
Extended Temperature (VCC = 4.5V to 5.5V)
■
Available Packages:
28-Pin DIP/SOIC/PLCC OTP (Z86E30/31 only)
40-Pin DIP OTP (Z86E40 only)
PLCC/LQFP
OTP
(Z86E40
only)
44-Pin PLCC/QFP
OTP
(Z86E40
only)
■
Two Standby Modes: STOP and HALT
■
Digital Inputs CMOS Levels, Schmitt-Triggered
■
Software Programmable Low EMI Mode
■
Software Enabled Watch-Dog Timer (WDT)
■
■
Push-Pull/Open-Drain Programmable on
Port 0, Port 1, and Port 2
Two Programmable 8-Bit Counter/Timers Each
with a 6-Bit Programmable Prescaler
■
Six Vectored, Priority Interrupts from Six
Different Sources
■
Two Comparators
■
On-Chip Oscillator that Accepts a Crystal, Ceramic
Resonator, LC, RC, or External Clock Drive
■
24/32 Input/Output Lines
■
Auto Latches
■
Auto Power-On Reset (POR)
GENERAL DESCRIPTION
The Z86E30/E31/E40 8-Bit One-Time Programmable
(OTP) Microcontrollers are members of Zilog's single-chip
Z8® MCU family featuring enhanced wake-up circuitry,
programmable Watch-Dog Timers, Low Noise EMI options, and easy hardware/software system expansion capability.
Four basic address spaces support a wide range of memory configurations. The designer has access to three additional control registers that allow easy access to register
mapped peripheral and I/O circuits.
DS97Z8X0502
For applications demanding powerful I/O capabilities, the
Z86E30/E31 have 24 pins, and the Z86E40 has 32 pins of
dedicated input and output. These lines are grouped into
four ports, eight lines per port, and are configurable under
software control to provide timing, status signals, and parallel I/O with or without handshake, and address/data bus
for interfacing external memory.
Notes: All signals with a preceding front slash, “/”, are
active Low. For example, B/W (WORD is active Low); B/W
(BYTE is active Low, only).
PRELIMINARY
1
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
Power connections follow conventional descriptions below:
Connection
Circuit
Device
Power
VCC
VDD
Ground
GND
VSS
(E40 Only)
Output Input
VCC
GND
XTAL AS DS R/W RESET
Machine Timing
&
Instruction Control
Port 3
Counter/
Timers (2)
RESET
WDT, POR
ALU
FLAGS
Interrupt
Control
OTP
Two Analog
Comparators
Register
Pointer
Register File
Program
Counter
Port 0
Port 1
Port 2
4
I/O
(Bit Programmable)
4
Address or I/O
(Nibble Programmable)
8
Address/Data or I/O
(Byte Programmable)
(E40 Only)
Figure 1. Z86E30/E31/E40 Functional Block Diagram
2
PRELIMINARY
DS97Z8X0502
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
D7 - 0
1
AD 11- 0
Z8 MCU
MSN
Port 3
AD 11- 0
Address
MUX
D7 - 0
AD 11- 0
EPROM
TEST ROM
Z8
Port 0
Data
MUX
D7 - 0
Z8
Port 2
OTP
Options
PGM + Test
Mode Logic
VPP
P33
EPM
P32
OE
P31
PGM
P30
CE
XT1
Figure 2. EPROM Programming Block Diagram
DS97Z8X0502
PRELIMINARY
3
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
PIN IDENTIFICATION
Table 1. 40-Pin DIP Pin Identification
Standard Mode
R/W
P25
P26
P27
P04
P05
P06
P14
P15
P07
VCC
P16
P17
XTAL2
XTAL1
P31
P32
P33
P34
AS
1
40
40-Pin DIP
20
21
DS
P24
P23
P22
P21
P20
P03
P13
P12
GND
P02
P11
P10
P01
P00
P30
P36
P37
P35
RESET
Figure 3. 40-Pin DIP Pin Configuration
Standard Mode
4
Pin #
Symbol
Function
Direction
1
2–4
5–7
8–9
10
11
R/W
P25–P27
P04–P06
P14–P15
P07
VCC
Read/Write
Port 2, Pins 5,6,7
Port 0, Pins 4,5,6
Port 1, Pins 4,5
Port 0, Pin 7
Power Supply
Output
In/Output
In/Output
In/Output
In/Output
12–13
14
15
16–18
19
20
21
22
23
24
25
26–27
28–29
30
31
32–33
34
35–39
40
P16–P17
XTAL2
XTAL1
P31–P33
P34
AS
RESET
P35
P37
P36
P30
P00–P01
P10–P11
P02
GND
P12–P13
P03
P20–P24
DS
Port 1, Pins 6,7
Crystal Oscillator
Crystal Oscillator
Port 3, Pins 1,2,3
Port 3, Pin 4
Address Strobe
Reset
Port 3, Pin 5
Port 3, Pin 7
Port 3, Pin 6
Port 3, Pin 0
Port 0, Pins 0,1
Port 1, Pins 0,1
Port 0, Pin 2
Ground
Port 1, Pins 2,3
Port 0, Pin 3
Port 2, Pins 0,1,2,3,4
Data Strobe
In/Output
Output
Input
Input
Output
Output
Input
Output
Output
Output
Input
In/Output
In/Output
In/Output
PRELIMINARY
In/Output
In/Output
In/Output
Output
DS97Z8X0502
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
P20
P03
P13
P12
GND
GND
P02
P11
P10
P01
P00
1
6
1
40
39
7
44-Pin PLCC
17
29
28
18
P30
P36
P37
P35
RESET
R/RL
AS
P34
P33
P32
P31
P05
P06
P14
P15
P07
VCC
VCC
P16
P17
XTAL2
XTAL1
P21
P22
P23
P24
DS
NC
R/W
P25
P26
P27
P04
Figure 4. 44-Pin PLCC Pin Configuration
Standard Mode
Table 2. 44-Pin PLCC Pin Identification
Pin #
Symbol
Function
1–2
3–4
5
6–10
11
12
13
14–16
17–19
20–21
22
23–24
GND
P12–P13
P03
P20–P24
DS
NC
R/W
P25–P27
P04–P06
P14–P15
P07
VCC
Ground
Port 1, Pins 2,3
Port 0, Pin 3
Port 2, Pins 0,1,2,3,4
Data Strobe
No Connection
Read/Write
Port 2, Pins 5,6,7
Port 0, Pins 4,5,6
Port 1, Pins 4,5
Port 0, Pin 7
Power Supply
25–26
27
28
29–31
32
P16–P17
XTAL2
XTAL1
P31–P33
P34
Port 1, Pins 6,7
Crystal Oscillator
Crystal Oscillator
Port 3, Pins 1,2,3
Port 3, Pin 4
DS97Z8X0502
Direction
In/Output
In/Output
In/Output
Output
Output
In/Output
In/Output
In/Output
In/Output
Table 2. 44-Pin PLCC Pin Identification
Pin #
Symbol
Function
Direction
33
34
35
36
37
38
39
40–41
42–43
44
AS
R/RL
RESET
P35
P37
P36
P30
P00–P01
P10–P11
P02
Address Strobe
ROM/ROMless select
Reset
Port 3, Pin 5
Port 3, Pin 7
Port 3, Pin 6
Port 3, Pin 0
Port 0, Pins 0,1
Port 1, Pins 0,1
Port 0, Pin 2
Output
Input
Input
Output
Output
Output
Input
In/Output
In/Output
In/Output
In/Output
Output
Input
Input
Output
PRELIMINARY
5
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
P20
P03
P13
P12
GND
GND
P02
P11
P10
P01
P00
PIN IDENTIFICATION (Continued)
33
23
22
34
P21
P22
P23
P24
DS
NC
R/W
P25
P26
P27
P04
44-Pin
44-PinLQFP
QFP
12
11
44
P05
P06
P14
P15
P07
VCC
VCC
P16
P17
XTAL2
XTAL1
1
P30
P36
P37
P35
RESET
R/RL
AS
P34
P33
P32
P31
Figure 5.5.44-Pin
LQFP
Configuration
Figure
44-Pin
QFPPin
Pin
Configuration
Standard
ModeMode
Standard
Table
LQFP
Pin
Identification
Table3.3.44-Pin
44-Pin
QFP
Pin
Identification
Table
LQFP
PinPin
Identification
Table3.3.44-Pin
44-Pin
QFP
Identification
Pin #
Symbol
Function
Direction
Pin #
Symbol
Function
Direction
1–2
3–4
5
6–7
P05–P06
P14–P15
P07
VCC
Port 0, Pins 5,6
Port 1, Pins 4,5
Port 0, Pin 7
Power Supply
In/Output
In/Output
In/Output
P16–P17
XTAL2
XTAL1
P31–P33
P34
AS
R/RL
RESET
P35
P37
P36
P30
P00–P01
P10–P11
Port 1, Pins 6,7
Crystal Oscillator
Crystal Oscillator
Port 3, Pins 1,2,3
Port 3, Pin 4
Address Strobe
ROM/ROMless select
Reset
Port 3, Pin 5
Port 3, Pin 7
Port 3, Pin 6
Port 3, Pin 0
Port 0, Pin 0,1
Port 1, Pins 0,1
In/Output
Output
Input
Input
Output
Output
Input
Input
Output
Output
Output
Input
In/Output
In/Output
P02
GND
P12–P13
P03
P20–4
DS
NC
R/W
P25–P27
P04
Port 0, Pin 2
Ground
Port 1, Pins 2,3
Port 0, Pin 3
Port 2, Pins 0,1,2,3,4
Data Strobe
No Connection
Read/Write
Port 2, Pins 5,6,7
Port 0, Pin 4
In/Output
8–9
10
11
12–14
15
16
17
18
19
20
21
22
23–24
25–26
27
28–29
30–31
32
33–37
38
39
40
41–43
44
6
PRELIMINARY
In/Output
In/Output
In/Output
Output
Output
In/Output
In/Output
DS97Z8X0502
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
Table 4. 40-Pin DIP Package Pin Identification
EPROM Mode
NC
D5
D6
D7
A4
A5
A6
NC
NC
A7
VCC
NC
NC
NC
CE
OE
EPM
VPP
A8
NC
1
40
40-Pin DIP
20
21
NC
D4
D3
D2
D1
D0
A3
NC
NC
GND
A2
NC
NC
A1
A0
PGM
A10
A11
A9
NC
Figure 6. 40-Pin DIP Pin Configuration
EPROM Mode
DS97Z8X0502
Pin #
Symbol
Function
1
2–4
5–7
8–9
10
11
NC
D5–D7
A4–A6
NC
A7
VCC
No Connection
Data 5,6,7
Address 4,5,6
No Connection
Address 7
Power Supply
12–14
15
16
17
18
NC
CE
OE
EPM
VPP
No Connection
Chip Select
Output Enable
EPROM Prog. Mode
Prog. Voltage
19
20–21
22
23
24
25
26–27
28–29
30
31
32–33
34
35–39
40
A8
NC
A9
A11
A10
PGM
A0–A1
NC
A2
GND
NC
A3
D0–D4
NC
Address 8
No Connection
Address 9
Address 11
Address 10
Prog. Mode
Address 0,1
No Connection
Address 2
Ground
No Connection
Address 3
Data 0,1,2,3,4
No Connection
PRELIMINARY
1
Direction
In/Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
In/Output
7
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
D0
A3
NC
NC
GND
GND
A2
NC
NC
A1
A0
PIN IDENTIFICATION (Continued)
6
1
40
39
7
44-Pin PLCC
17
29
28
18
PGM
A10
A11
A9
NC
NC
NC
A8
VPP
EPM
OE
A5
A6
NC
NC
A7
VCC
VCC
NC
NC
NC
CE
D1
D2
D3
D4
NC
NC
NC
D5
D6
D7
A4
Figure 7. 44-Pin PLCC Pin Configuration
EPROM Programming Mode
Table 5. 44-Pin PLCC Pin Configuration
EPROM Programming Mode
Pin #
Symbol
Function
1–2
3–4
5
6–10
11–13
14–16
17–19
20–21
22
23–24
GND
NC
A3
D0–D4
NC
D5–D7
A4–A6
NC
A7
VCC
Ground
No Connection
Address 3
Data 0,1,2,3,4
No Connection
Data 5,6,7
Address 4,5,6
No Connection
Address 7
Power Supply
25–27
28
29
30
NC
CE
OE
EPM
No Connection
Chip Select
Output Enable
EPROM Prog.
Mode
8
Direction
Input
In/Output
In/Output
Input
Input
Table 5. 44-Pin PLCC Pin Configuration
EPROM Programming Mode
Pin #
Symbol
Function
Direction
31
VPP
Prog. Voltage
Input
32
33–35
36
37
38
39
40–41
42–43
44
A8
NC
A9
A11
A10
PGM
A0,A1
NC
A2
Address 8
No Connection
Address 9
Address 11
Address 10
Prog. Mode
Address 0,1
No Connection
Address 2
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
PRELIMINARY
DS97Z8X0502
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
D0
A3
NC
NC
GND
GND
A2
NC
NC
A1
A0
1
33
D1
D2
D3
D4
NC
NC
NC
D5
D6
D7
A4
23
22
34
44-Pin
LQFP
44 -Pin
QFP
12
11
44
A5
A6
NC
NC
NC
A7
VCC
VCC
NC
NC
CE
1
PGM
A10
A11
A9
NC
NC
NC
A8
VPP
EPM
OE
Figure
Figure8.8.44-Pin
44-PinLQFP
QFP Pin
Pin Configuration
Configuration
EPROM
Programming
Mode
EPROM Programming
Mode
Table
Pin Identification
Configuration
Table 6.
6. 44-Pin
44-PinLQFP
QFP Pin
EPROM
EPROMProgramming
ProgrammingMode
Mode
Table
Pin Identification
Configuration
Table 6.
6. 44-Pin
44-PinLQFP
QFP Pin
EPROM
Programming
EPROM ProgrammingMode
Mode
Pin #
Symbol
Function
Direction
Pin #
Symbol
Function
Direction
1–2
3–4
5
6–7
A5–A6
NC
A7
VCC
Address 5,6
No Connection
Address 7
Power Supply
Input
NC
CE
OE
EPM
14
VPP
No Connection
Chip Select
Output Enable
EPROM Prog.
Mode
Prog. Voltage
A0,A1
NC
A2
GND
NC
A3
D0–D4
NC
D5–D7
A4
Address 0,1
No Connection
Address 2
Ground
No Connection
Address 3
Data 0,1,2,3,4
No Connection
Data 5,6,7
Address 4
Input
8–10
11
12
13
23–24
25–26
27
28–29
30–31
32
33–37
38–40
41–43
44
15
16–18
19
20
21
22
A8
NC
A9
A11
A10
PGM
Address 8
No Connection
Address 9
Address 11
Address 10
Prog. Mode
DS97Z8X0502
Input
Input
Input
Input
Input
Input
Input
In/Output
In/Output
Input
Input
Input
Input
Input
Input
PRELIMINARY
9
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
PIN IDENTIFICATION (Continued)
P25
P26
P27
P04
P05
P06
P07
VCC
XTAL2
XTAL1
P31
P32
P33
P34
1
28
28-Pin DIP
14
15
P24
P23
P22
P21
P20
P03
VSS
P02
P01
P00
P30
P36
P37
P35
D5
D6
D7
A4
A5
A6
A7
VCC
NC
CE
OE
EPM
VPP
A8
Figure 9. Standard Mode
28-Pin DIP/SOIC Pin Configuration
1
28
28-Pin DIP
14
15
D4
D3
D2
D1
D0
A3
VSS
A2
A1
A0
PGM
A10
A11
A9
Figure 10. EPROM Programming Mode
28-Pin DIP/SOIC Pin Configuration
Table 7. 28-Pin DIP/SOIC/PLCC
Pin Identification*
Function
Direction
1–3
4–7
8
P25–P27
P04–P07
VCC
Port 2, Pins 5,6,
In/Output
Port 0, Pins 4,5,6,7 In/Output
Power Supply
9
10
11–13
14–15
16
17
18
19–21
22
XTAL2
XTAL1
P31–P33
P34–P35
P37
P36
P30
P00–P02
VSS
Crystal Oscillator
Crystal Oscillator
Port 3, Pins 1,2,3
Port 3, Pins 4,5
Port 3, Pin 7
Port 3, Pin 6
Port 3, Pin 0
Port 0, Pins 0,1,2
Ground
Output
Input
Input
Output
Output
Output
Input
In/Output
23
24–28
P03
P20–P24
Port 0, Pin 3
Port 2, Pins
0,1,2,3,4
In/Output
In/Output
P04
P27
P26
P25
P24
P23
P22
Symbol
4
XXX
P05
P06
XXX
P07
XXX
VCC
XXX
XXX
XT2
XXX
XT1
XXX
P31
1
5
26
25
28-Pin PLCC
11
12
19
18
P21
XXX
XXX
P20
XXX
P03
XXX
V
SS
XXX
P02
XXX
P01
XXX
P00
P32
P33
P34
P35
P37
P36
P30
Pin #
Figure 11. Standard Mode
28-Pin PLCC Pin Configuration
10
PRELIMINARY
DS97Z8X0502
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
A4
D7
D6
D5
D4
D3
D2
Table 8. 28-Pin EPROM
Pin Identification
4
1
5
26
25
28-Pin PLCC
19
18
D1
XXX
XXX
D0
XXX
A3
XXX
V
SS
XXX
A2
XXX
A1
XXX
A0
A8
A9
A11
A10
PGM
11
12
EPM
VPP
XXX
A5
XXX
A6
XXX
A7
VCC
XXX
XXX
NC
XXX
CE
XXX
OE
Figure 12. EPROM Programming Mode
28-Pin PLCC Pin Configuration
DS97Z8X0502
Pin #
Symbol
Function
Direction
1–3
4–7
8
D5–D7
A4–A7
VCC
Data 5,6,7
Address 4,5,6,7
Power Supply
In/Output
Input
9
10
11
12
NC
CE
OE
EPM
13
VPP
No connection
Chip Select
Output Enable
EPROM Prog.
Mode
Prog. Voltage
14–15
16
17
18
19–21
22
A8–A9
A11
A10
PGM
A0–A2
VSS
Address 8,9
Address 11
Address 10
Prog. Mode
Address 0,1,2
Ground
Input
Input
Input
Input
Input
23
24–28
A3
D0–D4
Address 3
Data 0,1,2,3,4
Input
In/Output
PRELIMINARY
1
Input
Input
Input
Input
11
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
ABSOLUTE MAXIMUM RATINGS
Parameter
Min
Max
Units
Ambient Temperature under Bias
Storage Temperature
Voltage on any Pin with Respect to VSS [Note 1]
–40
–65
–0.6
+105
+150
+7
C
C
V
Voltage on VDD Pin with Respect to VSS
–0.3
+7
V
Voltage on XTAL1 and RESET Pins with Respect to VSS [Note 2]
–0.6
VDD+1
V
Total Power Dissipation
Maximum Allowable Current out of VSS
1.21
220
W
mA
Maximum Allowable Current into VDD
180
mA
+600
+600
25
25
3 mA
µA
µA
mA
mA
Maximum Allowable Current into an Input Pin [Note 3]
Maximum Allowable Current into an Open-Drain Pin [Note 4]
Maximum Allowable Output Current Sinked by Any I/O Pin
Maximum Allowable Output Current Sourced by Any I/O Pin
Maximum Allowable Output Current Sinked by RESET Pin
–600
–600
Notes:
1. This applies to all pins except XTAL pins and where otherwise noted.
2. There is no input protection diode from pin to VDD.
3. This excludes XTAL pins.
4. Device pin is not at an output Low state.
Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at any condition above those indicated in the operational sections of these specifications is not implied. Exposure to absolute maximum rating conditions for an extended period may affect device reliability.
Total power dissipation should not exceed 1.2 W for the
package. Power dissipation is calculated as follows:
Total Power Dissipation = VDD x [ IDD – (sum of IOH) ]
+ sum of [ (VDD – VOH) x IOH ]
+ sum of (V0L x I0L)
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to
Ground. Positive current flows into the referenced pin
(Test Load).
From Output
Under Test
150 pF
Figure 13. Test Load Diagram
12
PRELIMINARY
DS97Z8X0502
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
CAPACITANCE
TA = 25°C, VCC = GND = 0V, f = 1.0 MHz; unmeasured pins returned to GND.
Parameter
Min
Max
0
0
0
12 pF
12 pF
12 pF
Input capacitance
Output capacitance
I/O capacitance
1
DC ELECTRICAL CHARACTERISTICS
TA= 0 °C to +70 °C
Sym
Parameter
VCC
Note [3]
Min
Max
Typical
@ 25°C
Units
Conditions
Notes
VCH
Clock Input High Voltage
3.5V
5.5V
0.7 VCC
0.7 VCC
VCC+0.3
VCC+0.3
1.8
2.5
V
V
Driven by External
Clock Generator
VCL
Clock Input Low Voltage
3.5V
4.5V
GND -0.3
GND -0.3
0.2 VCC
0.2 VCC
0.9
1.5
V
V
Driven by External
Clock Generator
VIH
Input High Voltage
3.5V
5.5V
0.7 VCC
0.7 VCC
VCC+0.3
VCC+0.3
2.5
2.5
V
V
VIL
Input Low Voltage
3.5V
5.5V
GND -0.3
GND -0.3
0.2 VCC
0.2 VCC
1.5
1.5
V
V
VOH
Output High Voltage
Low EMI Mode
3.5V
5.5V
VCC -0.4
VCC -0.4
3.3
4.8
V
V
IOH = – 0.5 mA
VOH1
Output High Voltage
3.5V
5.5V
VCC -0.4
VCC -0.4
3.3
4.8
V
V
IOH = -2.0 mA
IOH = -2.0 mA
VOL
Output Low Voltage
Low EMI Mode
3.5V
4.5V
0.4
0.4
0.2
0.2
V
V
IOL = 1.0 mA
IOL = 1.0 mA
VOL1
Output Low Voltage
3.5V
4.5V
0.4
0.4
0.1
0.1
V
V
IOL = + 4.0 mA
IOL = + 4.0 mA
8
8
VOL2
Output Low Voltage
3.5V
4.5V
1.2
1.2
0.5
0.5
V
V
IOL = + 12 mA
IOL = + 12 mA
8
8
VRH
Reset Input High
Voltage
3.5V
5.5V
.8 VCC
.8 VCC
VCC
VCC
1.7
2.1
V
V
VRL
Reset Input Low Voltage
3.5V
5.5V
GND -0.3
GND -0.3
0.2 VCC
0.2 VCC
1.3
1.7
V
V
VOLR
Reset Output Low
Voltage
3.5V
5.5V
0.6
0.6
0.3
0.2
V
V
VOFFSET
Comparator Input
Offset Voltage
Input Common Mode
Voltage Range
3.5V
4.5V
3.5V
5.5V
10
10
0
0
25
25
VCC -1.0V
VCC -1.0V
mV
mV
V
V
IIL
Input Leakage
3.5V
4.5V
-1
-1
2
2
0.032
0.032
µA
µA
VIN = 0V, VCC
VIN = 0V, VCC
IOL
Output Leakage
3.5V
4.5V
-1
-1
2
2
0.032
0.032
µA
µA
VIN = 0V, VCC
VIN = 0V, VCC
IIR
Reset Input Current
3.5V
4.5V
-20
-20
-130
-180
-65
-112
µA
µA
VICR
DS97Z8X0502
PRELIMINARY
13
IOL = 1.0 mA
IOL = 1.0 mA
10
10
13
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
DC ELECTRICAL CHARACTERISTICS (Continued)
TA= 0 °C to +70 °C
Sym
Parameter
ICC
Supply Current
ICC1
Standby Current
Halt Mode
VCC
Note [3]
Max
Typical
@ 25°C
Units
3.5V
5.5V
3.5V
5.5V
20
25
8
8
7
20
3.7
3.7
mA
mA
mA
mA
7.0
7.0
10
10
800
800
2.9
2.9
2
3
600
600
mA
mA
µA
µA
µA
µA
Min
Conditions
@ 16 MHz
@ 16 MHz
VIN = 0V, VCC
@ 16 MHz
Clock Divide by
16 @ 16 MHz
VIN = 0V, VCC
VIN = 0V, VCC
VIN = 0V, VCC
VIN = 0V, VCC
Notes
4,5
4,5
4,5
4,5
ICC2
Standby Current
Stop Mode
3.5V
5.5V
3.5V
5.5V
3.5V
5.5V
IALL
Auto Latch
Low Current
3.5V
5.5V
0.7
1.4
8
15
2.4
4.7
µA
µA
0V
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