Z86E72/73
OTP Microcontroller
Product Specification
PS008704-0507
Copyright © 2007 by ZiLOG, Inc. All rights reserved.
www.zilog.com
Z86E72/73
OTP Microcontroller
ii
Warning:
DO NOT USE IN LIFE SUPPORT
LIFE SUPPORT POLICY
ZiLOG'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE
SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF
THE PRESIDENT AND GENERAL COUNSEL OF ZiLOG CORPORATION.
As used herein
Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b)
support or sustain life and whose failure to perform when properly used in accordance with instructions for
use provided in the labeling can be reasonably expected to result in a significant injury to the user. A
critical component is any component in a life support device or system whose failure to perform can be
reasonably expected to cause the failure of the life support device or system or to affect its safety or
effectiveness.
Document Disclaimer
©2007 by ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices,
applications, or technology described is intended to suggest possible uses and may be superseded. ZiLOG,
INC. DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY
OF THE INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT.
Z i L O G A L S O D O E S N O T A S S U M E L I A B I L I T Y F O R I N T E L L E C T U A L P R O P E RT Y
INFRINGEMENT RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES, OR
TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. The information contained within this
document has been verified according to the general principles of electrical and mechanical engineering.
ZiLOG is the registered trademark of ZiLOG, Inc. All other product or service names are the property of
their respective owners.
PS008704-0507
Z86E72/73
OTP Microcontroller
iii
Table of Contents
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Standard Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
PS008704-0507
Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
/DS (Output, Active Low) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
/AS (Output, Active Low) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
XTAL1 Crystal 1 (Time-Based Input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
XTAL2 Crystal 2 (Time-Based Output) . . . . . . . . . . . . . . . . . . . . . . . . . . . .
R//W Read/Write (Output, Write Low) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
R//RL (Input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port 0 (P07–P00) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port 1 (P17–P10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port 2 (P27–P20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port 3 (P37–P31) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparator Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Comparator Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
/RESET (Input, Active Low) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
25
25
25
25
25
25
25
25
28
30
31
32
33
35
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Extended Data RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
External Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Expanded Register File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Register File . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stack . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Counter/Timer Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Counter/Timer Functional Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
36
36
36
37
37
38
39
42
43
43
53
62
64
Z86E72/73
OTP Microcontroller
iv
Power-On Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
HALT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
STOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Port Configuration Register (PCON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stop-Mode Recovery Register (SMR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stop-Mode Recovery Register 2 (SMR2) . . . . . . . . . . . . . . . . . . . . . . . . . .
Watch-Dog Timer Mode Register (WDTMR) . . . . . . . . . . . . . . . . . . . . . . . .
Low-Voltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Software-Selectable Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low-Voltage Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
65
66
66
66
67
71
72
74
75
75
EPROM Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Expanded Register File Control Registers (0D) . . . . . . . . . . . . . . . . . . . . . . . . 82
Expanded Register File Control Registers (0F) . . . . . . . . . . . . . . . . . . . . . . . . . 85
Z8 Standard Control Register Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Customer Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
PS008704-0507
Z86E72/73
OTP Microcontroller
1
Features
Table 1 lists some of the features of the Z86E72/73 microcontrollers.
Table 1. Z86E72/73 Features
Part
ROM (KB)
RAM* (Bytes)
I/O
Voltage Range
Z86E73
32
236
31
3.0 V to 5.5 V
Z86E72
16
748
31
3.0 V to 5.5 V
Note: *General-purpose
PS008704-0507
•
•
Low power consumption—60 mW (typical)
•
Special architecture to automate both generation and reception of complex pulses
or signals:
– One programmable 8-bit counter/timer with two capture registers
– One programmable 16-bit counter/timer with one capture register
– Programmable input glitch filter for pulse reception
•
Five priority interrupts
– Three external
– Two assigned to counter/timers
•
•
Two independent comparators with programmable interrupt polarity
•
Software-selectable 200±50% KΩ resistive transistor pull-ups on Port 0 and
Port 2
– Port 2 pull-ups are bit selectable
– Pull-ups automatically disabled as outputs
•
Software mouse/trackball interface on P00 through P03
Two standby modes (typical)
– STOP—2 μA
– HALT—0.8 mA
On-chip oscillator that accepts a crystal, ceramic resonator, LC, RC (mask
option), or external clock drive
Z86E72/73
OTP Microcontroller
2
General Description
The Z86E7X family are OTP-based members of the Z8® MCU single-chip family
with 236 or 748 bytes of general-purpose RAM. The only differentiating factor
between the E72/73 versions is the availability of RAM and ROM. This EPROM
microcontroller family of OTP controllers also offers the use of external memory,
which enables this Z8 microcontroller to be used where code flexibility is required.
ZiLOG's CMOS microcontrollers offer fast execution, efficient use of memory,
sophisticated interrupts, input/output bit manipulation capabilities, automated
pulse generation/reception, and easy hardware/software system expansion along
with cost-effective and low power consumption.
The Z86E7X architecture is based on ZiLOG's 8-bit microcontroller core with an
Expanded Register File to allow access to register-mapped peripherals, I/O circuits, and powerful counter/timer circuitry. The Z8 offers a flexible I/O scheme, an
efficient register and address space structure, and a number of ancillary features
that are useful in many consumer, automotive, computer peripheral, and batteryoperated hand-held applications.
Z8 applications demand powerful I/O capabilities. The Z86E7X family fulfills this
with three package options in which the E72/73 versions provide 31 pins of dedicated input and output. These lines are grouped into four ports. Each port consists
of eight lines (Port 3 has seven lines of I/O and one Pref comparator input) and is
configurable under software control to provide timing, status signals, parallel I/O
with or without handshake, and an address/data bus for interfacing external memory.
There are five basic address spaces available to support a wide range of
configurations: program memory, register file, Expanded Register File, Extended
Data RAM, and external memory. The register file is composed of 256 bytes of
RAM. It includes 4 I/O port registers, 16 control and status registers, and the rest
are general-purpose registers. The Extended Data RAM adds 512 (E72) of usable
general-purpose registers. The Expanded Register File consists of two additional
register groups (F and D).
To unburden the program from coping with such real-time problems as generating
complex waveforms or receiving and demodulating complex waveform/pulses, the
Z86E7X family offers a new intelligent counter/timer architecture with 8-bit and 16bit counter/timers (Figure 1). Also included are a large number of user-selectable
modes and two on-board comparators to process analog signals with separate
reference voltages (Figure 19 on page 34).
Note:
PS008704-0507
All signals with a preceding front slash, “/”, are active Low. For
example, B//W (WORD is active Low); /B/W (BYTE is active
Low, only).
Z86E72/73
OTP Microcontroller
3
HI 16
Lo 16
8
8
16-Bit
T16
1 2 4 8
Timer 16
16
8
SCLK
Clock
Divider
8
TC16L
TC16H
And/Or
Logic
HI8
LO8
8
Input
Edge
Detect
Circuit
Glitch
Filter
8
8-Bit
T8
Timer 8
8
8
TC8H
TC8L
Figure 1. Z86E7X Counter/Timer Block Diagram
Power connections follow the conventions listed in Table 2.
Table 2. Power Connections
Connection
Circuit
Device
Power
VCC
VDD
Ground
GND
VSS
Figure 2 displays the functional block diagram.
PS008704-0507
Timer 8/16
Z86E72/73
OTP Microcontroller
4
Extended Data RAM
512 x 8-Bit
E72 Only
Register File
256 x 8-Bit
P00
Port 0
Port 3
P34
P35
P36
Register Bus
Internal
Address Bus
P07
ROM
16K x 8
P31
P32
P33
Z8 Core
Two Analog
Comparators
Internal Data Bus
Interrupt Control
Extended
Register
File
I/O Bit
Programmable
P20
P21
P22
P23
P24
P25
P26
P27
Extended
Register Bus
Power
Port 2
Counter/Timer 8
8-Bit
Counter/Timer 16
16-Bit
Figure 2. Z86E7X Functional Block Diagram
PS008704-0507
Machine
Timing
&
Instruction
Control
XTAL2
XTAL1
VDD
VSS
Z86E72/73
OTP Microcontroller
5
Pin Description
Figure 3 shows the pin assignments for the standard mode of the 40-pin dual
in-line package (DIP). Figure 4 on page 6 shows the pin assignments for the
electronically programmable read-only memory (EPROM) mode of the 40-pin DIP.
R//W
P25
P26
P27
P04
P05
P06
P14
P15
P07
VDD
P16
P17
XTAL2
XTAL1
P31
P32
P33
P34
/AS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Z86E72/73
DIP
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
/DS
P24
P23
P22
P21
P20
P03
P13
P12
VSS
P02
P11
P10
P01
P00
Pref1
P36
P37
P35
/RESET
Figure 3. 40-Pin DIP Pin Assignments (Standard Mode)
PS008704-0507
Z86E72/73
OTP Microcontroller
6
NC
A13
A14
/PGM
A4
A5
A6
D4
D5
A7
VDD
D6
D7
NC
NC
/OE
EPM
VPP
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Z86E72/73
DIP
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
NC
A12
A11
A10
A9
A8
A3
D3
D2
VSS
A2
D1
D0
A1
A0
/CE
NC
NC
NC
NC
Figure 4. 40-Pin DIP Pin Assignments (EPROM Mode)
Figure 5 on page 7 shows the pin assignments for the standard mode of the
44-pin plastic leaded chip carrier (PLCC). Figure 6 on page 7 displays the pin
assignments for the EPROM mode of the 44-pin PLCC.
PS008704-0507
Z86E72/73
OTP Microcontroller
P20
P03
P13
P12
VSS
VSS
P02
P11
P10
P01
P00
7
6
7
8
9
10
11
12
13
14
15
16
17
18
4
42
1
Z86E72/73
PLCC
20
22
24
26
40
39
38
37
36
35
34
33
32
31
30
29
28
Pref1
P36
P37
P35
/RESET
VSS
/AS
P34
P33
P32
P31
P05
P06
P14
P15
P07
VDD
VDD
P16
P17
XTAL2
XTAL1
P21
P22
P23
P24
/DS
R//RL
R//W
P25
P26
P27
P04
A8
A3
D3
D2
VSS
VSS
A2
D1
D0
A1
A0
Figure 5. 44-Pin PLCC Pin Assignments (Standard Mode)
6
7
8
9
10
11
12
13
14
15
16
17
18
4
42
1
Z86E72/73
PLCC
20
22
24
26
40
39
38
37
36
35
34
33
32
31
30
29
28
/CE
NC
NC
NC
NC
VSS
NC
NC
VPP
EPM
/OE
A5
A6
D4
D5
A7
VDD
VDD
D6
D7
XTAL2
XTAL1
A9
A10
A11
A12
NC
NC
NC
A13
A14
/PGM
A4
Figure 6. 44-Pin PLCC Pin Assignments (EPROM Mode)
PS008704-0507
Z86E72/73
OTP Microcontroller
8
P20
P03
P13
P12
VSS
VSS
P02
P11
P10
P01
P00
Figure 7 displays the pin assignments for the standard mode of the
44-pin low-profile quad flat pack (LQFP). Figure 8 on page 9 shows the pin
assignments for the EPROM mode of the 44-pin LQFP.
33
34
35
36
37
38
39
40
41
42
43
44
1
29
2527 23
22
21
20
19
18
17
Z86E72/73
16
LQFP
15
14
13
12
11
3
7
5
9
31
Pref1
P36
P37
P35
/RESET
VSS
/AS
P34
P33
P32
P31
P05
P06
P14
P15
P07
VDD
VDD
P16
P17
XTAL2
XTAL1
P21
P22
P23
P24
/DS
R//RL
R//W
P25
P26
P27
P04
Figure 7. 44-Pin LQFP Pin Assignments (Standard Mode)
PS008704-0507
Z86E72/73
OTP Microcontroller
A8
A3
D3
D2
VSS
VSS
A2
D1
D0
A1
A0
9
33
34
35
36
37
38
39
40
41
42
43
44
1
31
292725
Z86E72/73
LQFP
3
579
23
22
21
20
19
18
17
16
15
14
13
12
11
/CE
N/C
N/C
N/C
N/C
VSS
N/C
N/C
VPP
EPM
/OE
A5
A6
D4
D5
A7
VDD
VDD
D6
D7
XTAL2
XTAL1
A9
A10
A11
A12
N/C
N/C
N/C
A13
A14
/PGM
A4
Figure 8. 44-Pin LQFP Pin Assignments (EPROM Mode)
Table 3 identifies the pins in packages in standard mode. Table 4 on page 11
identifies the pins in the 40-pin DIP in EPROM mode. Table 5 on page 12 identifies the pins in the 44-pin LQFP and PLCC.
Table 3. Pin Identification (Standard Mode)
40-Pin DIP # 44-Pin PLCC # 44-Pin LQFP # Symbol
Direction
Description
26
40
23
P00
Input/Output Port 0 is Nibble Programmable.
27
41
24
P01
Input/Output Port 0 can be configured as A15–
A8 external program
30
44
27
P02
Input/Output
34
5
32
P03
Input/Output ROM Address Bus.
5
17
44
P04
Input/Output Port 0 can be configured as a
6
18
1
P05
Input/Output mouse/trackball input.
7
19
2
P06
Input/Output
10
22
5
P07
Input/Output
28
42
25
P10
Input/Output Port 1 is byte programmable.
PS008704-0507
Z86E72/73
OTP Microcontroller
10
Table 3. Pin Identification (Standard Mode) (Continued)
40-Pin DIP # 44-Pin PLCC # 44-Pin LQFP # Symbol
Direction
Description
29
43
26
P11
Input/Output Port 1 can be configured as
multiplexed A7–A0/D7–D0
external program ROM
Address/Data Bus
32
3
30
P12
Input/Output
33
4
31
P13
Input/Output
8
20
3
P14
Input/Output .
9
21
4
P15
Input/Output
12
25
8
P16
Input/Output
13
26
9
P17
Input/Output
35
6
33
P20
Input/Output Port 2 pins are individually
configurable as input or output
36
7
34
P21
Input/Output
37
8
35
P22
Input/Output
38
9
36
P23
Input/Output
39
10
37
P24
Input/Output
2
14
41
P25
Input/Output
3
15
42
P26
Input/Output
4
16
43
P27
Input/Output
16
29
12
P31
Input
IRQ2/Modulator input
17
30
13
P32
Input
IRQ0
18
31
14
P33
Input
IRQ1
19
32
15
P34
Output
T8 output
22
36
19
P35
Output
T16 output
24
38
21
P36
Output
T8/T16 output
23
37
20
P37
Output
20
33
16
/AS
Output
Address Strobe
40
11
38
/DS
Output
Data Strobe
1
13
40
R//W
Output
Read/Write
21
35
18
/RESET
Input
Reset
15
28
11
XTAL1
Input
Crystal, Oscillator Clock
PS008704-0507
Z86E72/73
OTP Microcontroller
11
Table 3. Pin Identification (Standard Mode) (Continued)
40-Pin DIP # 44-Pin PLCC # 44-Pin LQFP # Symbol
Direction
Output
Description
14
27
10
XTAL2
Crystal, Oscillator Clock
11
23, 24
6, 7
VDD
Power Supply
31
1, 2, 34
17, 28, 29
VSS
Ground
25
39
22
Pref1
Input
Comparator 1 Reference
NC
12
39
R//RL
Input
ROM//ROMless
Table 4. Z86E72/73 40-Pin DIP Identification—EPROM Mode
PS008704-0507
40-Pin #
Symbol
Function
Direction
1
N/C
Not Connected
2–3
A13–14
Address 13, 14
Input
4
/PGM
Program Mode
Input
5–7
A4–A6
Address 4, 5, 6
Input
8–9
D4–D5
Data 4, 5
Input/Output
10
A7
Address 7
Input
11
VDD
Power Supply
12–13
D6–D7
Data 6, 7
14–15
N/C
Not Connected
16
/OE
Output Enable
Input
17
EPM
EPROM Prog. Mode
Input
18
VPP
Prog. Voltage
Input
19–24
N/C
Not Connected
25
/CE
Chip Enable
Input
26–27
A0–A1
Address 0, 1
Input
28–29
D0–D1
Data 0, 1
Input/Output
30
A2
Address 2
Input
31
VSS
Ground
32–33
D2–D3
Data 2, 3
Input/Output
Input/Output
Z86E72/73
OTP Microcontroller
12
Table 4. Z86E72/73 40-Pin DIP Identification—EPROM Mode (Continued)
40-Pin #
Symbol
Function
Direction
34
A3
Address 3
Input
35–39
A8–A12
Address 8, 9, 10, 11, 12
Input
40
N/C
Not Connected
Table 5. Z86E72/73 44-Pin LQFP/PLCC Pin Identification—EPROM Mode
PS008704-0507
44-Pin LQFP 44-Pin PLCC
Symbol
Function
Direction
1–2
18–19
A5–A6
Address 5, 6
Input
3–4
20–21
D4–D5
Data 4, 5
Input/Output
5
22
A7
Address 7
Input
6–7
23–24
VDD
Power Supply
8–9
25–26
D6–D7
Data 6, 7
10
27
XTAL2
Crystal Oscillator Clock
11
28
XTAL1
Crystal Oscillator Clock
12
29
/OE
Output Enable
Input
13
30
EPM
EPROM Prog. Mode
Input
14
31
VPP
Prog. Voltage
Input
15–16
32–33
N/C
Not Connected
17
34
VSS
Ground
18–21
35–38
N/C
Not Connected
22
39
/CE
Chip Select
Input
23–24
40–41
A0–A1
Address 0, 1
Input
25–26
42–43
D0–D1
Data 0, 1
Input/Output
27
44
A2
Address 2
Input
28–29
1–2
VSS
Ground
30–31
3–4
D2–D3
Data 2, 3
Input/Output
32
5
A3
Address 3
Input
33–37
6–10
A8–A12
Address 8, 9, 10, 11, 12
Input
38–40
11–13
N/C
Not Connected
Input/Output
Z86E72/73
OTP Microcontroller
13
Table 5. Z86E72/73 44-Pin LQFP/PLCC Pin Identification—EPROM Mode
44-Pin LQFP 44-Pin PLCC
Symbol
Function
Direction
41–42
14–15
A13–A14
Address 13, 14
Input
43
16
/PGM
Prog. Mode
Input
44
17
A4
Address 4
Input
Absolute Maximum Ratings
Table 6 lists the absolute maximum ratings for the Z86E72/73 microcontrollers.
Table 6. Absolute Maximum Ratings
Symbol
Description
Min
Max
Units
VMAX
Supply Voltage (*)
–0.3
+7.0
TSTG
Storage Temperature
–65°
+150° C
TA
Oper. Ambient Temperature
†
V
C
Notes:
* Voltage on all pins with respect to GND.
† See “Ordering Information” on page 97.
Stresses greater than those listed under Absolute Maximum Ratings might cause
permanent damage to the device. This rating is a stress rating only. Operation of
the device at any condition above those indicated in the operational sections of
these specifications is not implied. Exposure to absolute maximum rating conditions for an extended period might affect device reliability.
PS008704-0507
Z86E72/73
OTP Microcontroller
14
Standard Test Conditions
The characteristics listed below apply for standard test conditions as noted. All
voltages are referenced to GND. Positive current flows into the referenced pin
(see Figure 9).
From Output
Under Test
I
Figure 9. Test Load Diagram
Capacitance
Table 7 lists the capacitances for the Z86E72/73 microcontrollers.
Table 7. Capacitance
Parameter
Max
Input capacitance
12 pF
Output capacitance
12 pF
I/O capacitance
12 pF
Note: TA = 25 °C, VCC = GND = 0 V, f = 1.0 MHz, unmeasured pins returned to GND.
PS008704-0507
Z86E72/73
OTP Microcontroller
15
DC Characteristics
Table 8 lists the direct current (DC) characteristics.
Table 8. DC Characteristics
TA = 0 °C to +70 °C
Sym.
Parameter
VCC
Min
Max
Typical
@ 25°C
Units
Conditions
7
7
V
V
IIN 250 μA
IIN 250 μA
0.9 VCC
0.9 VCC
VCC + 0.3
VCC + 0.3
V
V
Driven by External
Clock Generator
3.0 V
5.5 V
VSS –0.3
VSS –0.3
0.2 VCC
0.2 VCC
V
V
Driven by External
Clock Generator
Input High Voltage
3.0 V
5.5 V
0.7 VCC
0.7 VCC
VCC + 0.3
VCC + 0.3
0.5 VCC
0.5 VCC
V
V
VIL
Input Low Voltage
3.0 V
5.5 V
VSS –0.3
VSS –0.3
0.2 VCC
0.2 VCC
0.5 VCC
0.5 VCC
V
V
VOH1
Output High Voltage
3.0 V
5.5 V
VCC –0.4
VCC –0.4
2.9
5.4
V
V
IOH = –0.5 mA
IOH = –0.5 mA
VOH2
Output High Voltage 3.0 V
(P00, P01, P36, P37) 5.5 V
VCC 0.7
VCC 0.7
V
V
IOH = –7 mA
IOH = –7 mA
VOL1
Output Low Voltage
3.0 V
5.5V
0.4
0.4
0.1
0.2
V
V
IOL = 1.0 mA
IOL = 4.0 mA
VOL2*
Output Low Voltage
3.0 V
5.5 V
0.8
0.8
0.5
0.3
V
V
IOL = 5.0 mA
IOL = 7.0 mA
VOL2
Output Low Voltage 3.0 V
(P00, P01, P36, P37) 5.5 V
0.8
0.8
0.3
0.2
V
V
IOL = 10 mA
IOL = 10 mA
VRH
Reset Input
High Voltage
3.0 V
5.5 V
0.8 VCC
0.8 VCC
VCC
VCC
1.5
2.5
V
V
VRl
Reset Input
Low Voltage
3.0 V
5.5 V
VSS –0.3
VSS –0.3
0.2 VCC
0.2 VCC
0.9
1.8
25
25
10
10
mV
mV
Max Input Voltage
3.0 V
5.5 V
VCH
Clock Input
High Voltage
3.0 V
5.5 V
VCL
Clock Input
Low Voltage
VIH
VOFFSET Comparator Input
Offset Voltage
3.0 V
5.5 V
IIL
Input Leakage
3.0 V
5.5 V
–1
–1
1
1
C
011 = A>C>B
100 = B>C>A
101 = C>B>A
110 = B>A>C
111 = Reserved
IRQ1, IRQ, Priority (Group C)
0 = IRQ1>IRQ4
1 = IRQ4>IRQ1
IRQ0, IRQ2, Priority (Group B)
0 = IRQ2>IRQ0
1 = IRQ0>IRQ2
IRQ3, IRQ5, Priority (Group A)
0 = IRQ5>IRQ3
1 = IRQ3>IRQ5
Reserved (must be 0)
PS008704-0507
Z86E72/73
OTP Microcontroller
91
Figure 60. Interrupt Priority Registers—(0) F9H: Write Only
R250 IRQ
D7 D6 D5 D4 D3 D2 D1 D0
IRQ0 = P32 Input
IRQ1 = P33 Input
IRQ2 = P31 Input
IRQ3 = T16
IRQ4 = T8
Reserved (must be 0)
Default setting after reset = 0000 0000
Inner Edge
P31 ↓ P32 ↓ = 00
P31 ↓ P32 ↑ = 01
P31 ↑ P32 ↓ = 10
P31 ↑↓ P32 ↑↓ = 11
Figure 61. Interrupt Request Register—(0) FAH: Read/Write
R251 IMR
D7 D6 D5 D4 D3 D2 D1 D0
1 Enables IRQ4–IRQ0
(D0 = IRQ0)
Reserved (must be 0)
Reserved (must be 0)
0 Master Interrupt Disable*
1 Master Interrupt Enable
* Default setting after reset
Figure 62. Interrupt Mask Register—(0) FBH: Read/Write
PS008704-0507
Z86E72/73
OTP Microcontroller
92
R252 Flags
D7 D6 D5 D4 D3 D2 D1 D0
User Flag F1
User Flag F2
Half Carry Flag
Decimal Adjust Flag
Overflow Tag
Sign Flag
Zero Flag
Figure 63. Flag Register—(0) FCH: Read/Write
R253 RP
D7 D6 D5 D4 D3 D2 D1 D0
Default Setting After
Reset = 0000
Expanded Register (Bank)
Pointer
Working Register
Pointer
Figure 64. Register Pointer—(0) FDH: Read/Write
R254 SPH
D7 D6 D5 D4 D3 D2 D1 D0
Stack Pointer Upper
Byte (SP15–SP8)
Figure 65. Stack Pointer High—(0) FEH: Read/Write
R255 SPL
D7 D6 D5 D4 D3 D2 D1 D0
Stack Pointer Lower
Byte (SP7–SP0)
PS008704-0507
Z86E72/73
OTP Microcontroller
93
Figure 66. Stack Pointer Low—(0) FFH: Read/Write
PS008704-0507
Z86E72/73
OTP Microcontroller
94
Package Information
The Z86E72/73 is available in 40-pin DIP (Figure 67), 44-pin LQFP (Figure 68 on
page 95), and 44-pin PLCC (Figure 69 on page 96) packages.
Figure 67. 40-Pin DIP Package Diagram
PS008704-0507
Z86E72/73
OTP Microcontroller
95
HD
A
D
A2
A1
E
HE
DETAIL A
LE
c
e
b
L
0-7°
Figure 68. 44-Pin LQFP Package Diagram
PS008704-0507
Z86E72/73
OTP Microcontroller
96
Figure 69. 44-Pin PLCC Package Diagram
PS008704-0507
Z86E72/73
OTP Microcontroller
97
Ordering Information
Table 33 lists the ordering codes for the 16-MHz Z86E72/73.
Table 33. Ordering Codes
40-Pin DIP
44-Pin PLCC
44-Pin LQFP
Z86E7216PSC
Z86E7216VSC
Z86E7216ASC
Z86E7316PSC
Z86E7316VSC
Z86E7316ASC
Figure 70 shows an example of what the ordering codes represent.
Example:
Z
86E73 16 P
S
C
is a Z86E73, 16 MHz, DIP, 0 °C to +70 °C, Plastic Standard
Environmental Flow
Temperature
Package
Speed
Product Number
ZiLOG Prefix
Figure 70. Ordering Codes Example
For fast results, contact your local ZiLOG sales office for assistance in ordering
the part wanted.
Package
P = Plastic DIP
A = Low-profile Quad Flat Pack
V = Plastic Chip Carrier
Temperature
S = 0 °C to +70 °C
Speed
16 = 16 MHz
Environmental
C = Plastic Standard
PS008704-0507
Z86E72/73
OTP Microcontroller
98
Customer Support
For answers to technical questions about the product, documentation, or any
other issues with ZiLOG’s offerings, please visit ZiLOG’s Knowledge Base at
http://www.zilog.com/kb.
For any comments, detail technical questions, or reporting problems, please visit
ZiLOG’s Technical Support at http://support.zilog.com.
PS008704-0507