TSD18N20M

TSD18N20M TSD18N20M 200V N-Channel MOSFET General Description Features This Power MOSFET is produced using Truesemi‘s advanced planar stripe DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, active power factor correction based on half bridge topology. Absolute Maximum Ratings Symbol • 18A,200V,Max.RDS(on)=0.17 Ω @ VGS =10V • Low gate charge(typical 22nC) • High ruggedness • Fast switching • 100% avalanche tested • Improved dv/dt capability TC=25℃ unless otherwise specified Parameter Value Units VDSS Drain-Source Voltage 200 V VGS Gate-Source Voltage ± 30 V TC = 25℃ 18* A TC = 100℃ 11.3* A ID Drain Current IDM Pulsed Drain Current (Note 1) 72* A IAS Single Pulsed Avalanche Current (Note 2) 18 A EAS Single Pulsed Avalanche Energy (Note 2) 453 Mj EAR Repetitive Avalanche Energy (Note 1) 13.9 mJ IAR Repetitive Avalanche current (Note 1) 18 A PD Power Dissipation (TC = 25℃) 70 W -55 to +150 ℃ TJ, TSTG Operating and Storage Temperature Range Thermal Resistance Characteristics Symbol Parameter Typ Max Units RθJC Thermal Resistance,Junction-to-Case -- 1.79 ℃/W RθJA Thermal Resistance,Junction-to-Ambient -- 50 ℃/W * Drain current limited by maximum junction temperature. © 2015 Truesemi Semiconductor Corporation Ver.B2 www.truesemi.com Symbol unless otherwise specified Parameter Test Conditions Min Typ Max Units Gate Threshold Voltage VDS = VGS, ID = 250 uA㎂ 2.0 -- 4.0 V Static Drain-Source On-Resistance VGS = 10 V, ID =9A -- 0.14 0.17 Ω Forward transfer conductance(note 3) VDS = 10V, ID = 9A㎂ -- 10.5 -- S 200 -- -- V VDS = 200 V, VGS = 0 V -- -- 1 uA VDS = 160 V, Tc =125℃ -- -- 100 uA On Characteristics VGS(th) RDS(ON) gfs Off Characteristics BVDSS Drain-Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current IGSSF Gate-Body Leakage Current,Forward VGS = 30 V, VDS = 0 V -- -- 100 nA㎁ IGSSR Gate-Body Leakage Current,Reverse VGS =- 30 V, VDS = 0 V -- -- -100 nA㎁ -- 942 1240 pF㎊ -- 227 310 pF㎊ -- 55 71 pF -- 15 -- ns -- 130 -- ns㎱ -- 135 -- ns㎱ -- 105 -- ns㎱ -- 22 28 nC -- 6.6 -- nC -- 7.2 -- nC -- -- 18 VGS = 0 V, ID = 250 uA㎂ Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd VDS =125 V, ID =18A, RG = 25 Ω (Note 3,4) VDS =160 V, ID = 18A, VGS = 10 V (Note 3,4) Gate-Drain Charge Source-Drain Diode Maximum Ratings and Characteristics IS Continuous Source-Drain Diode Forward Current ISM Pulsed Source-Drain Diode Forward Current (Note 4) -- -- 72 VSD Source-Drain Diode Forward Voltage IS =18A, VGS = 0 V (Note 4) -- -- 1.4 trr Reverse Recovery Time -- 208 -- ns㎱ Qrr Reverse Recovery Charge IS =18A, VGS = 0 V diF/dt = 100 A/μs -- 1.63 -- uC A V NOTES: 1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. L=2.1mH, IAS=18A, VDD=50V, RG=25 Ω,Starting TJ=25 ℃ 3. Pulse Test: Pulse width ≤ 300us, Duty Cycle ≤ 2% 4. Essentially Independent of Operating Temperature Typical Characteristics © 2015 Truesemi Semiconductor Corporation Ver.B2 www.truesemi.com TSD18N20M Electrical Characteristics TC=25 ℃ © 2015 Truesemi Semiconductor Corporation TSD18N20M Typical Characteristics Ver.B2 www.truesemi.com TSD18N20M Typical Characteristics © 2015 Truesemi Semiconductor Corporation Ver.B2 www.truesemi.com TSD18N20M Fig 11. Gate Charge Test Circuit & Waveform 50KΩ 12V VGS Same Type as DUT Qg 200nF 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Fig 12. Resistive Switching Test Circuit & Waveforms RL VDS VDS 90% VDD RG ( 0.5 rated VDS ) Vin DUT 10V 10% td(on) tr td(off) t on tf t off Fig 13. Unclamped Inductive Switching Test Circuit & Waveforms L 1 EAS = ---- LL IAS2 2 VDS VDD ID BVDSS IAS RG ID (t) 10V DUT VDS (t) VDD tp © 2015 Truesemi Semiconductor Corporation Ver.B2 Time www.truesemi.com TSD18N20M Fig 14. Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ IS L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • IS controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current IS ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VDD Vf Body Diode Forward Voltage Drop © 2015 Truesemi Semiconductor Corporation Ver.B2 www.truesemi.com