SLD70R900S2

SLD70R900S2 / SLF70R900S2 SLD70R900S2 / SLF70R900S2 700V N-Channel Power MOSFET General Description Features This Power MOSFET is produced using Maple semi‘s advanced planar stripe DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, active power factor correction based on half bridge topology - 5A, 700V, RDS(on) typ. = 0.8Ω@VGS = 10 V - Extended Safe Operating Area - Ease of Paralleling - Fast Switching - 100% avalanche tested - 100% Single Pulse avalanche energy Test D D G G D-PAK G D S S TO-220F S Absolute Maximum Ratings Symbol VDSS ID Parameter SLF70R900S2 Drain-to-Source Breakdown Voltage Drain Current - Continuous (TC = 25℃) IDM VGS Drain Current - Continuous (TC = 100℃) Drain Current - Pulsed Gate-Source Voltage Ptot Power Dissipation (TC = 25℃) TJ, EAS Operating Junction Temperature Range Single Pulsed Avalanche Energy SLD70R900S2 V 5 A 3.2 18 A A V ±30 24 (Note 2) Units 700 58 W -55 to +150 180 ℃ mJ Electrical Characteristics @ TJ=25℃(unless otherwise specified) Symbol Test Conditions Min. Drain-source Voltage VGS =0V, ID=250µA 700 RDS(on) Static Drain-to-Source on-Resistance VGS =10V, ID=20A VGS(th) Gated Threshold Voltage VDS= VGS, ID=250µA VDS Parameter MAPLE SEMICONDUCTOR CO., LTD Typ. 2.0 http://www.Maplesemi.com Max. Unit V 0.8 0.9 Ω 3.0 4.0 V Rev.1.0 Oct. 2019 Zero Gate Voltage Drain Current VDS=100V, VGS = 0V 1.0 µA IGSS(F) Gated Body Leakage Current VGS = +30V, 100 nA IGSS(R) Gated Body Leakage Current VGS = -30V, -100 nA Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Qg Qgs Qgd td(on) tr td(off) tf Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-on Delay Time Turn-on Rise Time Turn-off Delay Time Turn-off Fall Time VGS =0V, VDS=25V, f=1.0MHZ VDS=560V ID=5A VGS=10V VDD=350V,ID=5A VGS=10V,RG=24Ω 360 pF 21 pF 1.9 pF 19.2 2.45 11.7 9.47 26.3 57.9 25.7 nC nC nC nS nS nS nS Source-Drain Diode Maximum Ratings and Characteristics Symbol Parameter Test Conditions Min. ISD S-D Current(Body Diode) ISDM Pulsed S-D Current(Body Diode) VSD Diode Forward Voltage VGS =0V, IDS=5A trr Reverse Recovery Time Qrr Reverse Recovery Charge TJ=25℃,IF=5A di/dt=100 A/us Typ. Max. Unit 5 A 18.0 A 1.4 V 305 nS 2.3 nC *Pulse Test: Pulse Width≤300µs, Duty Cycle≤2% Thermal Resistance Symbol Parameter RθJC RθJA Typ. Max. Units Junction-to-Case 5.21 ℃/W Junction-to-Ambient 62.5 ℃/W Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 79mH, IAS = 2.0A, VDD =100V, RG = 25Ω, Starting TJ = 25°C 3. ISD 5.0A, di/dt 100A/us, VDD BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width 300us, Duty cycle 2% 5. Essentially independent of operating temperature MAPLE SEMICONDUCTOR CO., LTD http://www.Maplesemi.com Rev.1.0 Oct. 2019 SLD70R900S2 / SLF70R900S2 IDSS SLD70R900S2 / SLF70R900S2 100 RDS(ON),(Normalized) 15V 6V 5.5V 10 5V 4.5V TC=25℃ impulse=250uS 0.1 1 10 100 Drain-Source On Resistance d 3.0 1 ID Drain-to-Source Current (A) Typical Characteristics 2.5 2.0 1.5 1.0 0.5 0.0 - 100 VDS Drain-to-Source Voltage(V) -50 0 50 100 150 200 T J , Junction Temperature [℃] Figure 1. Typical Output Characteristics Figure 2. Typical Output Characteristics 4000 C iss = C gs + C gd (C ds = shorted) 3500 3000 Note: VGS=0V, f=1Mhz 1500 CISS 1000 500 I D , Drain Current [ A] Capacitance [pF] 2000 CRSS 0.1 1 10 100 VDS Drain-to-Source Voltage (V) Figure 3. Typical Capacitance Vs Drain-Source Voltage MAPLE SEMICONDUCTOR CO., LTD -55℃ 25℃ 150℃ 10.0 COSS 2500 0 100 C oss = C ds + C gd C rss = C gd 1.0 Note: VDS=30V, impulse=250uS 0.1 2 4 6 8 10 V GS , Gate-Source Voltage [V] Figure 4. On-Resistance Vs Drain Current http://www.Maplesemi.com Rev.1.0 Oct. 2019 V GS , Gate-Source Voltage [V] Drain-Source On Resistance d RDS(ON),(Normalized) 12 Note: Tj=25℃ 900 VGS=10V 800 VGS=20V 700 0 1 2 3 4 5 6 VDS=140V 8 VDS=560V 6 4 2 0 0 5 10 15 20 QG Total Gate Charge (nC) ID Drain Current (A) Figure 5.RDS(ON) Vs Drain Current , Gate-Source Voltage Figure 6. Typical Gate Charge Vs Gate-Source Voltage 100 D , Drain Current [A] VDS=350V 10 100us 1.0ms 10 Operation in this area is limited by RDS(on) DC 10ms 1.0 Note: TC=25℃, TJ=150℃,Single pulse 0.1 1 10 100 1000 VDS Drain-to-Source Voltage(V) Figure 7. Maximum Safe Operating Area MAPLE SEMICONDUCTOR CO., LTD http://www.Maplesemi.com Rev.1.0 Oct. 2019 SLD70R900S2 / SLF70R900S2 1000 SLD70R900S2 / SLF70R900S2 RL Vout Vout 90% VDD Vin ( 0.5 rated VDS ) RG DUT Vin 10% 10V td(on) tr td(off) t on Figure 8 a. Switching Time Test Circuit VGS Same Type as DUT 50KΩ 200nF tf Figure 8 b. Switching Time Waveforms Current Regulator 12V t off Qg 10V 300nF VDS VGS Qgs Qgd DUT 3mA R1 R2 Charge Current Sampling (IG) Current Sampling (ID) Resistor Resistor Figure 9 a. Gate Charge Test Circuit Figure 9 b. Basic Gate Charge Waveforms LL EAS = VDS Vary tp to obtain required peak ID BVDSS -------------------BVDSS -- VDD BVDSS ID RG 1 ---- LL IAS2 2 IAS C ID (t) VDD DUT VDS (t) VDD 10V tp Figure 10 a. Unclamped Inductive Switching Test Circuit MAPLE SEMICONDUCTOR CO., LTD tp Time Figure 10 b.witching Test Waveforms http://www.Maplesemi.com Rev.1.0 Oct. 2019