210-161P

1300 Henley Court Pullman, WA 99163 509.334.6306 www.digilentinc.com FX2 MIB™ Reference Manual Revised January 14, 2009 This manual applies to the FX2 MIB rev. A Overview The Digilent FX2 Module Interface Board (MIB) offers a ready-made solution for interfacing peripheral modules to Digilent system boards. Features include: • • • • • FX2 peripheral board connector four 12-pin and two 6-pin Pmod connectors access to JTAG scan chain access to signals for test points provision for oscillator for clock input to system board The FX2 MIB. DOC#: 502-161 Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners. Page 1 of 5 FX2 MIB™ Reference Manual 1 Functional Description 1.1 Power Connections The FX2 MIB provides two power busses and a ground bus. The two power busses are labeled VCC and VCCFX2. These two busses are made available at each connector position on the board. There is also a ground plane that connects the ground pins from all connectors. The usual Digilent convention is to power the VCC bus at 3.3V and the VCCFX2 bus at 5.0V. However, depending on the system board connected and the power supply used, other voltages may be present. Use caution when using any voltage other than 3.3V on the VCC bus. Most Digilent system boards will be damaged if the voltage on the VCC bus is greater than 3.3V. FX2 connector J10 is provided on one side of the board for connection to Digilent system boards, like the Nexys2, that contain an FX2-style connector. The Digilent FX2 connector signal convention provides for forty generalpurpose I/O signals, three clock signals, JTAG signals, and power busses. The forty general-purpose I/O signals from the FX2 connector are brought out to connector J7. These signals are labeled IO1-IO40. See Table 1 for a description of the relationship between FX2 connector pins and signal names on J7. The remaining signals from the FX2 connector are brought out to connectors J8, J9, J11, and J12. See Table 1 for a description of the relationship between FX2 connector pins and connectors J8 and J9 signal names. In addition to the FX2 connector signals, connector J11 and J12 also provide access to the power and ground busses. FX2 Connector J7 Socket J11-12 J8 CLK Socket J5-6 J1-4 (2x6) Pmod Connectors J9 JTAG Socket (1x6) Pmod Connectors Figure 1. MIB block diagram. 1.2 Pmod Connectors Digilent Pmods provide various peripheral functions. These can be as simple as buttons or switches for inputs and LEDs for outputs, or as complex as graphical LCD display panels, accelerometers, and keypads. All Digilent Pmods use either a six-wire interface or a twelve-wire interface. The six-wire interface provides four I/O signals, power, and ground. The twelve-wire interface provides eight I/O signals, two powers, and two grounds. The signal definitions for the I/O signals as well as the voltage requirements for the power supply depend on the specific module. The FX2 MIB provides four twelve-pin and two six-pin Pmod connectors. The twelve-pin connector provides access such that the top set of four pins are the odd labeled signals while the bottom set are even labeled signals. See Table 2. Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners. Page 2 of 5 FX2 MIB™ Reference Manual The signals for Pmod connectors J1-J6 are brought out to connector J7. These signals are labeled IO1-IO40. Each Pmod connector has an associated power select jumper. The power select jumper for J1 is JP1, and so on. These jumpers are used to select one of the two power busses on the FX2 MIB to provide power to the power supply pin on a Pmod plugged into that connector position. Placing a shorting block in the 3V3 position provides VCC power to the Pmod. Placing a shorting block in the 5V0 position provides VCCFX2 power to the Pmod. Place a shorting block so that it hangs off of the center pin only to disconnect power to the Pmod. 1.3 FPGA Configuration The FX2 MIB provides JTAG access via unloaded jumper J9. Given that the jumper JP7 labeled JTSEL is shorted, this jumper allows a connected board to be programmed via a JTAG cable. See Table 1 for a description of the relationship between the FX2 connector pins and the connections on the JTAG jumper J9. 1.4 Clocks The FX2 MIB provides an oscillator clock input to a system board via socket connector IC1. This socket can be used to input a clock signal to a system board when an external oscillator is placed on it. It will then output a clock signal on the CLKIO pin of the FX2 connector. The unloaded jumper J8 provides access to all possible clock signals into and out of the FX2 MIB. This includes the signal CLKIO from the external oscillator socket connector as well as CLKIO and CLKOUT signals directly from the FX2 connector. See Table 1 for more details. A 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Pinout VCC VCC TMS JTSEL TDO IO1 IO2 IO3 IO4 IO5 IO6 IO7 IO8 IO9 IO10 IO11 IO12 IO13 IO14 IO15 IO16 B 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners. Pinout SHLD GND TDI TCK GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND Page 3 of 5 FX2 MIB™ Reference Manual 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 IO17 IO18 IO19 IO20 IO21 IO22 IO23 IO24 IO25 IO26 IO27 IO28 IO29 IO30 IO31 IO32 IO33 IO34 IO35 IO36 IO37 IO38 IO39 IO40 GND CLKOUT GND VU VU 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND CLKIN GND CLKIO VU SHLD Table 1. FX2 signals and connector pinout. 2 Pmod Connector Pin Layouts Pin 1 2 3 4 5 6 Pinout IO1 IO3 IO5 IO7 GND VDD Table 2-1. J1 top set of pins. Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners. Pin 7 8 9 10 11 12 Pinout IO2 IO4 IO6 IO8 GND VDD Table 2-2. J1 bottom set of pins. Page 4 of 5 FX2 MIB™ Reference Manual Pin 1 2 3 4 5 6 Pinout IO9 IO11 IO13 IO15 GND VDD Table 2-3. J2 top set of pins. Pin 1 2 3 4 5 6 Pinout IO17 IO19 IO21 IO23 GND VDD Table 2-5. J3 top set of pins. Pin 1 Pinout IO25 2 3 4 5 6 IO27 IO29 IO31 GND VDD Table 2-7. J4 top set of pins. Pin 1 2 3 4 5 6 Pinout IO33 IO34 IO35 IO36 GND VDD Table 2-9. J5 pins. Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners. Pin 7 8 9 10 11 12 Pinout IO10 IO12 IO14 IO16 GND VDD Table 2-4. J2 bottom set of pins. Pin 7 8 9 10 11 12 Pinout IO18 IO20 IO22 IO24 GND VDD Table 2-6. J3 bottom set of pins. Pin 7 8 9 10 11 12 Pinout IO26 IO28 IO30 IO32 GND VDD Table 2-8. J4 bottom set of pins. Pin 1 2 3 Pinout IO37 4 5 6 IO40 IO38 IO39 GND VDD Table 2-10. J6 pins. Page 5 of 5