Product
Document
Published by
ams OSRAM Group
AS5047U
14-Bit On-Axis Magnetic Rotary
Position Sensor with Up to 14-Bit
Binary Incremental Pulse Count
General Description
The AS5047U is a high-resolution rotary position sensor for fast
absolute angle measurement over a full 360-degree range. This
new position sensor is equipped with a revolutionary
integrated dynamic angle error compensation (DAEC™) with
almost 0 latency at higher rotational speed. For increased signal
quality at lower rotational speed, the dynamic filter system
(DFS™) reduces transition noise.
The robust design of the device suppresses the influence of any
homogenous external stray magnetic field. A standard 4-wire
SPI serial interface with a CRC protection allows a host
microcontroller to read 14-bit absolute angle position data
from the AS5047U and to program non-volatile settings without
a dedicated programmer.
Incremental movements are indicated on a set of ABI signals
with a maximum resolution of 16989 steps / 4096 pulses per
revolution.
Brushless DC (BLDC) motors are controlled through a standard
UVW commutation interface with a programmable number of
pole pairs from 1 to 7. The absolute angle position is also
provided as PWM-encoded output signal.
AS5047U are single die sensors and are available in a TSSOP14
Package.
Ordering Information and Content Guide appear at end of
datasheet.
Key Benefits & Features
The benefits and features of this device are listed below:
Figure 1:
Added Value of Using the AS5047U
Benefits
Features
• Easy to use – saving costs on DSP
• DAEC ™ Dynamic angle error compensation
• DFS ™ Dynamic filter system
• Higher durability and lower system costs (no
shield needed)
• Magnetic stray field immunity
• Versatile choice of the interface
• Independent output interfaces: SPI, ABI, UVW, PWM
ams Datasheet
[v1-01] 2020-Dec-16
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AS5047U − General Description
Applications
The AS5047U supports BLDC motor commutation for the most
challenging industrial applications such as:
• Factory automation
• Building automation
• Robotics
• PMSM (permanent magnet synchronous motor)
• Stepper motor closed loop
• Optical encoder replacement
Block Diagram
The functional blocks of the AS5047U are shown below:
Figure 2:
AS5047U Block Diagram
VDD3V3
Volatile
Memory
CSn
CLK
MISO
MOSI
SPI
OTP
VDD
LDO
P2ram_err
or
CRC
ABI
OffCompN
otFinished
Cordic
Overflow
14-Bit ADC
AFE
CORDIC
Adaptive
Filter
Interpolator
DAEC
UVW
14-Bit ADC
A
B
I/PWM
U
V
W/PWM
Hall sensor
array
AGC
Oscillator
WDTST
PWM
AGCwarning
AS5047U
GND
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AS5047U − Pin Assignment
Pin Assignment
Figure 3:
TSSOP-14 Pin Assignment
1
14
I/PWM
CLK
2
13
GND
MISO
3
12
VDD3V3
MOSI
4
11
VDD
TEST
5
10
U
B
6
9
V
A
7
8
W/PWM
AS547U
CSn
Figure 4:
AS5047U Pin Description
Pin Number
Pin Name
1
CSn
Digital input(1)
SPI chip select (active low)(2)
2
CLK
Digital input(1)
SPI clock(3)
3
MISO
Digital output
SPI master data input, slave output(4)
4
MOSI
Digital input(1)
SPI master data output, slave input(3)
5
TEST
6
B
Digital output
Incremental signal B(5)
7
A
Digital output
Incremental signal A(5)
8
W/PWM
Digital output
Commutation signal W or PWM-encoded output(5)
9
V
Digital output
Commutation signal V(5)
10
U
Digital output
Commutation signal U(5)
11
VDD
Power supply
5V power supply voltage for on-chip regulator
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[v1-01] 2020-Dec-16
Pin Type
Description
Test pin (connect to ground)
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AS5047U − Pin Assignment
Pin Number
Pin Name
Pin Type
Description
12
VDD3V3
Power supply
3.3V on-chip low-dropout (LDO) output. Requires an
external decoupling capacitor (1μF)
13
GND
Power supply
Ground
14
I/PWM
Digital output
Incremental signal I (index) or PWM(5)
Note(s):
1. Floating state of a digital input is not allowed.
2. If SPI is not used, a pull-up resistor on CSn is required.
3. If SPI is not used, a pull-down resistor on CLK and MOSI is required.
4. If SPI is not used, the pin MISO can be left open.
5. If ABI, UVW or PWM is not used, the pins can be left open.
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AS5047U − Absolute Maximum Ratings
Stresses beyond those listed under Absolute Maximum Ratings
Absolute Maximum Ratings
may cause permanent damage to the device. These are stress
ratings only. Functional operation of the device at these or any
other conditions beyond those indicated under Operational
Conditions is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device
reliability.
Figure 5:
Absolute Maximum Ratings
Symbol
Parameter
Min
Max
Units
Comments
Electrical Parameters
VDD5
DC Supply Voltage at VDD pin
-0.3
7.0
V
Not operational
VDD3
DC Supply Voltage at
VDD3V3 pin
-0.3
5.0
V
Not operational
VSS
DC Supply Voltage at GND
pin
-0.3
0.3
V
Vin
Input Pin Voltage
VDD+0.3
V
Iscr
Input Current
(latch-up immunity)
100
mA
-100
AEC-Q100-004
Total Power Dissipation
PT
Total Power Dissipation
(all supplies and outputs)
150
mW
Electrostatic Discharge
ESDHBM
Electrostatic Discharge HBM
±2
kV
AEC-Q100-002
Temperature Ranges and Storage Conditions
TAMB
Operating Temperature
Range
TaProg
-40
150
°C
Ambient temperature
Programming Temperature
5
45
°C
Programming @ room
temperature (25°C ± 20°C)
TSTRG
Storage Temperature Range
-55
150
°C
TBODY
Package Body Temperature
260
°C
RHNC
Relative Humidity
(non-condensing)
85
%
MSL
Moisture Sensitivity Level
ams Datasheet
[v1-01] 2020-Dec-16
5
3
IPC/JEDEC J-STD-020
Represents a maximum floor
lifetime of 168h
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AS5047U − Electrical Characteristics
Electrical Characteristics
All in this datasheet defined tolerances for external
components need to be assured over the whole operation
conditions range and also over lifetime.
Overall condition: T AMB= -40°C to 150°C components spec;
unless otherwise noted.
Figure 6:
Operational Conditions
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VDD5
Positive supply voltage
5.0V operation mode
4.5
5.0
5.5
V
Positive supply voltage
3.3V operation mode;
from -40°C to 150°C
(NOISESET bit has to
set)
3.0
3.3
3.6
V
Positive supply voltage
Supply voltage
required for
programming in 3.3V
operation
3.3
3.5
V
Regulated voltage
Voltage at VDD3V3
pin if VDD ≠ VDD3V3
3.2
3.6
V
16
mA
VDD3V3
VDD_Burn
VREG
IDD
Supply current
VIH
High-level input
voltage
VIL
Low-level input voltage
VOH
High-level output
voltage
VOL
Low-level output
voltage
C_L
3.4
0.7 × VDD
V
0.3 × VDD
VDD - 0.5
V
V
VSS + 0.4
V
50
pF
I_Out_5V
Output current 5 V
operation(1)
4
mA
I_Out_3V
Output current 3 V
operation(1)
2
mA
Note(s):
1. Only applicable for digital output pins I/PWM, A, B, U, V, W/PWM, MISO.
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[v1-01] 2020-Dec-16
AS5047U − Electrical Characteristics
Magnetic Characteristics
Figure 7:
Magnetic Characteristics
Symbol
Bz
Parameter
Orthogonal Magnetic
Field Strength
Conditions
Min
Required orthogonal component of
the magnetic field strength
measured at the die surface along a
circle of 1.1mm radius
35
Typ
Max
Unit
70
mT
Note(s):
1. All datasheet parameters are still valid as long as AGC (Automatic Gain Control) stays in range. To ensure a proper function of the
AGC regulation loop, readout of ERRFL register (0x0001) or AGC register (0x3FF9) is required. Sensor can work with lower magnetic
input field which influences spec parameters in terms of noise and accuracy. In case the sensor will be used in application with wider
z distance, please contact the support team for detailed information.
System Specifications
Figure 8:
System Specifications
Symbol
Parameter
RES
Core and resolution on
SPI
RES_ABI
Resolution of the ABI
interface
Conditions
Min
Typ
Max
14
Programmable with
register setting
(ABIRES)
25
Units
bit
4096
steps
INLOPT @ 25°C
Non-linearity, optimum
placement of the
magnet
±0.4
±0.8
degree
INLOPT+TEMP
Non-linearity, optimum
placement of magnet
and temperature -40°C
to 150°C
±0.6
±1
degree
INLDIS+TEMP
Non-linearity @
displacement of
magnet and
temperature -40°C to
150°C
Assuming N35H
Magnet
(D=8mm, H=3mm)
500μm displacement
in x and y
z-distance = 2000μm
±1.2
degree
RMS output noise
without filter (1 sigma)
on SPI, ABI, PWM and
UVW. Not tested,
guaranteed by design
Orthogonal
component for the
magnetic field within
the specified range
(Bz), NOISESET= 0
0.068
degree
ONL
ams Datasheet
[v1-01] 2020-Dec-16
0.034
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AS5047U − Electrical Characteristics
Symbol
Parameter
Conditions
ONH
RMS output noise
without filter (1 sigma)
on SPI, ABI, PWM and
UVW. Not tested,
guaranteed by design
Orthogonal
component for the
magnetic field within
the specified range
(Bz), NOISESET = 1
tdelay
System propagation
delay –core
Reading angle via SPI
Residual system
propagation delay after
dynamic angle error
correction
Typ
Max
Units
0.041
0.082
degree
90
110
μs
At ABI, UVW and SPI
-1.9
1.9
μs
trefresh
Refresh time of DAEC
output
Refresh time at
SPI(ANGLECOM), ABI,
UVW
202
247
ns
DAE1700
Dynamic angle error
At 1700 rpm constant
speed
0.02
degree
DAEmax
Dynamic angle error
At 28000 rpm
constant speed
0.32
degree
28000
rpm
tdelay_DAEC
MS
Maximum speed
Min
222
Reference magnet: N35H, 8mm diameter; 3mm thickness.
Magnet in the Bz range.
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AS5047U − Timing Characteristics
Timing Characteristics
Figure 9:
Timing Specifications
Symbol
tpon
Parameter
Power-on time
ams Datasheet
[v1-01] 2020-Dec-16
Conditions
Guaranteed by design. Time between
VDD > VDDmin and the first valid
outcome
Min
Typ
Max
Units
10
ms
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AS5047U − Detailed Description
Detailed Description
The AS5047U is a Hall-effect magnetic sensor using a CMOS
technology. The Hall sensors convert the magnetic field
component perpendicular to the surface of the chip into
voltage.
The signals from the Hall sensors are amplified and filtered by
the analog front-end (AFE) before being converted by the
analog-to-digital converter (ADC). The output of the ADC is
processed by the hardwired CORDIC (coordinate rotation
digital computer) block to compute the angle and magnitude
of the magnetic vector. The intensity of the magnetic field
(magnitude) used by the automatic gain control (AGC) to adjust
the amplification level for compensation of the temperature
and magnetic field variations.
The AS5047U generates continuously the angle information,
which can be requested by the different interfaces of the device.
The internal 14-bit resolution is available by readout register
via the SPI interface. The resolution on the ABI output can be
programmed for 10 to 14 bits.
The Dynamic Angle Error Compensation block corrects the
calculated angle regarding latency by using a linear prediction
calculation algorithm. At constant rotation speed the latency
time is internally compensated by the AS5047U, reducing the
dynamic angle error at the SPI, ABI and UVW outputs.
The adaptive filter block is implemented after the
compensation block and reduces the transition noise at low
rotation speed. The stable information is available on SPI, ABI
and UVW.
AS5047U allows selecting between a UVW output interface and
a PWM encoded interface on the W pin.
The non-volatile settings in the AS5047U is programmed
through the SPI interface without any dedicated programmer.
The AS5047U can support high-speed application up to
28krpm.
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AS5047U − Detailed Description
Power Management
The AS5047U can be either powered from a 5.0V supply using
the on-chip low-dropout regulator or from a 3.3V voltage
supply. The LDO regulator is not intended to power any other
loads, and it needs a 1μF capacitor to ground located close to
chip for decoupling as shown in Figure 11.
In 3.3.V operation, VDD and VREG shall connected together. In
this configuration, normal noise performance (ONL) is available
at reduced maximum temperature (125°C) by clearing
NOISESET to 0. When NOISESET is set to 1, the full temperature
range is available with reduced noise performance (ONH).
Figure 10:
Temperature Range and Output Noise Without Filtering in 3.3V and 5.0V Mode
VDD (V)
NOISESET
Temperature Range (°C)
RMS Output Noise (degree)
5.0
0
-40 to 150
0.068
3.3
0
-40 to 125
0.068
3.3
1
-40 to 150
0.082
Figure 11:
5.0V and 3.3V Power Supply Options
5.0V Operation
VDD
3.3 V Operation
VDD3V3
LDO
3.0 – 3.6V
VDD
VDD3V3
LDO
1uF
100nF
100nF
GND
GND
AS547U
ams Datasheet
[v1-01] 2020-Dec-16
AS547U
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AS5047U − Detailed Description
Dynamic Angle Error Compensation
The AS5047U uses 4 integrated Hall sensors which produce a
voltage proportional to the orthogonal component of the
magnetic field to the die. These voltage signals are amplified,
filtered, and converted into the digital domain to allow the
CORDIC digital block to calculate the angle of the magnetic
vector. The propagation of these signals through the analog
front-end and digital back-end generates a fixed delay between
the time of measurement and the availability of the measured
angle at the outputs. This latency generates a dynamic angle
error represented by the product of the angular speed (ω) and
the system propagation delay (t delay):
(EQ1)
DAE = ω x t delay
The dynamic angle compensation block calculates the current
magnet rotation speed (ω) and multiplies it with the system
propagation delay (t delay ) to determine the correction angle to
reduce this error. At constant speed, the residual system
propagation delay is t delay_DAEC.
The angle represented on the PWM interface is not
compensated by the Dynamic Angle Error Compensation
algorithm. It is also possible to disable the Dynamic Angle Error
Compensation with the DAECDIS setting. Disabling the
Dynamic Angle Error Compensation gives a noise benefit of
0.016 degree rms. This setting can be advantageous for low
speed (under 100 RPM) respectively static positioning
applications.
Adaptive Filter System
The AS5047U uses an implemented adaptive filter system,
which reduces the transition noise.
The filter works dynamically depending on acceleration
(positive and negative acceleration) of rotating system. It is able
to match the right filter coefficients automatically.
The filter coefficients (K value), which define also the limits in
which the filters is acting, can be set in the OTP (K_min= 0x00
and K_max=0x00 by default).In addition, there is the possibility
to turn off the filter in the OTP.
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AS5047U − Detailed Description
Noise rms [degree]
Figure 12:
Noise vs K Values
K_min
0
1
K_max
2
3
4
5
6
Filter coefficient (K values)
For detailed application information please refer to the
Application Note: AS5x47U_Adaptive_Filter.
Figure 13:
K Value Configuration
K_min [LSB]
Minimum K Value
K_max [LSB]
Maximum K Value
000
2
000
6
001
3
001
5
010
4
010
4
011
5
011
3
100
6
100
5
101
0
101
1
110
1
110
0
111
1
111
0
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[v1-01] 2020-Dec-16
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AS5047U − Detailed Description
Figure 14:
Adaptive Filter System Setting
Symbol
Parameter
Min
Typ
Max
Unit
Notes
48
3059
Hz
Depending on K setting
in the OTP
fcorner
Corner frequency
ONFdyn
Noise during rotation
0.019
0.086
°
RMS noise (depending
on the selected K
setting)
ONFstat
Noise when stand
still
0.011
0.084
°
Depending on K setting
in the OTP
Figure 15:
Corner Frequency vs Noise
K Value
fcorner
Filter corner
frequency [Hz]
ONFdyn
Noise during
rotation [degree]
ONFstat
Noise when stand still
[degree]
0
48
0.019
0.011
1
97
0.028
0.017
2
194
0.036
0.032
3
387
0.048
0.044
4
773
0.062
0.059
5
1548
0.077
0.077
6
3095
0.086
0.084
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[v1-01] 2020-Dec-16
AS5047U − Detailed Description
Speed Measurements
Rotation Speed Measurement
The AS5047U features an average angular velocity calculation
algorithm with 14-bit resolution. This angular velocity
information is available over SPI and can be used without
further averaging in the ECU.
Figure 16:
Angular Velocity Measurement Parameter
Symbol
Parameter
Min
Typ
Velocity signal
resolution
VRes
VRange
Measurement range
(default)
VSens
Velocity sensitivity
(default)
VError
Velocity total error
FCutoff
Cut off frequency
Max
14
bit
-28000
28000
24.141
16.9
Unit
68.4
Notes
Two's complement
value
rpm
º/s/bit
14-bit resolution
±5
%
Based on actual
rotation speed
231
Hz
Depending on K value
(see adaptive filter
system)
Figure 17:
Angular Velocity Measurement Filter Parameters
Filter Setting
Typ
K=0
5.8
K=1
6
K=2
8.4
K=3
19.8
K=4
51.8
K=5
121.9
K=6
244.9
ams Datasheet
[v1-01] 2020-Dec-16
Unit
Notes
°/s
RMS noise
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AS5047U − Detailed Description
SPI Interface (Slave)
The SPI interface shall connected to a host microcontroller
(master) to read or write the volatile memory as well as to
program the non-volatile OTP registers.
The AS5047U SPI only supports slave operation mode. It
communicates at clock rates up to 10 MHz.
The AS5047U SPI uses mode=1 (CPOL=0, CPHA=1) to exchange
data. As shown in Figure 18, a data transfer starts with the
falling edge of CSn (CLK is low). The AS5047U samples MOSI
data on the falling edge of CLK. SPI commands are executed at
the end of the frame (rising edge of CSn). The bit order is MSB
first.
A CRC is protecting the SPI Data.
SPI Timing
The AS5047U SPI timing is shown in Figure 18.
Figure 18:
SPI Timing Diagram
tCSn
CSn
(Input)
tclk
tL
tclkH
tclkL
tH
CLK
(Input)
tMISO
tOZ
MISO
(Output)
Data[23]
Data[22]
Data[0]
tOZ
tMOSI
MOSI
(Input)
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Data[23]
Data[22]
Data[0]
ams Datasheet
[v1-01] 2020-Dec-16
AS5047U − Detailed Description
Figure 19:
SPI Timing
Parameter
Description
Min
tL
Time between CSn falling edge and CLK rising edge
350(1)
ns
tclk
Serial clock period
100
ns
tclkL
Low period of serial clock
50
ns
tclkH
High period of serial clock
50
ns
Time between last falling edge of CLK and rising
edge of CSn
tclk/2
ns
tCSn
High time of SS/ between two transmissions
350(1)
ns
tMOSI
Data input valid to clock edge
20
ns
tMISO
CLK edge to data output valid
51
ns
Time between CSn rising edge and MISO HiZ
10
ns
tH
tOZ
Max
Units
Note(s):
1. Synchronization with the internal clock → 2 * tCLK_SYS + 10ns (tCLK_SYS is 9MHz typ).
ams Datasheet
[v1-01] 2020-Dec-16
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AS5047U − Detailed Description
SPI Transaction
AS5047U provides two different SPI transactions
• 16-bit SPI frame without CRC (for high throughput)
• 24-bit SPI frames with CRC
• 32-bit SPI frames with CRC. The 32-bit SPI frames includes
8-bit PAD word.
For high-throughput requirements, the AS5047U can handle
16-bit frames for read operations. This allows reading more than
400000 angle positions per second.
Figure 20:
16-Bit SPI Frame
CSn
15 14 13
MOSI
0
0
ADDR[13:0]
R
MSB
LSB
15 14 13
MISO
ER
0
RDATA[13:0]
MSB
LSB
Figure 21:
16-Bit Command Frame
Bit
Name
15
0
Do not Care
14
R
1: Read
13:0
ADDR[13:0]
Address
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Description
ams Datasheet
[v1-01] 2020-Dec-16
AS5047U − Detailed Description
Figure 22:
16-Bit Data Frame
Bit
Name
Description
15
Warning Bit
ER
14
Error Bit
13:0
DATA[13:0]
Data
24-Bit SPI frames and 32-Bit SPI frames have CRC for increased
reliability of communication over the SPI. A wrong setting of
the calculation / setting of the CRC causes a CRC error, which
sets the CRCERR bit in the error flag register.
Figure 23:
24-Bit SPI Frame
CSn
23
MOSI
21
0
8 7
ADDR[13:0]
0 RW
CRC-8
MSB
LSB
23 22 21
MISO
8 7
ER
RDATA[13:0]
0
CRC-8
MSB
LSB
Figure 24:
24-Bit Command Frame
Bit
Name
23
0
22
RW
0: Write
1: Read
21:8
ADDR[13:0]
Address
7:0
CRC
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[v1-01] 2020-Dec-16
Description
Do not Care
Calculated CRC
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AS5047U − Detailed Description
Figure 25:
24-Bit Data Frame
Bit
Name
Description
23
Warning Bit
ER
22
Error Bit
21:8
DATA[13:0]
7:0
CRC
Data
Calculated CRC
The 32-Bit Frames have a PAD Word, which is applicable for
operation in daisy chain mode.
Figure 26:
32-Bit SPI Frame
CSn
31
MOSI
23 22 21
PAD[n-1:0]
0
8 7
ADDR[13:0]
0 RW
CRC-8
MSB
LSB
31 30 29
MISO
8 7
16 15
ER
RDATA[13:0]
CRC-8
0
PAD[n-1:0]
MSB
LSB
Figure 27:
32-Bit Command Frame
Bit
Name
31:24
PAD
PAD Number
23
0
Do Not care
22
RW
0: Write
1: Read
21:8
ADDR[13:0]
Address
7:0
CRC
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Description
Calculated CRC
ams Datasheet
[v1-01] 2020-Dec-16
AS5047U − Detailed Description
Figure 28:
32-Bit Data Frame
Bit
Name
31
Description
Warning Bit
ER
30
Error Bit
29:16
RW
15:8
ADDR[13:0]
7:0
CRC
Data
Calculated CRC
PAD Number
The data sent on the MISO pin. The CRC is calculated by the
AS5047U. If an error or a warning is detected in the previous SPI
command frame, the Error/Warning bit is set high. The SPI read
is synchronized on the rising edge of CSn and the data is
transmitted on MISO with the next read command, as shown in
Figure 29.
Figure 29:
SPI Read
CSn
MOSI
MISO
Command
Command
Command
Command
Read ADD[m]
Read ADD[n]
Read ADD[o]
Read ADD[p]
Data
Data
Data
DATA (ADD[m])
DATA (ADD[n])
DATA (ADD[o])
Recommended CRC calculation see chapter CRC Checksum
In an SPI write transaction, the write command frame is
followed by a write data frame at MOSI. The write data frame
consists of the new content of register which address is in the
command frame. During the new content is transmitted on
MOSI by the write data frame, the old content is send on MISO.
At the next command on MOSI the actual content of the register
is transmitted on MISO, as shown in Figure 30.
ams Datasheet
[v1-01] 2020-Dec-16
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AS5047U − Detailed Description
Figure 30:
SPI Write
CSn
Command
MOSI
Write ADD[n]
Data to write into ADD[n]
DATA (x)
Data content ADD[n]
MISO
Command
Write ADD[m]
New Data content
of ADD[n]
DATA (ADD[n])
DATA (x)
Data to write into ADD[m]
DATA (y)
Data content ADD[m]
DATA (ADD[m])
Command
Next
command
New Data content
of ADD[m]
DATA (y)
PAD Word
Any number of PAD [8*n-1:0] bits can precede the MOSI data.
The PAD word is used to allocate the data on MISO to the correct
device.
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AS5047U − Detailed Description
CRC Checksum
For secure and reliable data transmission, the 24-bit and 32-bit
frames have a CRC for verification of correct transmission. The
CRC is calculated out of the payload of the SPI frame.
For the 24-bit SPI frames, the CRC calculation is based on bits
23:8. For the 32-bit command frame (MOSI), the CRC calculation
is based on bits 23:8 as well. For the 32-bit data frame (MISO),
the CRC is calculated based on bits 31:16. The PAD Number in
the 32-bit frame does not affect the CRC.
The calculation of the CRC is based on Irreducible polynomial
x^4+x^3+x^2+1.
The initialization CRC = 0xC4 prevents that 0x000000 is a valid
SPI command. This command would clear all sticky error flags.
Figure 31:
CRC Parameters
ams Datasheet
[v1-01] 2020-Dec-16
Name
Value
CRC width
8-bit
Polynomial
0x1D
Initial value
0xC4
Input reflected
No
Result reflected
No
Final XOR value
0xFF
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AS5047U − Detailed Description
Volatile Registers
The volatile registers are shown in Figure 32. Each register has
a 14-bit address.
Figure 32:
Volatile Memory Register Description
Address
Name
Default
Description
0x0000
NOP
0x0000
No operation
0x0001
ERRFL
0x0000
Error register
0x0003
PROG
0x0000
Programming register
0x3FF5
DIA
0xX3C2 or 0xXBC2 for
3.3V mode
0xX3C3 or 0xXBC3 for
5 V mode
0x3FF9
AGC
0x0000
AGC Value
0x3FFA
Sin-data
0x0000
Raw digital sine channel data
0x3FFB
Cos-data
0x0000
Raw digital cosine channel data
0x3FFC
VEL
0x0000
Velocity
0x3FFD
MAG
0x0000
CORDIC magnitude
0x3FFE
ANGLEUNC
0x0000
Measured angle without dynamic
angle error compensation
0x3FFF
ANGLECOM
0x0000
Measured angle with dynamic angle
error compensation
0x00D1
ECC_Checksum
0x0000
ECC checksum calculated based on
actual register setting
DIAGNOSTIC
Figure 33:
ERRFL (0x0001)
Name
Read/Write
Bit Position
CORDIC
Overflow
R
10
Reading the Overflow Bit of the CORDIC
OffCompNotFi
nished
R
9
In case the flag is 1 the internal offset compensation
is not finished
Not used
N/A
8
No function. Bit Setting: 0
WDTST
R
7
Watchdog information. In case the flag sets to 1, the
internal oscillator or the watchdog is not working
correctly
CRC error
R
6
CRC error during SPI communication
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Description
ams Datasheet
[v1-01] 2020-Dec-16
AS5047U − Detailed Description
Name
Read/Write
Bit Position
Command_
error
R
5
SPI invalid command received
Framing error
R
4
Framing if SPI communication wrong
P2ram_error
R
3
ECC has detected 2 uncorrectable errors in P2RAM in
customer area
P2ram_
warning
R
2
ECC is correcting one bit of P2RAM in customer area
1
This flag sets to 1 in case the AGC Value reaches 255
LSB and the magnitude value is the half of the of the
regulated magnitude value (between AGC = 0LSB
and AGC = 255LSB) which is typical 4800LSB.
0
Agc-warning=1. The flag sets to 1 in case the AGC
Value reaches 0LSB or 255LSB. The detailed
information which level is reached can be found in
the diagnostic register.
MagHalf
Agc-warning
R
R
Description
Reading the ERRFL register automatically clears its contents
(ERRFL=0x0000).
In case of an error flag, a read of the DIA register is mandatory.
Figure 34:
PROG (0x0003)
Name
Read/Write
Bit Position
Description
PROGVER
R/W
6
Program verify: Must be set to 1 for verifying the
correctness of the OTP programming
PROGOTP
R/W
3
Start OTP programming cycle
OTPREF
R/W
2
Refreshes the non-volatile memory content with the
OTP programmed content
PROGEN
R/W
0
Program OTP enable: Enables reading / writing the OTP
memory
The PROG register is used for programming the OTP memory.
ams Datasheet
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AS5047U − Detailed Description
Figure 35:
DIA(0x3FF5)
Name
Read/Write
Bit Position
Description
SPI_cnt
R
11:12
Not used
N/A
10
No function. Bit Setting: 0
AGC_finished
R
9
Initial AGC settling finished
Off comp
finished
R
8
Error flag offset compensation finished
SinOff_fin
R
7
Sine offset compensation finished
CosOff_fin
R
6
Cosine offset compensation finished
MagHalf_flag
R
5
Error flag magnitude is below half of target value
Comp_h
R
4
Warning flag AGC high
Comp_l
R
3
Warning flag AGC low
Cordic_overflow
R
2
Error flag CORDIC overflow
LoopsFinished
R
1
All Magneto Core loops finished
Vdd_mode
R
0
VDD supply mode:
0: VDD 3.3 Mode
1: VDD 5.0 Mode
SPI frame counter
Figure 36:
AGC(0x3FF9)
Name
Read/Write
Bit Position
AGC
R
7:0
Name
Read/Write
Bit Position
Vel
R
13:0
Name
Read/Write
Bit Position
Mag
R
13:0
Description
8-Bit AGC value
Figure 37:
VEL(0x3FFC)
Description
Velocity value (14-bit signed integer)
Figure 38:
MAG (0x3FFD)
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Description
CORDIC magnitude information
ams Datasheet
[v1-01] 2020-Dec-16
AS5047U − Detailed Description
Figure 39:
ANGLEUNC (0x3FFE)
Name
Read/Write
Bit Position
ANGLEUNC
R
13:0
Description
Angle information without dynamic angle error
compensation
Figure 40:
ECC_s (0x3FD0)
Name
Read/Write
Bit Position
ECC_s
R
6:0
Name
Read/Write
Bit Position
ANGLECOM
R
13:0
Description
Calculated ECC checksum
Figure 41:
ANGLECOM(0x3FFF)
Description
Angle information with dynamic angle error
compensation
Non-Volatile Registers (OTP)
The OTP (One-Time Programmable) memory is used to store the
absolute zero position of the sensor and the customer settings
permanently in the sensor IC. SPI write/read access is possible
several times for all non-volatile registers (soft write). Soft
written register content will be lost after a hardware reset. The
programming itself can be done just once. Therefore the
content of the non-volatile registers is stored permanently in
the sensor. The register content is still present after a hardware
reset and cannot be overwritten. For a correct function of the
sensor the OTP programming is not required. If no
configuration or programming is done, the non-volatile
registers are in the default state 0x0000.
Figure 42:
Non-Volatile Register Table
Address
Name
Default
0x0015
DISABLE
0x0000
Outputs and filter disable register
0x0016
ZPOSM
0x0000
Zero position MSB
0x0017
ZPOSL
0x0000
Zero position LSB/ MAG diagnostic
0x0018
SETTINGS1
0x0000
Custom setting register 1
ams Datasheet
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Description
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AS5047U − Detailed Description
Address
Name
Default
Description
0x0019
SETTINGS2
0x0000
Custom setting register 2
0x001A
SETTINGS3
0x0000
Custom setting register 3
0x001B
ECC
0x0000
ECC Settings
Figure 43:
DISABLE (0x0015)
Description
Name
Read/Write/Program
Bit Position
UVW_off
RW
0
0: Normal mode (default)
1: Switch UVW output off (tristate)
ABI_off
RW
1
0: Normal mode (default)
1: Switch ABI output off (tristate)
na
RW
2:5
FILTER_disable
RW
6
Default=0
0: Filter enabled (default)
1: Filter disabled
Figure 44:
ZPOSM (0x0016)
Name
Read/Write/Program
Bit Position
ZPOSM
R/W/P
7:0
Description
8 most significant bits of the zero position
Figure 45:
ZPOSL (0x0017)
Name
Read/Write/Program
Bit Position
Description
ZPOSL
R/W/P
5:0
6 least significant bits of the zero position
Dia1_en
R/W/P
6
Default=0; only applicable for automotive
version AS5147U
Dia2_en
R/W/P
7
Default=0; only applicable for automotive
version AS5147U
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AS5047U − Detailed Description
Figure 46:
SETTINGS1 (0x0018)
Name
Read/Write/Program
Bit Position
Description
K_max
R/W/P
2:0
K max for adaptive filter setting
K_min
R/W/P
5:3
K min for adaptive filter setting
Dia3_en
R/W/P
6
Default=0; not applicable
Dia4_en
R/W/P
7
Default=0; not applicable
Figure 47:
SETTINGS2 (0x0019)
Name
Read/Write/Program
Bit Position
Description
IWIDTH
R/W/P
0
0: 3 pulses
1: 1 pulses
NOISESET
R/W/P
1
Noise setting for 3.3V operation at 150°C
DIR
R/W/P
2
Rotation direction
UVW_ABI
R/W/P
3
Defines the PWM output
(0=ABI is operating, W is used as PWM)
(1=UVW is operating, I is used as PWM)
DAECDIS
R/W/P
4
Disable dynamic angle error compensation
(0=DAE compensation ON,
1=DAE compensation OFF)
ABI_DEC
R/W/P
5
ABI setting to decimal count
Data_select
R/W/P
6
This bit defines which data can be read from
address 16383dec (3FFFhex)
0-> ANGLECOM
1-> ANGLEUNC
PWMon
R/W/P
7
Enables PWM (setting of UVW_ABI bit
necessary)
ams Datasheet
[v1-01] 2020-Dec-16
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AS5047U − Detailed Description
Figure 48:
SETTINGS3 (0x001A)
Name
Read/Write/Program
Bit Position
Description
UVWPP
R/W/P
2:0
UVW number of pole pairs
HYS
R/W/P
4:3
Hysteresis
ABIRES
R/W/P
7:5
Resolution of ABI
Figure 49:
ECC (0x001B)
Name
Read/Write/
Program
Bit
Position
ECC_chsum
R/W/P
6:0
ECC_en
R/W/P
7
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Description
ECC checksum
Enables ECC
ams Datasheet
[v1-01] 2020-Dec-16
AS5047U − Detailed Description
ABI Incremental Interface
The AS5047U can send the angle position to the host
microcontroller through an incremental interface. This
interface is available simultaneously with the other interfaces.
By default, the incremental interface is set to work at a 12-bit
resolution which corresponds to 4096 steps per revolution or
1024 pulses per revolution (ppr). This resolution can be
changed with the OTP bits ABIRES. The phase shift between the
A and B signals indicates the rotation direction: clockwise (A
leads, B follows) or counterclockwise (B leads, A follows). During
the start-up time, after power on to the chip, all three ABI signals
are high. The DIR bit can be used to invert the sense of the
rotation direction.
The IWIDTH setting programs the width of the index pulse from
3 LSB (default) to 1 LSB.
Figure 50:
ABI Signals
A
B
I
Steps
N-7 N-6 N-5 N-4 N-3 N-2 N-1 0
1
2
3
Clockwise rotation
4
5
6
7
8
7
6
5
4
3
2
1
0 N-1 N-2 N-3 N-4
Counter-clockwise rotation
N= 16384 for 14-Bit resolution, N = 4096 for 12-bit resolution
and N = 1024 for 10-bit resolution..
The Figure 50 shows the ABI signal flow if the magnet rotates
in clockwise direction and counter-clockwise direction (DIR=0).
The rotation direction of the magnet is defined as clockwise
(DIR=0) when the view is from the topside of AS5047U.
ams Datasheet
[v1-01] 2020-Dec-16
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AS5047U − Detailed Description
Figure 51:
ABI Settings
ABIRES [LSB]
SETTINGS3
(0x001A)
ABI_DEC
SETTINGS2
(0x0019)
ABI_Pulses
ABI Resolution [LSB]
100
0
4096
16384
011
0
2048
8192
000
0
1024
4096 (default value)
001
0
512
2048
010
0
256
1024
000
1
1000
4000
001
1
500
2000
010
1
400
1600
011
1
300
1200
100
1
200
800
101
1
100
400
110
1
50
200
111
1
25
100
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AS5047U − Detailed Description
UVW Commutation Interface
The AS5047U can emulate the UVW signals generated by the
three discrete Hall switches commonly used in BLDC motors.
The UVWPP field in the SETTINGS3 register selects the number
of pole pairs of the motor (from 1 to 7 pole pairs). The UVW
signals are generated based on14-bit core resolution.
During the start-up time, after power on of the chip, the UVW
signals are low.
Figure 52:
UVW Signals
U
V
W
angle
0°
60°
120°
180°
240°
Clockwise rotation
300°
360°
360°
300°
240°
180°
120°
60°
0°
Counter-clockwise rotation
The Figure 52 shows the UVW signal flow if the magnet rotates
in clockwise direction and counter-clockwise direction (DIR=0).
The rotation direction of the magnet is defined as clockwise
(DIR=0) when the view is from the topside of AS5047U. With the
bit DIR, it is possible to invert the rotation direction.
ams Datasheet
[v1-01] 2020-Dec-16
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AS5047U − Detailed Description
Figure 53:
UVW Settings
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UVWPP [LSB]
Pole Pairs
000
1pp (default)
001
2pp
010
3pp
011
4pp
100
5pp
101
6pp
110
7pp
111
7pp
ams Datasheet
[v1-01] 2020-Dec-16
AS5047U − Detailed Description
PWM
The PWM can be enabled with the bit setting PWMon. The PWM
encoded signal is displayed on the pin W or the pin I. The bit
setting UVW_ABI defines which output is used as PWM. The
PWM output consists of a frame of 4119 PWM clock periods, as
shown in Figure 54. The PWM frame has the following sections:
• 12 PWM clock periods for INIT
• 4 PWM clock periods for error detection
• 4095 PWM clock periods of data
• 8 PWM clock periods low
The angle is represented in the data part of the frame with a
12-bit resolution. One PWM clock period represents 0.088
degree and has a typical duration of 444 ns.
If the embedded diagnostic of the AS5047U detects any error
the PWM interface displays only 12 clock periods high
(0.3% duty-cycle). Respectively the 4 clocks for error detection
are forced to low.
Figure 54:
Pulse Width Modulation Encoded Signal
4 clock
12 clock periods periods
high
Error
detection
ams Datasheet
[v1-01] 2020-Dec-16
4089
4090
4091
4092
4093
4094
4095
Error
detection
1
2
3
4
5
6
7
8
INIT
frame
4095 clock periods
data
8 clock periods
low
time
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AS5047U − Detailed Description
Hysteresis
Incremental Output Hysteresis
A hysteresis is introduced to avoid flickering at incremental
outputs at a stationary magnet position. In case of a rotational
direction change, the incremental outputs have a hysteresis,
which can be set in the SETTINGS3 register by HYSt-bits.
Regardless of the programmed incremental resolution, the
hysteresis always corresponds to the highest resolution of
11-bit
Figure 55:
Hysteresis Settings
HYS
Hysteresis
LSB
Hysteresis
Degree
00
1
0.17°
01
2
0.35°
10
3
0.52°
11
0
0
Default
For constant rotational directions, every magnet position
change is indicated at the incremental outputs (see Figure 56).
If for example the magnet turns clockwise from position “x+3“
to “x+4“, the incremental output would also indicate this
position accordingly.
A change of the magnet’s rotational direction back to position
“x+3“means, that the incremental output still remains
unchanged for the duration of 2 LSB, until position “x+2“ is
reached. Following this direction, the incremental outputs will
again be updated with every change of the magnet position.
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AS5047U − Detailed Description
Figure 56:
Hysteresis
Incremental
output
indication
X +4
Hysteresis:
2 LSB
X +3
X +2
X +1
X
X
X +1 X +2 X +3 X +4 X +5
Magnet position
Clockwise direction
Counter clockwise direction
Automatic Gain Control (AGC) and CORDIC
Magnitude
The AS5047U uses AGC to compensate for variations in the
magnetic field strength due to changes of temperature, air gap
between the chip and the magnet, and demagnetization of the
magnet. The automatic gain control value can be read in the
AGC field of the AGC register. Within the specified input
magnetic field strength (Bz), the Automatic Gain Control keeps
the CORDIC magnitude value (MAG) constant.
If magnetic field strength is out of specifications, the AGC has
its limits reached and the Agc-warning bit is set. When the
magnetic field strength is decreasing more then AGC can
control, the CORDIC magnitude is also decreasing.
If the CORDIC magnitude decreases lower than half of the target
magnet, the error flag MagHalf_flag is set.
ams Datasheet
[v1-01] 2020-Dec-16
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AS5047U − Detailed Description
ECC
The ECC (Error Code Correction) is a mechanism which protects
the customer settings.
The ECC protection is active whenever ECC_en=1. ECC_en is the
error corrected counterpart of the P2RAM bit en and is found
in register ECC_STATUS. Whenever a bit error occurs, this is
reported by the status register ERRFL [2:3]. Single bit errors are
corrected immediately and do not influence the correct
operation of the sensor. If either a single or double errors are
detected, the next SPI MISO frame will report this to the
software by setting flags error=1 (double bit error) or
warning=1 (single bit error). Warning and error are sticky flags,
which guarantees that spurious P2RAM errors are certainly
reported.
The ECC Protection is activated with the following steps:
• Writing uses data into the register and set ECC_en to high.
• Reading ECC_s from register 0x3FD0 and set the value into
ECC_chsum. Do not overwrite the ECC_en
• Programming the part.
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ams Datasheet
[v1-01] 2020-Dec-16
AS5047U − Application Information
Application Information
Burn and Verification of the OTP Memory
Figure 57:
Minimum Programming Diagram for the AS5047U with 5V Supply Voltage
VDD during programming 4.5 – 5.5V
VDD
I
CLK
GND
MISO
MOSI
Programmer
TEST
B
A
AS5047U
CSn
VDD3V
VDD
U
V
100nF
1μF
W
GND
Note(s):
1. In terms of EMC and for remote application, additional circuits are necessary.
ams Datasheet
[v1-01] 2020-Dec-16
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AS5047U − Application Information
Figure 58:
Minimum Programming Diagram for the AS5047U with 3.3V Supply Voltage
VDD during programming: 3.3V – 3.5V
VDD
CSn
I
CLK
GND
MOSI
Programmer
TEST
B
A
VDD3V
AS5047U
MISO
VDD
U
V
100nF
W
GND
Note(s):
1. In terms of EMC and for remote application, additional circuits are necessary.
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AS5047U − Application Information
Figure 59:
Programming Parameter
Symbol
Parameter
Conditions
Min
TaProg
Programming
temperature
Programming @ Room
Temperature
(25°C ± 20°C)
VDD
Positive supply
voltage
5 V operation mode. Supply
voltage during programming
4.5
VDD
Positive supply
voltage
3.3 V operation mode. Supply
voltage during programming
3.3
IProg
Current for
programming
Max current during OTP burn
procedure.
Typ
5
5
Max
Units
45
°C
5.5
V
3.5
V
100
mA
Note(s):
1. Programming parameter valid for AS5047U.
Step-by-Step Procedure to Permanently
Program the Non-Volatile Memory (OTP):
The programming can either be performed in 5V operation
using the internal LDO (1μF on regulator output pin), or in 3V
Operation but using a supply voltage between 3.3V and 3.5V.
1. Power on cycle
2. Write the SETTINGS1 and SETTINGS2 and SETTINGS3
registers with the Custom settings for this application
3. Place the magnet at the desired zero position
4. Read out the measured angle from the ANGLECOM
register
5. Write ANGLECOM [5:0] into the ZPOSL register and
ANGLECOM[13:6] into the ZPOSM register
6. Read reg(0x0016) to reg(0x001A)
7. Set ECC_en in Register ECC to 1 (ECC protection
enabled)
8. Read ECC_s (0x3FD0) to get the correct ECC key
9. Write ECC_s key into ECC register
10. Read reg(0x0016) to reg(0x001B) → read register step1
11. Comparison of written content (settings and angle) with
content of read register step1
12. If point 11 is correct, enable OTP read / write by setting
PROGEN = 1 in the PROG register
13. Start the OTP burn procedure by setting PROGOTP = 1
in the PROG register
14. Read the PROG register until it reads 0x0001
(Programming procedure complete)
ams Datasheet
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AS5047U − Application Information
15. Clear the memory content by writing 0x00 in the whole
non-volatile memory
16. Set the PROGVER = 1 to set the Guard band for the guard
band test.1
17. Refresh the non-volatile memory content with the OTP
content by setting OTPREF = 1
18. Read reg(0x0016) to reg(0x001B) → read register step2
19. Comparison of written content (settings and angle) with
content of read register step2. If a deviation in the
comparison occurs, the guard band test was not
successful. Reprogramming is not allowed!
Mandatory: guard band test
20. New power on cycle.
21. Read reg(0x0016) to Reg(0x001B) → read register step3
22. Comparison of written content (settings and angle) with
content of read register step3. If a deviation in the
comparison occurs, the power on test was not
successful. Reprogramming is not allowed!
23. If point 18 is correct, the programming was successful.
1. Guard band test:
Restricted to temperature range: 25 °C ± 20 °C
Right after the programming procedure (max. 1 hour with same conditions 25°C ± 20 °C), same VDD voltage.
The guard band test is only for the verification of the burned OTP fuses during the programming sequence.
A use of the guard band in other cases is not allowed.
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ams Datasheet
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AS5047U − Application Information
Figure 60:
OTP Memory Burn and Verification Flowchart
Read
Reg(0x0003)
Power on cycle
Read OTP_CTRL
START
FAIL
Write
DISABLE,SETTINGS1,
SETTINGS2 and
SETTINGS3 register
Turn magnet to the
prospective Zero Position
Read ANGLECOM
Reg(0x0003)==0x01
OTP burning procedure
complete if
Reg(0x0003)==0x01
Write
Reg(0x0015)=0x00
Reg(0x0016)=0x00
Reg(0x0017)=0x00
Reg(0x0018)=0x00
Reg(0x0019)=0x00
Reg(0x001A)=0x00
Reg(0x001B)=0x00
Clear memory
Read
Reg(0x3FFF)
Write
Reg(0x0003)=0x40
Set Guardband
Write
Write
Reg(0x0003)=0x04
Refresh memory with OTP
content
Write
Reg(0x0015)
Reg(0x0018)
Reg(0x0019)
Reg(0x001A)
Set magnet to the zero
position
Write Angle into ZPOSL
Reg(0x0017(5:0))=Reg(0x3FFF(5:0))
and ZPOSM Reg(0x0016(7:0))=Reg(0x3FFF(13:6))
Read Reg(0x0015) to
Reg(0x001A)
Write ECC_EN
Read
Reg(0x0015)
Reg(0x0016)
Reg(0x0017)
Reg(0x0018)
Reg(0x0019)
Reg(0x001A)
Reg(0x001B)
Read
Reg(0x0015)
Reg(0x0016)
Reg(0x0017)
Reg(0x0018)
Reg(0x0019)
Reg(0x001A)
Write
Reg(0x001B)=0x80
Verify 3
Read ECC Value
Write ECC (do not
overwrite ECC-en)
Read Registers step 1
(DISABLE,SETTINGS1,
SETTINGS2, SETTINGS3,
ZPOSM, ZPOSL and ECC)
Comparison of written
content
(DISABLE,SETTINGS1,
SETTINGS2, SETTINGS3,
ZPOSM, ZPOSL and ECC)
with Read Register step 1
read content
Read Register step 2
Read
Reg(0x3FD0)
PASS
Write
Reg(0x001B)
Power-on Reset
Read
Reg(0x0015)
Reg(0x0016)
Reg(0x0017)
Reg(0x0018)
Reg(0x0019)
Reg(0x001A)
Reg(0x001B)
Read
Reg(0x0015)
Reg(0x0016)
Reg(0x0017)
Reg(0x0018)
Reg(0x0016)
Verify 1
FAIL
Verify 4
FAIL
Read Register step 3
FAIL
PASS
PASS
END
Unlock OTP area for
burning
(PROGEN=1)
Write
Reg(0x0003)=0x01
Start OTP burning
procedure
(PROGOTP=1)
Write
Reg(0x0003)=0x08
Correct
programming
and verification.
Comparison of written
content
(DISABLE,SETTINGS1,
SETTINGS2, SETTINGS3,
ZPOSM, ZPOSL and ECC) with
content of Read Register
step 2.
Mandatory Guardband-Test
Comparison of written
content
(DISABLE,SETTINGS1,
SETTINGS2, SETTINGS3,
ZPOSM, ZPOSL and ECC) with
content of Read Register
step 3
END
Wrong
programming.
Reprogramming
not allowed!
Note(s):
1. Device with wrong programming must not be used. Scrapping mandatory.
ams Datasheet
[v1-01] 2020-Dec-16
Page 43
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AS5047U − Application Information
Circuit Diagram
Figure 61:
Minimum Circuit Diagram for the AS5047U
VDD during programming 4.5 – 5.5V
VDD
I
CLK
GND
MISO
MOSI
Programmer
TEST
A
AS5047U
CSn
B
VDD3V
VDD
U
V
100nF
1μF
W
GND
Note(s):
1. In terms of EMC and for remote application, additional protection circuit is necessary.
Page 44
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ams Datasheet
[v1-01] 2020-Dec-16
AS5047U − Package Drawings & Markings
Package Drawings & Markings
Figure 62:
Package Outline Drawing AS5047U
RoHS
Green
Symbol
Min
Nom
Max
Symbol
Min
Nom
Max
A
-
-
1.20
R
0.09
-
-
A1
0.05
-
0.15
R1
0.09
-
-
A2
0.80
1.00
1.05
S
0.20
-
-
b
0.19
-
0.30
Θ1
0º
-
8º
c
0.09
-
0.20
Θ2
-
12 REF
-
D
4.90
5.00
5.10
Θ3
-
12 REF
-
E
-
6.40 BSC
-
aaa
-
0.10
-
E1
4.30
4.40
4.50
bbb
-
0.10
-
e
-
0.65 BSC
-
ccc
-
0.05
-
L
0.45
0.60
0.75
ddd
-
0.20
-
L1
-
1.00 REF
-
N
14
Note(s):
1. Dimensioning and tolerancing conform to ASME Y14.5M - 1994.
2. All dimensions are in millimeters. Angles are in degrees.
3. N is the total number of terminals.
ams Datasheet
[v1-01] 2020-Dec-16
Page 45
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AS5047U − Package Drawings & Markings
Figure 63:
AS5047U Package Marking
AS5047U
YYWWMZZ
@
Figure 64:
Packaging Code
YY
Last two digits of the
manufacturing year
Page 46
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WW
Manufacturing week
M
Plant identifier
ZZ
Free choice /
traceability code
@
Sublot identifier
ams Datasheet
[v1-01] 2020-Dec-16
AS5047U − Mechanical Data
Mechanical Data
Figure 65:
TSSOP14 Die Placement and Hall Array Position
Hall radius
0.306±0.100
3.200±0.235
2.130±0.235
0.236±0.100
0.694±0.150
Note(s):
1. Dimensions are in mm.
2. The Hall array center is located in the center of the IC package. Hall array radius is 1.1mm.
3. Die thickness is 203μm nominal.
ams Datasheet
[v1-01] 2020-Dec-16
Page 47
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AS5047U − Ordering & Contact Information
Ordering & Contact Information
Figure 66:
Ordering Information
Ordering
Code
Package
Marking
Delivery Form
Delivery
Quantity
AS5047U-HTSM
TSSOP14
AS5047U
7” Tape & Reel in dry pack
500 pcs/reel
AS5047U-HTST
TSSOP14
AS5047U
13” Tape & Reel in dry pack
4500 pcs/reel
Buy our products or get free samples online at:
www.ams.com/Products
Technical Support is available at:
www.ams.com/Technical-Support
Provide feedback about this document at:
www.ams.com/Document-Feedback
For further information and requests, e-mail us at:
ams_sales@ams.com
For sales offices, distributors and representatives, please visit:
www.ams.com/Contact
Headquarters
ams AG
Tobelbader Strasse 30
8141 Premstaetten
Austria, Europe
Tel: +43 (0) 3136 500 0
Website: www.ams.com
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ams Datasheet
[v1-01] 2020-Dec-16
AS5047U − RoHS Compliant & ams Green Statement
RoHS Compliant & ams Green
Statement
RoHS: The term RoHS compliant means that ams AG products
fully comply with current RoHS directives. Our semiconductor
products do not contain any chemicals for all 6 substance
categories plus additional 4 substance categories (per
amendment EU 2015/863), including the requirement that lead
not exceed 0.1% by weight in homogeneous materials. Where
designed to be soldered at high temperatures, RoHS compliant
products are suitable for use in specified lead-free processes.
ams Green (RoHS compliant and no Sb/Br/Cl): ams Green
defines that in addition to RoHS compliance, our products are
free of Bromine (Br) and Antimony (Sb) based flame retardants
(Br or Sb do not exceed 0.1% by weight in homogeneous
material) and do not contain Chlorine (Cl not exceed 0.1% by
weight in homogeneous material).
Important Information: The information provided in this
statement represents ams AG knowledge and belief as of the
date that it is provided. ams AG bases its knowledge and belief
on information provided by third parties, and makes no
representation or warranty as to the accuracy of such
information. Efforts are underway to better integrate
information from third parties. ams AG has taken and continues
to take reasonable steps to provide representative and accurate
information but may not have conducted destructive testing or
chemical analysis on incoming materials and chemicals. ams AG
and ams AG suppliers consider certain information to be
proprietary, and thus CAS numbers and other limited
information may not be available for release.
ams Datasheet
[v1-01] 2020-Dec-16
Page 49
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AS5047U − Copyrights & Disclaimer
Copyrights & Disclaimer
Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten,
Austria-Europe. Trademarks Registered. All rights reserved. The
material herein may not be reproduced, adapted, merged,
translated, stored, or used without the prior written consent of
the copyright owner.
Devices sold by ams AG are covered by the warranty and patent
indemnification provisions appearing in its General Terms of
Trade. ams AG makes no warranty, express, statutory, implied,
or by description regarding the information set forth herein.
ams AG reserves the right to change specifications and prices
at any time and without notice. Therefore, prior to designing
this product into a system, it is necessary to check with ams AG
for current information. This product is intended for use in
commercial applications. Applications requiring extended
temperature range, unusual environmental requirements, or
high reliability applications, such as military, medical
life-support or life-sustaining equipment are specifically not
recommended without additional processing by ams AG for
each application. This product is provided by ams AG “AS IS”
and any express or implied warranties, including, but not
limited to the implied warranties of merchantability and fitness
for a particular purpose are disclaimed.
ams AG shall not be liable to recipient or any third party for any
damages, including but not limited to personal injury, property
damage, loss of profits, loss of use, interruption of business or
indirect, special, incidental or consequential damages, of any
kind, in connection with or arising out of the furnishing,
performance or use of the technical data herein. No obligation
or liability to recipient or any third party shall arise or flow out
of ams AG rendering of technical or other services.
The Hardware was developed in the domain of SEooC (Safety
Element out of Context) using ams best system know how. The
final system or target application is not known to ams AG. This
implies, that ams AG does not guarantee for a system functional
safety concept. The final responsibility for achieving a certain
ASIL (Automotive Safety Integrity Level) in the target
application is the responsibility of the system integrator.
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ams Datasheet
[v1-01] 2020-Dec-16
AS5047U − Document Status
Document Status
Document Status
Product Preview
Preliminary Datasheet
Datasheet
Datasheet (discontinued)
ams Datasheet
[v1-01] 2020-Dec-16
Product Status
Definition
Pre-Development
Information in this datasheet is based on product ideas in
the planning phase of development. All specifications are
design goals without any warranty and are subject to
change without notice
Pre-Production
Information in this datasheet is based on products in the
design, validation or qualification phase of development.
The performance and parameters shown in this document
are preliminary without any warranty and are subject to
change without notice
Production
Information in this datasheet is based on products in
ramp-up to full production or full production which
conform to specifications in accordance with the terms of
ams AG standard warranty as given in the General Terms of
Trade
Discontinued
Information in this datasheet is based on products which
conform to specifications in accordance with the terms of
ams AG standard warranty as given in the General Terms of
Trade, but these products have been superseded and
should not be used for new designs
Page 51
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AS5047U − Revision Information
Revision Information
Changes from 1-00 (2018-Oct-30) to current revision 1-01 (2020-Dec-16)
Page
Updated Figure 2
2
Updated Figure 7 and added notes under it
7
Updated Figure 19
17
Updated CRC Checksum and added Figure 31
23
Updated Figure 46
29
Updated Hysteresis and added Figure 55 and 56
36
Updated Figure 57
39
Updated Figure 58
40
Updated notes under Figure 65
47
Note(s):
1. Page and figure numbers for the previous version may differ from page and figure numbers in the current revision.
2. Correction of typographical errors is not explicitly mentioned.
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ams Datasheet
[v1-01] 2020-Dec-16
AS5047U − Content Guide
Content Guide
ams Datasheet
[v1-01] 2020-Dec-16
1
1
2
2
General Description
Key Benefits & Features
Applications
Block Diagram
3
5
Pin Assignment
Absolute Maximum Ratings
6
7
7
Electrical Characteristics
Magnetic Characteristics
System Specifications
9
Timing Characteristics
10
11
12
12
15
15
16
16
18
22
23
24
27
31
33
35
36
36
37
38
Detailed Description
Power Management
Dynamic Angle Error Compensation
Adaptive Filter System
Speed Measurements
Rotation Speed Measurement
SPI Interface (Slave)
SPI Timing
SPI Transaction
PAD Word
CRC Checksum
Volatile Registers
Non-Volatile Registers (OTP)
ABI Incremental Interface
UVW Commutation Interface
PWM
Hysteresis
Incremental Output Hysteresis
Automatic Gain Control (AGC) and CORDIC Magnitude
ECC
39
39
41
44
Application Information
Burn and Verification of the OTP Memory
Step-by-Step Procedure to Permanently Program the
Non-Volatile Memory (OTP):
Circuit Diagram
45
47
48
49
50
51
52
Package Drawings & Markings
Mechanical Data
Ordering & Contact Information
RoHS Compliant & ams Green Statement
Copyrights & Disclaimer
Document Status
Revision Information
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