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DATA SHEET
SURFACE-MOUNT CERAMIC
MULTILAYER CAPACITORS
High-capacitance: Class 2, X5R/X7R
(Pb Free & RoHS compliant)
6.3 V TO 25 V
Product specification – June 1, 2006 V.11
56 nF to 47 µF
Product specification
Surface-Mount Ceramic Multilayer Capacitors
SCOPE
This specification describes high
capacitance X5R/X7R series chip
capacitors with lead-free
terminations.
High-Capacitance X5R/X7R 6.3 V to 25 V
APPLICATIONS
z PCs, hard disk, game PCs
z Power supplies
z DVDs, camcorders
z Mobile phones, PDAs
2
17
FEATURES
z Supplied in tape on reel
z Nickel-barrier end termination
ORDERING INFORMATION
Components may be ordered by using either a Phycomp’s unique 12NC or Phycomp clear text code.
PHYCOMP ORDERING CODE
12NC CODE
2 2 X X
X X X
X X X X X
Capacitance value(1)
Carrier type
22 blister
38 paper
50 blister Ur ≤ 6.3 V
54 bulk
55 paper Ur ≤ 6.3 V
Tolerance
5 ±5%
6 ±10%
7 ±20%
Rated voltage - Termination
20 6.3 V; NiSn
24 10 V; NiSn
78 16 V; NiSn
91 25 V; NiSn
Size
7 0402
6 0603
0 0805
1 1206
2 1210
4 1812
Temperature characteristic
3 X5R
5 X7R
SCM040
Packaging(2)
1 reel: ∅180 mm; 7"
5 reel: ∅330 mm; 13"
4 bulk case
(1) Refer to “Conversion table of capacitance & last 2 digits of 12NC”
(2) Quantity on reel depends on thickness classification; see section “Thickness classification and packing quantities for 6.3 V to 25 V”.
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
3
17
High-Capacitance X5R/X7R 6.3 V to 25 V
Conversion table of capacitance & last 2 digits of 12NC
CAP.
(nF)
LAST 2 DIGITS
OF 12NC
CAP.
(nF)
LAST 2 DIGITS
OF 12NC
CAP.
(nF)
LAST 2 DIGITS
OF 12NC
CAP.
(nF)
LAST 2 DIGITS
OF 12NC
0.10
09
1.8
26
33
43
560
59
0.12
11
2.2
27
39
44
680
61
0.15
12
2.7
28
47
45
820
62
0.18
13
3.3
29
56
46
1,000
63
0.22
14
3.9
31
68
47
1,500
65
0.27
15
4.7
32
82
48
2,200
67
0.33
16
5.6
33
100
49
3,300
69
0.39
17
6.8
34
120
51
4,700
72
0.47
18
8.2
35
150
52
6,800
74
0.56
19
10
36
180
53
10,000
76
0.68
21
12
37
220
54
22,000
81
0.82
22
15
38
270
55
47,000
85
1.0
23
18
39
330
56
100,000
89
1.2
24
22
41
390
57
1.5
25
27
42
470
58
NOTE
1. This table is applied to all X5R, X7R, Y5V, and Z5U products except Y5V 50 V products.
CTC CODE
Size Temp.
code Char.
0402
0603
0805
1206
1210
Capacitance
Tolerance Rated
voltage
Termination Packing
2B = X5R 225 = 2,200,000 pF; the J = ±5%
5 = 6.3 V B = NiSn
2R = X7R third digit signifies the
K = ±10% 6 = 10 V
multiplying factor:
M = ±20% 7 = 16 V
3 = × 1,000
8 = 25 V
4 = × 10,000
1812
5 = × 100,000
2 = 180 mm; 7” paper
Marking
Series
0 = No marking D = BNE
3 = 330 mm; 13” paper
B = 180 mm; 7” blister
F = 330 mm; 13” blister
P = Bulk case
6 = × 1,000,000
7 = × 10,000,000
Example: 06032B225M5B20D
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
High-Capacitance X5R/X7R 6.3 V to 25 V
4
17
CONSTRUCTION
The capacitor consists of a
rectangular block of ceramic
dielectric in which a number of
interleaved metal electrodes are
contained. This structure gives
rise to a high capacitance per
unit volume.
The inner electrodes are
connected to the two end
terminations and finally covered
with a layer of plated tin (NiSn).
The terminations are lead-free. A
cross section of the structure is
shown in Fig.1.
terminations
electrodes
MLB457
ceramic material
Fig. 1 Surface mounted multilayer ceramic capacitor construction
DIMENSION
Table 1
For dimension see Table 1
TYPE
W
T
L2
L4
L1
L3
CC0402
CC0603
CC0805
CC1206
CC1210
CC1812
L1 (mm)
1. 0 ±0.05
1.6 ±0.10
2.0 ±0.20
3.2±0.20 3.2 ±0.20
4.5 ±0.20
W (mm)
0.5 ±0.05
0.8 ±0.07 1.25 ±0.20
1.6±0.20 2.5 ±0.20
3.2 ±0.20
T
(mm)
Refer to table 2 to 4
MBB211
L2/L3
(mm)
Fig. 2 Surface mounted multilayer
ceramic capacitor dimension
L4
(mm)
min.
0.15
0.20
0.25
0.25
0.25
0.25
max.
0.30
0.50
0.75
0.75
0.75
0.75
min.
0.40
0.60
0.55
1.40
1.40
2.20
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
High-Capacitance X5R/X7R 6.3 V to 25 V
5
17
CAPACITANCE RANGE & THICKNESS FOR X5R/X7R 6.3 V
Table 2
CAPACITANCE
(µF)
6.3 V
0402
0603
0805
1206
1210
0.056
0.068
0.082
0.10
0.5 ±0.05
0.12
0.15
0.18
0.22
0.27
0.33
0.39
0.47
0.56
0.68
0.82
1.0
0.8 ±0.07
1.5
0.8 ±0.1
2.2
1.25 ±0.1
3.3
1.25 ±0.2
4.7
6.8
10
1.6 ±0.2
22
2.5 ±0.2
47
NOTE
1.
Values in shaded cells indicate thickness class in mm.
2.
X5R:
; X7R:
; both X5R and X7R:
.
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
High-Capacitance X5R/X7R 6.3 V to 25 V
6
17
CAPACITANCE RANGE & THICKNESS FOR X5R/X7R 10V
Table 3
CAPACITANCE
(µF)
10 V
0402
0.056
0.5 ±0.05
0603
0805
1206
1210
0.068
0.082
0.10
0.5 ±0.05
0.12
0.5 ±0.05
0.15
0.18
0.22
0.27
0.8 ±0.07
0.33
0.39
0.47
0.56
0.8 ±0.07
0.68
0.82
1.0
1.25 ±0.1
1.5
0.8 ±0.1
2.2
1.25 ±0.1
3.3
1.25 ±0.2
4.7
1.6 ±0.2
6.8
1.6 ±0.2
10
1.9 ±0.2
22
2.5 ±0.2
NOTE
1.
Values in shaded cells indicate thickness class in mm.
2.
X5R:
; X7R:
; both X5R and X7R:
.
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
High-Capacitance X5R/X7R 6.3 V to 25 V
7
17
CAPACITANCE RANGE & THICKNESS FOR X5R/X7R 16V TO 25V
Table 4
CAPACITANCE
(µF)
16V
0402
0.056
0.5 ±0.05
0603
0805
1206
1210
1812
25V
0603
1206
1210
0.068
0.082
0.10
0.12
0.8 ±0.07
0.15
0.18
0.22
0.27
0.33
0.8 ±0.07
0.39
0.47
0.56
1.25 ±0.2
0.68
0.82
1.0
1.6 ±0.2
1.5
2.2
1.15 ±0.1
3.3
1.9 ±0.2
4.7
1.6 ±0.2
6.8
1.9 ±0.2
1.9 ±0.2
2.5 ±0.2
2.5 ±0.2
10
22
2.5 ±0.2
NOTE
1.
Values in shaded cells indicate thickness class in mm.
2.
X5R:
; X7R:
; both X5R and X7R:
.
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
High-Capacitance X5R/X7R 6.3 V to 25 V
8
17
THICKNESS CLASSES AND PACKING QUANTITY
Table 5
DESCRIPTION
SIZE
THICKNESS 8 mm TAPE WIDTH/AMOUNT PER REEL 12 mm TAPE WIDTH
AMOUNT
CODE CLASSIFICATION
PER
Ø180 mm, 7”
Ø330 mm, 13” /AMOUNT PER REEL
(mm)
BULK CASE
Paper
Blister
Paper
Blister Ø180 mm, 7” Blister
0201
0.3 ±0.03
15,000
---
50,000
---
---
---
0402
0.5 ±0.05
10,000
---
50,000
---
---
50,000
0603
0.8 ±0.07
4,000
---
15,000
---
---
15,000
0805
0.6 ±0.10
4,000
---
20,000
---
---
10,000
0.85 ±0.1
4,000
---
15,000
---
---
8,000
1.25 ±0.10
---
3,000
---
10,000
---
5,000
0.6 ±0.10
4,000
---
20,000
---
---
---
0.85 ±0.10
4,000
---
15,000
---
---
---
1.00 / 1.15 ±0.10
---
3,000
---
10,000
---
---
1.6 ±0.15
---
2 500
---
10,000
---
---
1.6 ±0.20
---
2,000
---
10,000
---
---
0.6 / 0.7 ±0.10
---
4,000
---
15,000
---
---
0.85 ±0.10
---
4,000
---
10,000
---
---
1.15 ±0.10
---
3,000
---
10,000
---
---
1.15 ±0.15
---
3,000
---
10,000
---
---
1.5 ±0.10
---
2,000
---
---
---
---
1.6 / 1.9 ±0.20
---
2,000
---
---
---
---
2.5 ±0.20
---
1,000
---
---
---
---
1.15 ±0.15
---
---
---
---
1 500
---
1.35 ±0.15
---
---
---
---
1,000
---
1.5 ±0.10
---
---
---
---
1,000
---
0.6 / 0.85 ±0.10
---
---
---
---
2,000
---
1.15 ±0.10
---
---
---
---
1,500
---
1.15 ±0.15
---
---
---
---
1,500
---
1.35 ±0.15
---
---
---
---
1,000
---
1.5 ±0.1
---
---
---
---
1,000
---
1206
1210
Discrete
capacitors
1808
1812
Low
inductance
Arrays
1.6 ±0.2
---
---
---
---
1,000
---
0306
0.5 ±0.10
4,000
---
15,000
---
---
---
0508
0.85 ±0.10
4,000
---
15,000
---
---
---
0612
0.85 ±0.10
4,000
---
15,000
---
---
---
0508
0.6 ±0.10
4,000
---
---
---
---
---
0.85 ±0.10
4,000
---
---
---
---
---
0.8 ±0.10
4,000
---
---
---
---
---
1.2 ±0.10
---
3,000
---
---
---
---
0612
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
9
17
High-Capacitance X5R/X7R 6.3 V to 25 V
ELECTRICAL CHARACTERISTICS
CLASS 2 CAPACITORS; X5R/X7R DIELECTRIC; NISN TERMINATIONS
Unless otherwise stated all electrical values apply at an ambient temperature of 20 ±1 °C, an atmospheric
pressure of 86 to 106 kPa, and a relative humidity of 63 to 67%.
Table 6
VALUE
DESCRIPTION
Capacitance range (1)
Capacitance
56 nF to 47 µF
tolerance (1) (2)
Dissipation factor
±5%, ±10%, and ±20%
(D.F.) (1)
Insulation resistance after 1 minute at Ur (DC)
See table 7 - 12
Rins ≥ 10 GΩ or Rins × C ≥ 500 seconds whichever is less
Maximum capacitance change as a function of temperature
(temperature characteristic/coefficient)
Operating temperature range:
X5R
X7R
±15%
–55 °C to +85 °C
–55 °C to +125 °C
NOTE
1. f=1 KHz for C ≤ 10 µF; measuring at voltage 1 Vrms; f=120 Hz for C > 10 µF; measuring at voltage 0.5 Vrms.
2. ±5% capacitance tolerance is on request for capacitance value < 1 uF.
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
High-Capacitance X5R/X7R 6.3 V to 25 V
10
17
DISSIPATION FACTOR (D.F.) FOR SIZES 0402 TO 1812
Table 7 For size 0402 (1005 metric)
TC
SIZE
CAPACITANCE
VALUE (µF)
CAPACITANCE
TOLERANCE (%)
DC RATED VOLTAGE
(V)
DISSIPATION FACTORD.F. (%)
THICKNESS
(mm)
X5R
0402
0.10
±10; ±20
6.3
7.0
0.50
X5R
0402
0.12
±10; ±20
6.3
7.0
0.50
X5R
0402
0.15
±10; ±20
6.3
7.0
0.50
X5R
0402
0.18
±10; ±20
6.3
7.0
0.50
X5R
0402
0.22
±10; ±20
6.3
7.0
0.50
X5R
0402
0.27
±10; ±20
6.3
10.0
0.50
X5R
0402
0.33
±10; ±20
6.3
10.0
0.50
X5R
0402
0.39
±10; ±20
6.3
10.0
0.50
X5R
0402
0.47
±10; ±20
6.3
10.0
0.50
X5R
0402
0.56
±10; ±20
6.3
10.0
0.50
X5R
0402
0.68
±10; ±20
6.3
10.0
0.50
X5R
0402
0.82
±10; ±20
6.3
10.0
0.50
X5R
0402
1.00
±10; ±20
6.3
10.0
0.50
X7R
0402
0.056
±10; ±20
10
5.0
0.50
X7R
0402
0.068
±10; ±20
10
5.0
0.50
X7R
0402
0.082
±10; ±20
10
5.0
0.50
X5R
0402
0.10
±10; ±20
10
5.0
0.50
X7R
0402
0.10
±10; ±20
10
5.0
0.50
X5R
0402
0.12
±10; ±20
10
7.0
0.50
X5R
0402
0.15
±10; ±20
10
7.0
0.50
X5R
0402
0.18
±10; ±20
10
7.0
0.50
X5R
0402
0.22
±10; ±20
10
7.0
0.50
X5R
0402
0.056
±10; ±20
16
5.0
0.50
X7R
0402
0.056
±10; ±20
16
5.0
0.50
X5R
0402
0.068
±10; ±20
16
5.0
0.50
X7R
0402
0.068
±10; ±20
16
5.0
0.50
X5R
0402
0.082
±10; ±20
16
5.0
0.50
X7R
0402
0.082
±10; ±20
16
5.0
0.50
X5R
0402
0.10
±10; ±20
16
5.0
0.50
X7R
0402
0.10
±10; ±20
16
5.0
0.50
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
High-Capacitance X5R/X7R 6.3 V to 25 V
11
17
Table 8 For size 0603 (1608 metric)
TC
SIZE
CAPACITANCE
VALUE (µF)
CAPACITANCE
TOLERANCE (%)
DC RATED VOLTAGE
(V)
DISSIPATION FACTORD.F. (%)
THICKNESS
(mm)
X5R
0603
1.00
±10; ±20
6.3
7.0
0.80
X5R
0603
1.50
±10; ±20
6.3
10.0
0.80
X5R
0603
2.20
±10; ±20
6.3
10.0
0.80
X5R
0603
3.30
±10; ±20
6.3
10.0
0.80
X5R
0603
4.70
±10; ±20
6.3
10.0
0.80
X7R
0603
0.27
±10; ±20
10
5.0
0.80
X7R
0603
0.33
±10; ±20
10
5.0
0.80
X7R
0603
0.39
±10; ±20
10
5.0
0.80
X7R
0603
0.47
±10; ±20
10
5.0
0.80
X5R
0603
0.56
±10; ±20
10
7.0
0.80
X5R
0603
0.68
±10; ±20
10
7.0
0.80
X5R
0603
0.82
±10; ±20
10
7.0
0.80
X5R
0603
1.00
±10; ±20
10
7.0
0.80
X5R
0603
1.50
±10; ±20
10
7.0
0.80
X5R
0603
2.20
±10; ±20
10
10.0
0.80
X7R
0603
0.12
±10; ±20
16
5.0
0.80
X7R
0603
0.15
±10; ±20
16
5.0
0.80
X7R
0603
0.18
±10; ±20
16
5.0
0.80
X7R
0603
0.22
±10; ±20
16
5.0
0.80
X7R
0603
0.27
±10; ±20
16
5.0
0.80
X7R
0603
0.33
±10; ±20
16
5.0
0.80
X7R
0603
0.39
±10; ±20
16
5.0
0.80
X7R
0603
0.47
±10; ±20
16
5.0
0.80
X5R
0603
0.33
±10; ±20
25
5.0
0.80
X5R
0603
0.39
±10; ±20
25
5.0
0.80
X5R
0603
0.47
±10; ±20
25
5.0
0.80
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
High-Capacitance X5R/X7R 6.3 V to 25 V
12
17
Table 9 For size 0805 (2012 metric)
TC
SIZE
CAPACITANCE
VALUE (µF)
CAPACITANCE
TOLERANCE (%)
DC RATED VOLTAGE
(V)
DISSIPATION FACTORD.F. (%)
THICKNESS
(mm)
X5R
0805
2.20
±10; ±20
6.3
7.0
1.25
X7R
0805
2.20
±10; ±20
6.3
7.0
1.25
X5R
0805
3.30
±10; ±20
6.3
7.0
1.25
X5R
0805
4.70
±10; ±20
6.3
7.0
1.25
X5R
0805
6.80
±10; ±20
6.3
10.0
1.25
X5R
0805
10.00
±10; ±20
6.3
10.0
1.25
X7R
0805
1.00
±10; ±20
10
5.0
1.25
X7R
0805
1.50
±10; ±20
10
7.0
1.25
X5R
0805
2.20
±10; ±20
10
7.0
1.25
X7R
0805
2.20
±10; ±20
10
7.0
1.25
X5R
0805
3.30
±10; ±20
10
7.0
1.25
X5R
0805
4.70
±10; ±20
10
7.0
1.25
X5R
0805
6.80
±10; ±20
10
10.0
1.25
X5R
0805
10.00
±10; ±20
10
10.0
1.25
X7R
0805
0.56
±10; ±20
16
5.0
1.25
X7R
0805
0.68
±10; ±20
16
5.0
1.25
X7R
0805
0.82
±10; ±20
16
5.0
1.25
X7R
0805
1.00
±10; ±20
16
5.0
1.25
Table 10 For size 1206 (3216 metric)
TC
SIZE
CAPACITANCE
VALUE (µF)
CAPACITANCE
TOLERANCE (%)
DC RATED VOLTAGE
(V)
DISSIPATION FACTORD.F. (%)
THICKNESS
(mm)
X5R
1206
10.00
±10; ±20
6.3
7.5
1.60
X5R
1206
22.00
±10; ±20
6.3
10.0
1.60
X5R
1206
4.70
±10; ±20
10
5.0
1.60
X7R
1206
4.70
±10; ±20
10
5.0
1.60
X5R
1206
6.80
±10; ±20
10
7.5
1.60
X5R
1206
10.00
±10; ±20
10
7.5
1.60
X7R
1206
2.20
±10; ±20
16
5.0
1.15
X5R
1206
4.70
±10; ±20
16
5.0
1.60
X7R
1206
1.00
±10; ±20
25
7.5
1.60
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
High-Capacitance X5R/X7R 6.3 V to 25 V
13
17
Table 11 For size 1210 (3225 metric)
TC
SIZE
CAPACITANCE
VALUE (µF)
CAPACITANCE
TOLERANCE (%)
DC RATED VOLTAGE
(V)
DISSIPATION FACTORD.F. (%)
THICKNESS
(mm)
X5R
1210
22.00
±20
6.3
2.5
2.50
X5R
1210
47.00
±20
6.3
10.0
2.50
X5R
1210
10.00
±10; ±20
10
3.5
1.90
X5R
1210
22.00
±20
10
7.0
2.50
X5R
1210
3.30
±10; ±20
16
3.5
1.90
X5R
1210
4.70
±10; ±20
16
3.5
1.90
X7R
1210
4.70
±10; ±20
16
3.5
1.90
X5R
1210
6.80
±10; ±20
16
3.5
2.50
X5R
1210
10.00
±10; ±20
16
3.5
2.50
X5R
1210
3.30
±10; ±20
25
3.5
1.90
X5R
1210
4.70
±10; ±20
25
3.5
1.90
X5R
1210
6.80
±10; ±20
25
2.5
2.50
X5R
1210
10.00
±10; ±20
25
2.5
2.50
Table 12 For size 1812 (4532 metric)
TC
SIZE
CAPACITANCE
VALUE (µF)
CAPACITANCE
TOLERANCE (%)
DC RATED VOLTAGE
(V)
DISSIPATION FACTORD.F. (%)
THICKNESS
(mm)
X5R
1812
22.00
±10; ±20
16
3.5
2.50
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Product specification
Surface-Mount Ceramic Multilayer Capacitors
14
17
High-Capacitance X5R/X7R 6.3 V to 25 V
SOLDERING RECOMMENDATION
Table 13
SOLDERING
METHOD
SIZE
0402
0603
0805
1206
≥ 1210
Reflow
≥ 0.1 µF
≥ 1.0 µF
≥ 2.2 µF
≥ 4.7 µF
Reflow only
Reflow/Wave
< 0.1 µF
< 1.0 µF
< 2.2 µF
< 4.7 µF
---
TESTS AND REQUIREMENTS
Table 14 Test condition, procedure and requirements
TEST
TEST METHOD
PROCEDURE
REQUIREMENTS
Mounting
IEC 60384-22 4.3
The capacitors may be mounted on printed-circuit boards or
ceramic substrates
No visible damage
Visual
inspection and
dimension
check
4.4
Any applicable method using × 10 magnification
In accordance with
specification
4.5.1
Precondition: 150 +0/–10 °C for 1 hour, then keep for 48 ±1
hours at room temperature
Within specified tolerance
Capacitance
f = 1 kHz for C ≤10 µF: measuring voltage 1 Vrms at 20 °C
f = 120 Hz for C >10 µF: measuring voltage 0.5 Vrms at 20 °C
Dissipation
factor (D.F.)
4.5.2
Insulation
resistance
4.5.3
At Ur (DC) for 1 minute
In accordance with
specification
Voltage proof
4.5.4.2
2.5 × Ur for 1 minute
No breakdown or flashover
Temperature
characteristic
4.6
Between minimum and maximum temperature
In accordance with
specification
4.15
A force applied for 10 seconds to the line joining the
terminations and in a plane parallel to the substrate
for size ≥ 0603: a force of 5 N applied
for size 0402: a force of 2.5 N applied
No visible damage
4.8
Mounting in accordance with IEC 60384-22 paragraph 4.3
No visible damage
Conditions: bending 1 mm at a rate of 1 mm/s, radius jig 340
mm
X5R/X7R: lΔC/Cl: ≤ 10%
Adhesion
Bond strength
of plating on
end face
f = 1 kHz for C ≤10 µF: measuring voltage 1 Vrms at 20 °C
f = 120 Hz for C >10 µF: measuring voltage 0.5 Vrms at 20 °C
In accordance with
specification
Y5V: lΔC/Cl: ≤ 20%
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
High-Capacitance X5R/X7R 6.3 V to 25 V
15
17
Table 14 Test condition, procedure and requirements (continued)
TEST
Resistance to
soldering heat
TEST METHOD
4.9
PROCEDURE
REQUIREMENTS
Precondition: 150 +0/–10 °C for 1 hour, then keep for 24
±1 hours at room temperature
The termination shall be well
tinned
Preheating: for size ≤ 1206: 120 to 150 °C for 1 minute
X5R/X7R: lΔC/Cl: ≤ 10%
Preheating: for size >1206: 100 to 120 °C for 1 minute
and 170 to 200 °C for 1 minute
Y5V: lΔC/Cl: ≤ 20%
Solder bath temperature: 260 ±5 °C
Rins: within initial specified value
D.F.: within initial specified value
Dipping time: 10 ±0.5 seconds
Recovery time: 24 ±2 hours.
Solderability
4.10
Unmounted chips completely immersed in a solder bath at
235 ±5 °C
The termination shall be well
tinned.
Dipping time: size ≤ 1206 for 2 ±0.5 seconds; size > 1206
for 4 ±0.5 seconds
Rapid change
of
temperature
IEC 60384-22 4.11
Preconditioning;
150 +0/–10 °C for 1 hour, then keep for 24 ±1 hours at
room temperature
No visual damage
5 cycles with following detail:
30 minutes at lower category temperature;
30 minutes at upper category temperature
D.F.: within initial specified value
X5R/X7R: ≤ 15%
Y5V: ≤ 20%
Rins: within initial specified value
Recovery time 24 ±2 hours.
Damp heat
steady state
4.13
Initial measurements; after 150 +0/-10 °C for 1 hour, then
keep for 24 ±1 hours at room temperature
X5R/X7R: lΔC/Cl: ±20%
Duration and conditions: 500 ±12 hours at 40 ±2 °C;
90 to 95% RH
D.F.: 2 × initial value max.
Final measurement: perform a heat treatment at 150 +0/–
10 °C for 1 hour, final measurements shall be carried out
24 ±1 hours after recovery at room temperature without
load.
Endurance
4.14
Preconditioning;
Initial measurements; after 150 +0/-10 °C for 1 hour, then
keep for 24 ±1 hours at room temperature
Duration and conditions: 1,000 ±12 hours at upper
category temperature with 1.5 × Ur voltage applied
Final measurement: perform a heat treatment at 150 +0/–
10 °C for 1 hour, final measurements shall be carried out
24 ±1 hours after recovery at room temperature without
load.
Y5V: lΔC/Cl: ±30%
Rins: 1,000 MΩ or Rins × Cr ≥ 50
seconds, whichever is less
X5R/X7R: lΔC/Cl: ±20%
Y5V: lΔC/Cl: ±30%
D.F.: 2 × initial value max.
Rins: 1,000 MΩ or Rins × Cr ≥ 50
seconds, whichever is less
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
High-Capacitance X5R/X7R 6.3 V to 25 V
16
17
Table 14 Test condition, procedure and requirements (continued)
TEST
TEST METHOD
PROCEDURE
REQUIREMENTS
Resistance to
leaching
IEC 60384-10 4.10
Solder bath temperature: 260 ±5 °C
Using visual enlargement of × 10,
dissolution of the termination
shall not exceed 10%
Damp heat,
with Ur load
4.14
Dipping time 30 ±0.5 seconds
Initial measurements; after 150 +0/-10 °C for 1 hour, then
keep for 24 ±1 hours at room temperature
X5R/X7R: lΔC/Cl: ±20%
Duration and conditions: 500 ±12 hours at 40 ±2 °C;
90 to 95% RH; Ur applied
D.F.: 2 × initial value max.
Final measurement: perform a heat treatment at 150 +0/–
10 °C for 1 hour, final measurements shall be carried out
24 ±1 hours after recovery at room temperature without
load.
Y5V: lΔC/Cl: ±30%
Rins: 500 MΩ or Rins × Cr ≥ 25
seconds, whichever is less
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June 1, 2006 V.11
Product specification
Surface-Mount Ceramic Multilayer Capacitors
High-Capacitance X5R/X7R 6.3 V to 25 V
17
17
REVISION HISTORY
REVISION DATE
CHANGE NOTIFICATION
DESCRIPTION
Version 11
June 1, 2006
-
- X5R 0603 4.7 µF tolerance extension
Version 10
Feb 18, 2005
-
- Capacitance range extended
Version 9
Nov 17, 2004
-
- Extended capacitance 0.68 µF and 2.2 µF of X5R 0603 10 V
Version 8
Sep 29, 2004
-
- Revised 12NC ordering code of table 7-9
Version 7
Sep 20, 2004
-
- Rated voltage 6.3 V added to 0402/1210 and 25 V added to 1206
- Extend capacitance range: 4.7µF of 0603, 22µF of 1206, and 22µF of 1210
Version 6
Aug 13, 2004
-
- 0603 10 V 0.47 µF extended material with X5R
Version 5
Jul 06, 2004
-
- Revise the dimensions of 0603 and 0805
Version 4
May 10, 2004
-
- Extended capacitance 4.7 µF and 10 µF of X5R 0805 10 V
- Revised 12NC ordering code and Phycomp clear text code of table 2 & 3
Version 3
Mar 02, 2004
-
- Test and requirement revised.
Version 2
Feb 25, 2004
-
- Test and requirement revised.
Version 1
Sep 16, 2003
-
- Updated company logos
Version 0
Aug 16, 2002
-
-
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June 1, 2006 V.11