G3R20MT17K

G3R20MT17K 1700 V 20 mΩ SiC MOSFET TM Silicon Carbide MOSFET VDS = RDS(ON)(Typ.) = ID (TC = 100°C) = N-Channel Enhancement Mode Features • • • • • • • • Package D G3R™ Technology with +15 V Gate Drive Softer RDS(ON) v/s Temperature Dependency LoRing™ - Electromagnetically Optimized Design Smaller RG(INT) and Lower QG Low Device Capacitances (COSS, CRSS) Superior Cost-Performance Index Robust Body Diode with Low VF and Low QRR Industry-Leading UIL & Short-Circuit Robustness G RoHS KS S D = Drain G = Gate S = Source KS = Kelvin Source TO-247-4 Advantages • • • • • • • • 1700 V 20 mΩ 67 A REACH Applications Compatible with Commercial Gate Drivers Low Conduction Losses at all Temperatures Reduced Ringing Faster and More Efficient Switching Lesser Switching Spikes and Lower Losses Better Power Density and System Efficiency Ease of Paralleling without Thermal Runaway Superior Robustness and System Reliability • • • • • • • • EV Fast Charging Solar Inverters Industrial Motor Drives Transportation Industrial Power Supply Smart Grid and HVDC Induction Heating and Welding Pulsed Power Absolute Maximum Ratings (At TC = 25°C Unless Otherwise Stated) Parameter Drain-Source Voltage Gate-Source Voltage (Dynamic) Gate-Source Voltage (Static) Symbol VDS(max) VGS(max) VGS(op) Continuous Forward Current ID Pulsed Drain Current Power Dissipation Non-Repetitive Avalanche Energy Operating and Storage Temperature ID(pulse) PD EAS Tj , Tstg Conditions VGS = 0 V, ID = 100 µA Recommended Operation TC = 25°C, VGS = -5 / +15 V TC = 100°C, VGS = -5 / +15 V TC = 135°C, VGS = -5 / +15 V tP ≤ 3µs, D ≤ 1%, VGS = 15 V, Note 1 Tc = 25°C L = 2.0 mH, IAS = 37.5 A Values 1700 -10 / +20 -5 / +15 95 67 49 250 569 1410 -55 to 175 Unit V V V Note A Fig. 15 A W mJ °C Fig. 14 Fig. 16 Unit Note °C/W g Nm Fig. 13 Thermal/Package Characteristics Parameter Symbol Thermal Resistance, Junction - Case Weight Mounting Torque RthJC WT TM Conditions Min. Values Typ. 0.20 6.2 Screws to Heatsink Max. 0.26 1.1 Note 1: Pulse Width tP Limited by Tj(max) Rev 21/May Latest Version at: www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K.pdf Page 1 of 14 G3R20MT17K 1700 V 20 mΩ SiC MOSFET TM Electrical Characteristics (At TC = 25°C Unless Otherwise Stated) Parameter Symbol Conditions Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VDSS IDSS Gate Source Leakage Current IGSS VGS = 0 V, ID = 100 µA VDS = 1700 V, VGS = 0 V VDS = 0 V, VGS = 20 V VDS = 0 V, VGS = -10 V VDS = VGS, ID = 60.0 mA VDS = VGS, ID = 60.0 mA, Tj = 175°C VDS = 10 V, ID = 75 A VDS = 10 V, ID = 75 A, Tj = 175°C VGS = 15 V, ID = 75 A VGS = 15 V, ID = 75 A, Tj = 175°C Gate Threshold Voltage VGS(th) Transconductance gfs Drain-Source On-State Resistance RDS(ON) Input Capacitance Output Capacitance Reverse Transfer Capacitance Coss Stored Energy Coss Stored Charge Effective Output Capacitance (Energy Related) Effective Output Capacitance (Time Related) Gate-Source Charge Gate-Drain Charge Total Gate Charge Internal Gate Resistance Turn-On Switching Energy (Body Diode) Turn-Off Switching Energy (Body Diode) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Ciss Coss Crss Eoss Qoss VDS = 1000 V, VGS = 0 V f = 1 MHz, VAC = 25mV Min. 1700 Values Typ. 100 -100 1.8 2.70 1.90 37.9 39.0 20 45 7620 205 36.4 136 410 272 Co(tr) 410 EOn EOff td(on) tr td(off) tf VDS = 1000 V, VGS = -5 / +15 V ID = 75 A Per IEC607478-4 f = 1 MHz, VAC = 25 mV Tj = 25°C, VGS = -5/+15V, RG(ext) = 0.5 Ω, L = 32.0 µH, ID = 75 A, VDD = 1200 V VDD = 1200 V, VGS = -5/+15V RG(ext) = 0.5 Ω, L = 32.0 µH, ID = 75 A Timing relative to VDS, Inductive load 77 90 256 1.8 Unit Note V µA 1 Co(er) Qgs Qgd Qg RG(int) Max. 28 nA V Fig. 9 S Fig. 4 mΩ Fig. 5-8 pF Fig. 11 µJ nC Fig. 12 pF Note 2 nC Fig. 10 Ω 892 µJ Fig. 22,26 ns Fig. 24 490 52 32 38 24 *The chip technology was characterized up to 200 V/ns. The measured dV/dt was limited by measurement test setup and package. Note 2: Co(er), a lumped capacitance that gives same stored energy as C OSS while V DS is rising from 0 to 1000V. Co(tr), a lumped capacitance that gives same charging times as COSS while V DS is rising from 0 to 1000V. Rev 21/May Latest Version at: www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K.pdf Page 2 of 14 G3R20MT17K 1700 V 20 mΩ SiC MOSFET TM Reverse Diode Characteristics Parameter Diode Forward Voltage Continuous Diode Forward Current Diode Pulse Current Reverse Recovery Time Reverse Recovery Charge Peak Reverse Recovery Current Reverse Recovery Time Reverse Recovery Charge Peak Reverse Recovery Current Rev 21/May Symbol VSD IS IS(pulse) trr Qrr Irrm trr Qrr Irrm Conditions VGS = -5 V, ISD = 37 A VGS = -5 V, ISD = 37 A, Tj = 175°C VGS = -5 V, Tc = 100°C VGS = -5 V, Note 1 VGS = -5 V, ISD = 75 A, VR = 1200 V dif/dt = 800 A/µs, Tj = 25°C VGS = -5 V, ISD = 75 A, VR = 1200 V dif/dt = 800 A/µs, Tj = 175°C Min. Values Typ. 4.4 4.2 58 232 63 752 21 108 2820 45 Latest Version at: www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K.pdf Max. Unit Note V Fig. 17-18 A A ns nC A ns nC A Page 3 of 14 G3R20MT17K 1700 V 20 mΩ SiC MOSFET Figure 1: Output Characteristics (Tj = 25°C) ID = f(VDS, VGS); tP = 250 µs Figure 3: Output Characteristics (VGS = 15 V) ID = f(VDS, T); j tP = 250 µs Rev 21/May TM Figure 2: Output Characteristics (Tj = 175°C) ID = f(VDS, VGS); tP = 250 µs Figure 4: Transfer Characteristics (VDS = 10 V) ID = f(VGS, T); j tP = 100 µs Latest Version at: www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K.pdf Page 4 of 14 G3R20MT17K 1700 V 20 mΩ SiC MOSFET Figure 5: On-State Resistance v/s Temperature RDS(ON) = f(T,j VGS); tP = 250 µs; ID = 75 A Figure 7: Normalized On-State Resistance v/s Temperature RDS(ON) = f(T); j tP = 250 µs; ID = 75 A; VGS = 15 V Rev 21/May TM Figure 6: On-State Resistance v/s Drain Current RDS(ON) = f(T,I j D); tP = 250 µs; VGS = 15 V Figure 8: On-State Resistance v/s Gate Voltage RDS(ON) = f(T,V j GS); tP = 250 µs; I D = 75 A Latest Version at: www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K.pdf Page 5 of 14 G3R20MT17K 1700 V 20 mΩ SiC MOSFET Figure 9: Threshold Voltage Characteristics VGS(th) = f(T); j VDS = VGS; ID = 60.0 mA Figure 11: Capacitance v/s Drain-Source Voltage f = 1 MHz; VAC = 25mV Rev 21/May TM Figure 10: Gate Charge Characteristics ID = 75 A; VDS = 1000 V; Tc = 25°C Figure 12: Output Capacitor Stored Energy Eoss = f(VDS) Latest Version at: www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K.pdf Page 6 of 14 G3R20MT17K 1700 V 20 mΩ SiC MOSFET Figure 13: Transient Thermal Impedance Zth,jc = f(tP,D); D = tP/T Figure 15: Current De-rating Curve ID = f(TC); Tj ≤ 175°C Rev 21/May TM Figure 14: Safe Operating Area (Tc = 25°C) ID = f(VDS, tP); Tj ≤ 175°C; D = 0 Figure 16: Power De-rating Curve PD = f(TC); Tj ≤ 175°C Latest Version at: www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K.pdf Page 7 of 14 G3R20MT17K 1700 V 20 mΩ SiC MOSFET Figure 17: Body Diode Characteristics (Tj = 25°C) ID = f(VDS, VGS); tP = 250 µs Figure 19: Third Quadrant Characteristics (Tj = 25°C) ID = f(VDS, VGS); tP = 250 µs Rev 21/May TM Figure 18: Body Diode Characteristics (Tj = 175°C) ID = f(VDS, VGS); tP = 250 µs Figure 20: Third Quadrant Characteristics (Tj = 175°C) ID = f(VDS, VGS); tP = 250 µs Latest Version at: www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K.pdf Page 8 of 14 G3R20MT17K 1700 V 20 mΩ SiC MOSFET Figure 21: Inductive Switching Energy v/s Drain Current (VDD = 1000V) Tj = 25°C; VGS = -5/+15V; RG(ext) = 0.5 Ω; L = 32.0µH Figure 23: Inductive Switching Energy v/s RG(ext) (VDD = 1200V) Tj = 25°C; VGS = -5/+15V; IDS = 75 A; L = 32.0µH Rev 21/May TM Figure 22: Inductive Switching Energy v/s Drain Current (VDD = 1200V) Tj = 25°C; VGS = -5/+15V; RG(ext) = 0.5 Ω; L = 32.0µH Figure 24: Switching Time v/s RG(ext) (VDD = 1200V) Tj = 25°C; VGS = -5/+15V; IDS = 75 A; L = 32.0µH Latest Version at: www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K.pdf Page 9 of 14 G3R20MT17K 1700 V 20 mΩ SiC MOSFET Figure 25: Inductive Switching Energy v/s Temperature (VDD = 1200V) Tj = 25°C; VGS = -5/+15V; RG(ext) = 0.5 Ω; IDS = 75 A; L = 32.0µH Rev 21/May TM Figure 26: dV/dt v/s RG(ext) (VDD = 1200V) Tj = 25°C; VGS = -5/+15V; IDS = 75 A; L = 32.0µH Latest Version at: www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K.pdf Page 10 of 14 G3R20MT17K 1700 V 20 mΩ SiC MOSFET TM Gate Charge Circuit Gate Charge Waveform VGS D.U.T RLoad VDD ID IG(cont) Gate Voltage (VGS) VDS QGD QGS Gate Charge (QG) Switching Time Circuit Switching Time Waveform 90% Same device as the D.U.T. LLoad -5 V VGS 10% VDS VGS 10% 10% VDS VDD D.U.T. RG 90% ID td(on) td(off) tr ton Rev 21/May 90% Latest Version at: www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K.pdf tf toff Page 11 of 14 G3R20MT17K 1700 V 20 mΩ SiC MOSFET TM Switching Energy Circuit Switching Energy Waveform EOFF = ∫ ID x VDS x dt EON = ∫ ID x VDS x dt Same device as the D.U.T. LLoad -5 V Irr VDS VDS VGS VDD D.U.T. RG ID IDS Reverse Recovery Circuit Reverse Recovery Waveform D.U.T. LLoad -5 V IF trr IF 0 Level VGS RG Same device as the D.U.T. 90% VDD Irr dIrr/dt in 10% to 90% range 10% Rev 21/May Latest Version at: www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K.pdf Page 12 of 14 G3R20MT17K 1700 V 20 mΩ SiC MOSFET TM Package Dimensions TO-247-4 Package Outline 0.19(4.83) 0.205(5.21) 0.62(15.75) 0.635(16.13) 0.5(12.7) 0.216(5.49) 0.236(6.0) 0.25(6.35) 0.487(12.38) 0.529(13.43) 0.075(1.91) 0.085(2.16) 0.037(0.95) 0.049(1.25) 0.237(6.04) 0.248(6.30) 0.145(3.68) 0.2(5.10) 0.917(23.30) 0.929(23.60) 0.516(13.10) 0.557(14.15) 0.64(16.25) 0.695(17.65) Ø 0.138(3.51) Ø 0.144(3.65) 0.118(3.0) Ø 0.283(7.18) REF 0.093(2.35) 0.104(2.65) 0.681(17.31) 0.701(17.82) 0.09(2.29) 0.1(2.54) 0.156(3.97) 0.172(4.37) 0.1(2.54) BSC 0.042(1.07) 0.052(1.33) 0.2 (5.08) BSC Recommended Solder Pad Layout 0.021(0.55) 0.027(0.68) 0.042(1.07) 0.063(1.60) 0.094(2.39) 0.116(2.94) Package View Case(D) Ø 0.088(2.24) Ø 0.067(1.7) 0.1(2.54) 0.1(2.54) 0.2(5.08) G D S KS NOTE 1. CONTROLLED DIMENSION IS INCH. DIMENSION IN BRACKET IS MILLIMETER. 2. DIMENSIONS DO NOT INCLUDE END FLASH, MOLD FLASH, MATERIAL PROTRUSIONS. 3. THE SOURCE AND KELVIN-SOURCE PINS ARE NOT INTERCHANGABLE. THEIR EXCHANGE MIGHT LEAD TO MALFUNCTION. Rev 21/May Latest Version at: www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K.pdf Page 13 of 14 G3R20MT17K 1700 V 20 mΩ SiC MOSFET TM Compliance RoHS Compliance The levels of RoHS restricted materials in this product are below the maximum concentration values (also referred to as the threshold limits) permitted for such substances, or are used in an exempted application, in accordance with EU Directive 2011/65/EC (RoHS 2), as adopted by EU member states on January 2, 2013 and amended on March 31, 2015 by EU Directive 2015/863. RoHS Declarations for this product can be obtained from your GeneSiC representative. REACH Compliance REACH substances of high concern (SVHCs) information is available for this product. Since the European Chemical Agency (ECHA) has published notice of their intent to frequently revise the SVHC listing for the foreseeable future, please contact a GeneSiC representative to insure you get the most up-to-date REACH SVHC Declaration. REACH banned substance information (REACH Article 67) is also available upon request. Disclaimer GeneSiC Semiconductor, Inc. reserves right to make changes to the product specifications and data in this document without notice. GeneSiC disclaims all and any warranty and liability arising out of use or application of any product. No license, express or implied to any intellectual property rights is granted by this document. Unless otherwise expressly indicated, GeneSiC products are not designed, tested or authorized for use in life-saving, medical, aircraft navigation, communication, air traffic control and weapons systems, nor in applications where their failure may result in death, personal injury and/or property damage. Related Links • SPICE Models: https://www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K_SPICE.zip • PLECS Models: https://www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K_PLECS.zip • CAD Models: https://www.genesicsemi.com/sic-mosfet/G3R20MT17K/G3R20MT17K_3D.zip • Gate Driver Reference: https://www.genesicsemi.com/technical-support • Evaluation Boards: https://www.genesicsemi.com/technical-support • Reliability: https://www.genesicsemi.com/reliability • Compliance: https://www.genesicsemi.com/compliance • Quality Manual: https://www.genesicsemi.com/quality Revision History • Rev 21/May: Updated switching time and switching energy data • Supersedes: Rev 20/Jun, Rev 20/Sep, Rev 21/Feb www.genesicsemi.com/sic-mosfet/ Rev 21/May Copyright© 2021 GeneSiC Semiconductor Inc. All Rights Reserved. Published by GeneSiC Semiconductor, Inc. 43670 Trade Center Place Suite 155, Dulles, VA 20166; USA Page 14 of 14