74AXP2T45DCH

74AXP2T45 2-bit dual supply translating transceiver; 3-state Rev. 1 — 19 March 2020 Product data sheet 1. General description The 74AXP2T45 is a 2-bit, dual supply transceiver with 3-state outputs that enables bidirectional level translation. It features two 2-bit input-output ports (nA and nB), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.9 V and 5.5 V making the device suitable for translating between any of the low voltage nodes (0.9 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). No power supply sequencing is required and output glitches during power supply transitions are prevented using patented circuitry. As a result glitches will not appear on the outputs for supply transitions during power-up/down between 20 mV/μs and 5.5 V/s. Pins A and DIR are referenced to VCC(A) and pin B is referenced to VCC(B). A HIGH on DIR allows transmission from A to B and a LOW on DIR allows transmission from B to A. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both A and B are in the high-impedance OFF-state. 2. Features and benefits • • • • • • • • • • • • • Wide supply voltage range: • VCC(A): 0.9 V to 5.5 V • VCC(B): 0.9 V to 5.5 V Low input capacitance; CI = 1.4 pF (typical) Low output capacitance; CO = 4.4 pF (typical) Low dynamic power consumption; CPD = 11 pF (typical) Low static power consumption; ICC = 2 μA (25 °C maximum) High noise immunity Complies with JEDEC standard: • JESD8-12 (1.1 V to 1.3 V; inputs) • JESD8-11 (1.4 V to 1.6 V) • JESD8-7 (1.65 V to 1.95 V) • JESD8-5 (2.3 V to 2.7 V) • JESD8C (2.7 V to 3.6 V) • JESD12-6 (4.5 V to 5.5 V) ESD protection: • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2 kV • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1 kV Latch-up performance exceeds 100 mA per JESD78D Class II Inputs accept voltages up to 5.5 V Low noise overshoot and undershoot < 10% of VCCO IOFF circuitry provides partial power-down mode operation Specified from -40 °C to +125 °C 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AXP2T45DC -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74AXP2T45GX -40 °C to +125 °C X2SON8 plastic thermal enhanced extremely thin small outline package; no leads; 8 terminals; body 1.35 × 0.8 × 0.35 mm SOT1233 4. Marking Table 2. Marking Type number Marking code[1] 74AXP2T45DC R5 74AXP2T45GX R5 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram DIR 1A 5 DIR 2 1A 7 2A 1B 1B 3 2A 6 VCC(A) 2B 2B VCC(B) VCC(A) 001aag577 Fig. 1. Logic symbol 74AXP2T45 Product data sheet VCC(B) 001aag578 Fig. 2. Logic diagram All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 2 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state 6. Pinning information 6.1. Pinning 74AXP2T45 VCC(A) 1 7 1B 6 2B 5 DIR 8 VCC(B) 74AXP2T45 1A VCC(A) 1 8 VCC(B) 1A 2 7 1B 2A 3 6 2B GND 4 5 DIR 4 GND 2A 3 aaa-029972 Transparent top view aaa-029971 Fig. 3. 2 Pin configuration SOT765-1 (VSSOP8) Fig. 4. Pin configuration SOT1233 (X2SON8) 6.2. Pin description Table 3. Pin description Symbol Pin Description VCC(A) 1 supply voltage A (nA, and DIR are referenced to VCC(A)) 1A 2 data input or output 2A 3 data input or output GND 4 ground (0 V) DIR 5 direction control 2B 6 data input or output 1B 7 data input or output VCC(B) 8 supply voltage B (nB is referenced to VCC(B)) 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Supply voltage Input Input/output [1] VCC(A), VCC(B) DIR[2] nA[2] nB[2] 0.9 V to 5.5 V L nA = nB input 0.9 V to 5.5 V H input nB = nA GND[1] X Z Z [1] [2] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode. nA and DIR are referenced to VCC(A); nB is referenced to VCC(B). 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 3 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC(A) Conditions Min Max Unit supply voltage A -0.5 +6.5 V VCC(B) supply voltage B -0.5 +6.5 V IIK input clamping current VI input voltage IOK output clamping current VO < 0 V VO output voltage Active mode VI < 0 V [1] +6.5 -20 - [1] [2] [3] -0.5 Suspend or 3-state mode [1] -0.5 [2] IO output current VO = 0 V to VCCO ICC supply current ICC(A) or ICC(B); per VCC pin IGND ground current per GND pin Tstg storage temperature Ptot total power dissipation [1] [2] [3] [4] [5] -20 -0.5 mA V mA VCCO + 0.5 V +6.5 V - ±25 mA - 100 mA -100 - mA -65 +150 °C Tamb = -40 °C to +125 °C For SOT765-1 package [4] - 250 mW For SOT1233 package [5] - 300 mW The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed. VCCO is the supply voltage associated with the output port. VCCO + 0.5 V should not exceed 6.5 V. For SOT765-1 (VSSOP8) package: Ptot derates linearly with 4.9 mW/K above 99 °C. For SOT1233 (X2SON8) package: Ptot derates linearly with 7.7 mW/K above 118 °C. 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Conditions Min Max Unit VCC(A) supply voltage A 0.9 5.5 V VCC(B) supply voltage B 0.9 5.5 V VI input voltage 0 5.5 V VO output voltage 0 VCCO V 0 5.5 V -40 +125 °C Active mode [1] Suspend or 3-state mode Tamb ambient temperature Δt/ΔV input transition rise and fall rate [1] [2] VCCI = 0.9 V - 20 ns/V VCCI = 1.2 V [2] - 20 ns/V VCCI = 1.4 V to 1.95 V - 20 ns/V VCCI = 2.3 V to 2.7 V - 20 ns/V VCCI = 3 V to 3.6 V - 10 ns/V VCCI = 4.5 V to 5.5 V - 8 ns/V VCCO is the supply voltage associated with the output port. VCCI is the supply voltage associated with the input port. 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 4 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state 10. Static characteristics Table 7. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH VIL Parameter HIGH-level input voltage LOW-level input voltage -40 °C to +125 °C Conditions HIGH-level output voltage 74AXP2T45 Product data sheet -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Max Max VCCI = 0.9 V 0.7VCCI - - - - V VCCI = 1.1 V to 1.95 V 0.65VCCI - - - - V VCCI = 2.3 V to 2.7 V 1.6 - - - - V VCCI = 3.0 V to 3.6 V 2.0 - - - - V VCCI = 4.5 V to 5.5 V 0.7VCCI - - - - V VCCI = 0.9 V - - 0.3VCCI 0.3VCCI 0.3VCCI V VCCI = 1.1 V to 1.95 V - - 0.35VCCI 0.35VCCI 0.35VCCI V VCCI = 2.3 V to 2.7 V - - 0.7 0.7 0.7 V VCCI = 3.0 V to 3.6 V - - 0.8 0.8 0.8 V - - 0.3VCCI 0.3VCCI 0.3VCCI V VCCO - 0.1 0.9 - - - V IO = -1.5 mA; VCCO = 1.1 V 0.825 - - - - V IO = -3 mA; VCCO = 1.4 V 1.05 - - - - V IO = -4.5 mA; VCCO = 1.65 V 1.2 - - - - V IO = -8 mA; VCCO = 2.3 V 1.7 - - - - V IO = -10 mA; VCCO = 3.0 V 2.2 - - - - V IO = -12 mA; VCCO = 4.5 V 3.7 - - - - V nA, nB and DIR input nA, nB and DIR input [1] [1] VCCI = 4.5 V to 5.5 V VOH +25 °C VI = VIH IO = -0.1 mA; VCCO = 0.9 V to 5.5 V [2] [3] All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 5 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state Symbol VOL Parameter LOW-level output voltage -40 °C to +125 °C Conditions VI = VIL +25 °C Min Typ Max -40 °C to +85 °C -40 °C to +125 °C Max Max Unit [2] IO = 0.1 mA; VCCO = 0.9 V to 5.5 V - 0 0.1 0.1 0.1 V IO = 1.5 mA; VCCO = 1.1 V [3] - - 0.275 0.275 0.275 V IO = 3 mA; VCCO = 1.4 V - - 0.35 0.35 0.35 V IO = 4.5 mA; VCCO = 1.65 V - - 0.45 0.45 0.45 V IO = 8 mA; VCCO = 2.3 V - - 0.7 0.7 0.7 V IO = 10 mA; VCCO = 3.0 V - - 0.8 0.8 0.8 V IO = 8 mA; VCCO = 4.5 V - - 0.5 0.5 0.5 V IO = 12 mA; VCCO = 4.5 V - - 0.8 0.8 0.8 V - - ±0.1 ±0.5 ±1 μA II input leakage current DIR input; VI = 0 V to 5.5 V; VCCI = 0.9 V to 5.5 V IOZ OFF-state output current A or B port; VO = 0 V or VCCO; VCCO = 0.9 V to 5.5 V [2] - - ±0.1 ±0.5 ±2 μA suspend mode A port; VO = 0 V or VCCO; VCC(A) = 5.5 V; VCC(B) = 0 V [2] - - ±0.1 ±0.5 ±2 μA suspend mode B port; VO = 0 V or VCCO; VCC(A) = 0 V; VCC(B) = 5.5 V [2] - - ±0.1 ±0.5 ±2 μA - - 0.1 0.5 2 μA A port; VI or VO = 0 V to 5.5 V; VCC(A) = 0 V; VCC(B) = 0.9 V to 5.5 V - - 0.1 0.5 2 μA B port; VI or VO = 0 V to 5.5 V; VCC(B) = 0 V; VCC(A) = 0.9 V to 5.5 V - - 0.1 0.5 2 μA - - ±0.1 ±0.5 ±2 μA - - ±0.1 ±0.5 ±2 μA - - ±0.1 ±0.5 ±2 μA IOFF ΔIOFF DIR input; VI = 0 V to 5.5 V; VCC(A) = 0 V; power-off leakage current VCC(B) = 0.9 V to 5.5 V DIR input; VI = 0 V or 5.5 V; VCC(A) = 0 V to 0.1 V; additional VCC(B) = 0.9 V to 5.5 V power-off leakage current A port; V = 0 V or 5.5 V; V O CC(A) = 0 V to 0.1 V; VCC(B) = 0.9 V to 5.5 V; VI = 0 V or 5.5 V B port; VO = 0 V or 5.5 V; VCC(B) = 0 V to 0.1 V; VCC(A) = 0.9 V to 5.5 V; VI = 0 V or 5.5 V 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 6 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state Symbol ICC Parameter supply current -40 °C to +125 °C Conditions +25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Max Max VCC(A), VCC(B) = 0.9 V to 5.5 V - - 2 5 13 μA VCC(A) = 5.5 V; VCC(B) = 0 V - - 2 5 13 μA VCC(A) = 0 V; VCC(B) = 5.5 V - - ±0.1 ±0.4 ±1 μA VCC(A), VCC(B) = 0.9 V to 5.5 V - - 2 5 13 μA VCC(B) = 5.5 V; VCC(A) = 0 V - - 2 5 13 μA VCC(B) = 0 V; VCC(A) = 5.5 V - - ±0.1 ±0.4 ±1 μA - 2 100 150 200 μA A port; VI = 0 V or VCCI; IO = 0 A [1] B port; VI = 0 V or VCCI; IO = 0 A ΔICC [1] [2] [3] [4] additional supply current per input; other pins at VCCI or ground (0 V); IO = 0 A; VCC(A), VCC(B) = 4.5 V to 5.5 V; VI = VCCI - 0.6 V [4] VCCI is the supply voltage associated with the control input or input port. VCCO is the supply voltage associated with the output port. Typical values for VOL and VOH are measured at VCCO is 0.9 V. Typical values for ΔICC are measured at VCC(A), VCC(B) = 5 V. 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 7 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state Table 8. Typical total supply current ICC(A) at Tamb = 25 °C Voltages are referenced to GND (ground = 0 V). VCC(A) VCC(B) Unit 0V 0.9 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V 0V 0.00 0.01 0.01 0.01 0.01 0.01 0.01 0.01 μA 0.9 V 0.01 0.08 0.08 0.08 0.08 0.08 0.08 0.08 μA 1.2 V 0.01 0.10 0.10 0.10 0.10 0.10 0.10 0.10 μA 1.5 V 0.01 0.13 0.13 0.13 0.13 0.13 0.13 0.13 μA 1.8 V 0.01 0.16 0.16 0.16 0.16 0.16 0.16 0.16 μA 2.5 V 0.01 0.22 0.22 0.22 0.22 0.22 0.22 0.22 μA 3.3 V 0.01 0.29 0.29 0.29 0.29 0.29 0.29 0.29 μA 5.0 V 0.01 0.44 0.44 0.44 0.44 0.44 0.44 0.44 μA Table 9. Typical total supply current ICC(B) at Tamb = 25 °C Voltages are referenced to GND (ground = 0 V). VCC(A) VCC(B) Unit 0V 0.9 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V 0V 0.00 0.01 0.01 0.01 0.01 0.01 0.01 0.01 μA 0.9 V 0.01 0.08 0.10 0.13 0.16 0.22 0.29 0.44 μA 1.2 V 0.01 0.08 0.10 0.13 0.16 0.22 0.29 0.44 μA 1.5 V 0.01 0.08 0.10 0.13 0.16 0.22 0.29 0.44 μA 1.8 V 0.01 0.08 0.10 0.13 0.16 0.22 0.29 0.44 μA 2.5 V 0.01 0.08 0.10 0.13 0.16 0.22 0.29 0.44 μA 3.3 V 0.01 0.08 0.10 0.13 0.16 0.22 0.29 0.44 μA 5.0 V 0.01 0.08 0.10 0.13 0.16 0.22 0.29 0.44 μA 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 8 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state 11. Dynamic characteristics Table 10. Typical dynamic characteristics at VCC(A) = 0.9 V and Tamb = 25 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6. Symbol Parameter tpd propagation delay tdis disable time ten [1] enable time Conditions VCC(B) Unit 0.9 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V nA to nB [1] 40 22 18.5 16.5 15 15 15 ns nB to nA [1] 40 33 32 31 31 31 32 ns DIR to nA [1] 34 34 34 34 34 34 34 ns DIR to nB [1] 42 30 26 26 24 25 23 ns DIR to nA [1] 82 63 58 57 55 56 55 ns DIR to nB [1] 74 56 53 51 49 49 49 ns tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. Table 11. Typical dynamic characteristics at VCC(B) = 0.9 V and Tamb = 25 °C Voltages are referenced to GND (ground = 0 V); for test circuit see ; for waveforms see Fig. 5 and Fig. 6. Symbol Parameter Conditions 0.9 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V tpd propagation delay nA to nB [1] 40 33 32 31 31 31 32 ns nB to nA [1] 40 22 18.5 16.5 15 15 15 ns DIR to nA [1] 34 16 11 10 7.0 7.7 5.3 ns DIR to nB [1] 42 31 28 28 27 27 27 ns DIR to nA [1] 82 53 47 45 42 42 42 ns DIR to nB [1] 74 49 43 41 38 39 37 ns tdis disable time ten [1] enable time VCC(A) Unit tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. Table 12. Typical dynamic characteristics at Tamb = 25 °C [1] [2]Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7. Symbol Parameter Conditions VCC(A) and VCC(B) Unit 0.9 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 5.0 V CPD power dissipation capacitance A port: (direction nA to nB); B port: (direction nB to nA) 1.5 1.6 1.7 1.8 1.9 2.2 2.7 pF A port: (direction nB to nA); B port: (direction nA to nB) 9.7 10.2 10.3 10.4 10.7 11 11.9 pF CI input capacitance VI = 0 V or VCCI; VCCI = 0 V to 5.5 V 1.4 1.4 1.4 1.4 1.4 1.4 1.4 pF CI/O input/output capacitance VO = 0 V; VCCO = 0 V 4.4 4.4 4.4 4.4 4.4 4.4 4.4 pF [1] [2] CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD x VCC x fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL x VCC x fo) = sum of the outputs. fi = 1 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω. 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 9 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state Table 13. Dynamic characteristics for temperature range -40 °C to +85 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6. Symbol tpd Parameter Conditions VCC(B) Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V Min Max Min Max Min Max Min Max Min Max Min Max 4.0 38 3.6 25 3.4 21 3.1 16 2.9 14.5 2.7 14.5 ns VCC(A) = 1.5 V ± 0.1 V 3.5 33 3.0 21 2.8 16.5 2.6 12.5 2.4 10.5 2.2 9.8 ns VCC(A) = 1.8 V ± 0.15 V 3.1 32 2.7 19 2.4 15 2.2 11 2.1 9.0 1.9 8.2 ns VCC(A) = 2.5 V ± 0.2 V 2.8 31 2.4 17.5 2.1 13.5 1.9 9.1 1.7 7.5 1.6 6.6 ns VCC(A) = 3.3 V ± 0.3 V 2.7 31 2.3 17 2.0 13 1.8 8.5 1.6 6.9 1.4 5.8 ns VCC(A) = 5.0 V ± 0.5 V 2.7 31 2.2 16.5 1.9 12.5 1.6 8.1 1.4 6.4 1.2 5.0 ns VCC(A) = 1.2 V ± 0.1 V 4.0 38 3.5 33 3.1 32 2.8 31 2.7 31 2.7 31 ns VCC(A) = 1.5 V ± 0.1 V 3.6 25 3.0 21 2.7 19 2.4 17.5 2.3 17 2.2 16.5 ns VCC(A) = 1.8 V ± 0.15 V 3.4 21 2.8 16.5 2.4 15 2.1 13.5 2.0 13 1.9 12.5 ns VCC(A) = 2.5 V ± 0.2 V 3.1 16 2.6 12.5 2.2 11 1.9 9.1 1.8 8.5 1.6 8.1 ns VCC(A) = 3.3 V ± 0.3 V 2.9 14.5 2.4 10.5 2.1 9.0 1.7 7.5 1.6 6.9 1.4 6.4 ns VCC(A) = 5.0 V ± 0.5 V 2.7 14.5 2.2 9.8 1.9 8.2 1.6 6.6 1.4 5.8 1.2 5.0 ns propagation nA to nB delay VCC(A) = 1.2 V ± 0.1 V [1] nB to nA 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 10 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state Symbol ten Parameter enable time Conditions VCC(B) Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V Min Max Min Max Min Max Min Max Min Max Min Max VCC(A) = 1.2 V ± 0.1 V 9.6 67.3 9.6 67.3 9.6 67.3 9.6 67.3 9.6 67.3 9.6 67.3 ns VCC(A) = 1.5 V ± 0.1 V 7.4 37.5 7.4 37.5 7.4 37.5 7.4 37.5 7.4 37.5 7.4 37.5 ns VCC(A) = 1.8 V ± 0.15 V 6.7 29 6.7 29 6.7 29 6.7 29 6.7 29 6.7 29 ns VCC(A) = 2.5 V ± 0.2 V 4.9 19 4.9 19 4.9 19 4.9 19 4.9 19 4.9 19 ns VCC(A) = 3.3 V ± 0.3 V 5.3 17.3 5.3 17.3 5.3 17.3 5.3 17.3 5.3 17.3 5.3 17.3 ns VCC(A) = 5.0 V ± 0.5 V 3.7 12 3.7 12 3.7 12 3.7 12 3.7 12 3.7 12 ns VCC(A) = 1.2 V ± 0.1 V 8.9 58.3 8.5 49.3 8.3 47 8.0 45.8 7.8 45 7.6 44.7 ns VCC(A) = 1.5 V ± 0.1 V 7.4 45.2 6.9 32.5 6.7 29.8 6.5 27.2 6.3 26.6 6.1 26 ns VCC(A) = 1.8 V ± 0.15 V 7.1 42 6.7 28.9 6.4 26.2 6.2 23.9 6.1 23 5.9 22.5 ns VCC(A) = 2.5 V ± 0.2 V 5.7 37 5.3 25 5.0 22.5 4.8 20.1 4.6 19 4.5 18.4 ns VCC(A) = 3.3 V ± 0.3 V 6.2 37.2 5.8 23.8 5.5 21.2 5.3 18.6 5.1 17.7 4.9 17.1 ns VCC(A) = 5.0 V ± 0.5 V 5.1 33.7 4.6 21 4.3 18.2 4.0 15.7 3.8 14.6 3.6 13.9 ns DIR to nA [1] DIR to nB 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 11 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state Symbol Parameter Conditions Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V Min Max Min Max Min Max Min Max Min Max Min Max VCC(A) = 1.2 V ± 0.1 V 4.9 31 4.9 31 4.9 31 4.9 31 4.9 31 4.9 31 ns VCC(A) = 1.5 V ± 0.1 V 3.9 17.8 3.9 17.8 3.9 17.8 3.9 17.8 3.9 17.8 3.9 17.8 ns VCC(A) = 1.8 V ± 0.15 V 4.0 15.9 4.0 15.9 4.0 15.9 4.0 15.9 4.0 15.9 4.0 15.9 ns VCC(A) = 2.5 V ± 0.2 V 2.9 12.9 2.9 12.9 2.9 12.9 2.9 12.9 2.9 12.9 2.9 12.9 ns VCC(A) = 3.3 V ± 0.3 V 3.5 12.3 3.5 12.3 3.5 12.3 3.5 12.3 3.5 12.3 3.5 12.3 ns VCC(A) = 5.0 V ± 0.5 V 2.4 9.6 2.4 9.6 2.4 9.6 2.4 9.6 2.4 9.6 2.4 9.6 ns VCC(A) = 1.2 V ± 0.1 V 5.6 36.8 4.8 27.9 5.1 26.7 4.4 22.8 5.1 23.5 4.1 20.7 ns VCC(A) = 1.5 V ± 0.1 V 5.1 32.3 4.4 23.1 4.6 21.8 3.8 17.6 4.6 18.5 3.6 15.8 ns VCC(A) = 1.8 V ± 0.15 V 4.7 30.9 4.0 21.5 4.3 20 3.4 16 4.2 15.5 3.3 13.2 ns VCC(A) = 2.5 V ± 0.2 V 4.3 29 3.6 20 3.9 17.7 3.0 14 3.9 14.3 2.9 10.7 ns VCC(A) = 3.3 V ± 0.3 V 4.2 28.9 3.5 19 3.7 16.7 2.9 12.6 3.7 13 2.7 10.3 ns VCC(A) = 5.0 V ± 0.5 V 4.1 27.8 3.3 18.9 3.6 16.5 2.7 12.4 3.5 12.4 2.5 9.4 ns 1.0 - 1.0 - 1.0 - 1.0 - 1.0 - 1.0 - ns disable time DIR to nA tdis VCC(B) [1] DIR to nB tt [1] transition time nA, nB output VCC(A) = 1.1 V to 5.5 V tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 12 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state Table 14. Dynamic characteristics for temperature range -40 °C to +125 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6. Symbol tpd Parameter Conditions VCC(B) Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V Min Max Min Max Min Max Min Max Min Max Min Max 4.0 38 3.6 26 3.4 22 3.1 17 2.9 15 2.7 15 ns VCC(A) = 1.5 V ± 0.1 V 3.5 33 3.0 22 2.8 17.5 2.6 13.5 2.4 11.5 2.2 10.5 ns VCC(A) = 1.8 V ± 0.15 V 3.1 32 2.7 20 2.4 16 2.2 12 2.1 9.7 1.9 9.4 ns VCC(A) = 2.5 V ± 0.2 V 2.8 31 2.4 18.5 2.1 14.5 1.9 9.8 1.7 8.1 1.6 7.1 ns VCC(A) = 3.3 V ± 0.3 V 2.7 31 2.3 18 2.0 14 1.8 9.2 1.6 7.5 1.4 6.3 ns VCC(A) = 5.0 V ± 0.5 V 2.7 31 2.2 17.5 1.9 13.5 1.6 8.8 1.4 6.9 1.2 5.5 ns VCC(A) = 1.2 V ± 0.1 V 4.0 38 3.5 33 3.1 32 2.8 31 2.7 31 2.7 31 ns VCC(A) = 1.5 V ± 0.1 V 3.6 26 3.0 22 2.7 20 2.4 18.5 2.3 18 2.2 17.5 ns VCC(A) = 1.8 V ± 0.15 V 3.4 22 2.8 17.5 2.4 16 2.1 14.5 2.0 14 1.9 13.5 ns VCC(A) = 2.5 V ± 0.2 V 3.1 17 2.6 13.5 2.2 12 1.9 9.8 1.8 9.2 1.6 8.8 ns VCC(A) = 3.3 V ± 0.3 V 2.9 15 2.4 11.5 2.1 9.7 1.7 8.1 1.6 7.5 1.4 6.9 ns VCC(A) = 5.0 V ± 0.5 V 2.7 15 2.2 10.5 1.9 9.4 1.6 7.1 1.4 6.3 1.2 5.5 ns propagation nA to nB delay VCC(A) = 1.2 V ± 0.1 V [1] nB to nA 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 13 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state Symbol ten Parameter enable time Conditions VCC(B) Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V Min Max Min Max Min Max Min Max Min Max Min Max VCC(A) = 1.2 V ± 0.1 V 9.6 67.6 9.6 67.6 9.6 67.6 9.6 67.6 9.6 67.6 9.6 67.6 ns VCC(A) = 1.5 V ± 0.1 V 7.4 38 7.4 38 7.4 38 7.4 38 7.4 38 7.4 38 ns VCC(A) = 1.8 V ± 0.15 V 6.7 30.2 6.7 30.2 6.7 30.2 6.7 30.2 6.7 30.2 6.7 30.2 ns VCC(A) = 2.5 V ± 0.2 V 4.9 19.9 4.9 19.9 4.9 19.9 4.9 19.9 4.9 19.9 4.9 19.9 ns VCC(A) = 3.3 V ± 0.3 V 5.3 17.9 5.3 17.9 5.3 17.9 5.3 17.9 5.3 17.9 5.3 17.9 ns VCC(A) = 5.0 V ± 0.5 V 3.7 12.2 3.7 12.2 3.7 12.2 3.7 12.2 3.7 12.2 3.7 12.2 ns VCC(A) = 1.2 V ± 0.1 V 8.9 58.6 8.5 49.8 8.3 47.3 8.0 46 7.8 45.5 7.6 44.9 ns VCC(A) = 1.5 V ± 0.1 V 7.4 45.9 6.9 33.3 6.7 30 6.5 27.8 6.3 26.8 6.1 26.3 ns VCC(A) = 1.8 V ± 0.15 V 7.1 42.5 6.7 30 6.4 27 6.2 24.5 6.1 24 5.9 23 ns VCC(A) = 2.5 V ± 0.2 V 5.7 37.6 5.3 25.2 5.0 22.7 4.8 20.3 4.6 19.2 4.5 18.5 ns VCC(A) = 3.3 V ± 0.3 V 6.2 37.5 5.8 24.8 5.5 21.5 5.3 18.9 5.1 18 4.9 17.3 ns VCC(A) = 5.0 V ± 0.5 V 5.1 34.1 4.6 21.5 4.3 18.5 4.0 15.9 3.8 14.8 3.6 14 ns DIR to nA [1] DIR to nB 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 14 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state Symbol Parameter Conditions Unit 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 5.0 V ± 0.5 V Min Max Min Max Min Max Min Max Min Max Min Max VCC(A) = 1.2 V ± 0.1 V 4.9 31.2 4.9 31.2 4.9 31.2 4.9 31.2 4.9 31.2 4.9 31.2 ns VCC(A) = 1.5 V ± 0.1 V 3.9 18 3.9 18 3.9 18 3.9 18 3.9 18 3.9 18 ns VCC(A) = 1.8 V ± 0.15 V 4.0 16 4.0 16 4.0 16 4.0 16 4.0 16 4.0 16 ns VCC(A) = 2.5 V ± 0.2 V 2.9 13 2.9 13 2.9 13 2.9 13 2.9 13 2.9 13 ns VCC(A) = 3.3 V ± 0.3 V 3.5 12.4 3.5 12.4 3.5 12.4 3.5 12.4 3.5 12.4 3.5 12.4 ns VCC(A) = 5.0 V ± 0.5 V 2.4 9.7 2.4 9.7 2.4 9.7 2.4 9.7 2.4 9.7 2.4 9.7 ns VCC(A) = 1.2 V ± 0.1 V 5.6 37 4.8 28.3 5.1 27.1 4.4 23.2 5.1 23.8 4.1 21 ns VCC(A) = 1.5 V ± 0.1 V 5.1 32.6 4.4 23.6 4.6 22 3.8 18 4.6 18.7 3.6 16 ns VCC(A) = 1.8 V ± 0.15 V 4.7 31.1 4.0 22 4.3 20.1 3.4 16.1 4.2 15.6 3.3 13.4 ns VCC(A) = 2.5 V ± 0.2 V 4.3 29.8 3.6 20.2 3.9 17.9 3.0 14.1 3.9 14.4 2.9 10.9 ns VCC(A) = 3.3 V ± 0.3 V 4.2 29.1 3.5 19.1 3.7 16.9 2.9 12.9 3.7 13.1 2.7 10.4 ns VCC(A) = 5.0 V ± 0.5 V 4.1 28 3.3 19 3.6 16.7 2.7 12.5 3.5 12.5 2.5 9.5 ns 1.0 - 1.0 - 1.0 - 1.0 - 1.0 - 1.0 - ns disable time DIR to nA tdis VCC(B) [1] DIR to nB tt [1] transition time nA, nB output VCC(A) = 1.1 V to 5.5 V tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 15 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state 11.1. Waveforms and test circuit VI VM nA, nB input GND tPHL tPLH VOH nB, nA output VM 001aak114 VOL Measurement points are given in Table 15. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 5. The data input (nA, nB) to output (nB, nA) propagation delay times VI VM DIR input GND A output LOW-to-OFF OFF-to-LOW tPLZ tPZL VCCO VM VX VOL tPHZ A output HIGH-to-OFF OFF-to-HIGH B output LOW-to-OFF OFF-to-LOW B output HIGH-to-OFF OFF-to-HIGH VOH tPZH VY VM GND tPZL tPLZ VCCO VM VOL VX tPZH tPHZ VOH VY VM GND aaa-029961 Measurement points are given in Table 15. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 6. Enable and disable times Table 15. Measurement points Supply voltage Input [1] Output [2] VCC(A), VCC(B) VM VM VX VY 0.9 V to 1.6 V 0.5VCCI 0.5VCCO VOL + 0.1 V VOH - 0.1 V 1.65 V to 2.7 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH - 0.15 V 3.0 V to 5.5 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH - 0.3 V [1] [2] VCCI is the supply voltage associated with the control input or input port. VCCO is the supply voltage associated with the output port. 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 16 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state VI negative pulse tW 90 % VM 0V VI positive pulse 0V VM 10 % tf tr tr tf 90 % VM VM 10 % tW VEXT VCC G VI RL VO DUT RT CL RL 001aae331 Test data is given in Table 16. RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance. VEXT = External voltage for measuring switching times. Fig. 7. Test circuit for measuring switching times Table 16. Test data Supply voltage Load Input VEXT VCC(A), VCC(B) CL RL tr, tf VI [1] tPLH, tPHL tPZH, tPHZ tPZL, tPLZ [2] 0.9 V to 5.5 V 5 pF 10 kΩ ≤3.0 ns VCCI GND GND 2VCCO [1] [2] VCCI is the supply voltage associated with the control input or input port. VCCO is the supply voltage associated with the output port. 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 17 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state 11.2. Additional propagation delay versus load capacitance graphs tpd (ns) aaa-029962 6 aaa-029963 8 tpd (ns) (3) 5 (3) 6 4 (2) 3 (2) 4 (1) (1) 2 2 1 0 0 20 40 60 0 80 100 CL (pF) Tamb = -40 °C to +125 °C For tPLH, tPHL, tPZH and tPZL (1) Minimum: VCCO = 5.5 V (2) Typical: Tamb = 25 °C; VCCO = 5 V (3) Maximum: VCCO = 4.5 V Fig. 8. aaa-029964 tpd (ns) 8 20 40 60 80 100 CL (pF) Tamb = -40 °C to +125 °C For tPLH, tPHL, tPZH and tPZL (1) Minimum: VCCO = 3.6 V (2) Typical: Tamb = 25 °C; VCCO = 3.3 V (3) Maximum: VCCO = 3 V Additional propagation delay versus load capacitance 10 0 Fig. 9. Additional propagation delay versus load capacitance aaa-029965 12 tpd (ns) 10 (3) (3) 8 6 (2) 6 (2) (1) 4 (1) 4 2 0 2 0 20 40 60 80 100 CL (pF) Tamb = -40 °C to +125 °C For tPLH, tPHL, tPZH and tPZL (1) Minimum: VCCO = 2.7 V (2) Typical: Tamb = 25 °C; VCCO = 2.5 V (3) Maximum: VCCO = 2.3 V Product data sheet 0 20 40 60 80 100 CL (pF) Tamb = -40 °C to +125 °C For tPLH, tPHL, tPZH and tPZL (1) Minimum: VCCO = 1.95 V (2) Typical: Tamb = 25 °C; VCCO = 1.8 V (3) Maximum: VCCO = 1.65 V Fig. 10. Additional propagation delay versus load capacitance 74AXP2T45 0 Fig. 11. Additional propagation delay versus load capacitance All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 18 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state aaa-029966 16 tpd (ns) aaa-029967 30 tpd (ns) 25 (3) (3) 12 20 8 15 (2) (2) 10 (1) 4 (1) 5 0 0 20 40 60 0 80 100 CL (pF) Tamb = -40 °C to +125 °C For tPLH, tPHL, tPZH and tPZL (1) Minimum: VCCO = 1.6 V (2) Typical: Tamb = 25 °C; VCCO = 1.5 V (3) Maximum: VCCO = 1.4 V 0 20 40 60 80 100 CL (pF) Tamb = -40 °C to +125 °C For tPLH, tPHL, tPZH and tPZL (1) Minimum: VCCO = 1.3 V (2) Typical: Tamb = 25 °C; VCCO = 1.2 V (3) Maximum: VCCO = 1.1 V Fig. 12. Additional propagation delay versus load capacitance Fig. 13. Additional propagation delay versus load capacitance aaa-029968 32 tpd (ns) 24 16 8 0 0 20 40 60 80 100 CL (pF) Tamb = 25 °C; VCCO = 0.9 V For tPLH, tPHL, tPZH and tPZL Fig. 14. Additional propagation delay versus load capacitance 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 19 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state 12. Application information 12.1. Unidirectional logic level-shifting application The circuit given in Fig. 15 is an example of the 74AXP2T45 being used in an unidirectional logic level-shifting application. VCC1 VCC2 VCC(A) VCC1 1A 2A GND VCC1 1 2 3 8 74AXP2T45 4 system-1 7 6 5 VCC(B) VCC2 1B 2B DIR VCC2 system-2 aaa-029973 Fig. 15. Unidirectional logic level-shifting application Table 17. Unidirectional logic level-shifting application Pin Name Function Description 74AXP2T45 Product data sheet 1 VCC(A) VCC1 supply voltage of system-1 (0.9 V to 5.5 V) 2 1A OUT1 output level depends on VCC1 voltage 3 2A OUT2 output level depends on VCC1 voltage 4 GND GND device GND 5 DIR DIR the GND (LOW level) determines B port to A port direction 6 2B IN2 input threshold value depends on VCC2 voltage 7 1B IN1 input threshold value depends on VCC2 voltage 8 VCC(B) VCC2 supply voltage of system-2 (0.9 V to 5.5 V) All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 20 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state 12.2. Bidirectional logic level-shifting application Fig. 16 shows the 74AXP2T45 being used in a bidirectional logic level-shifting application. Since the device does not have an output enable (OE) pin, the system designer should take precautions to avoid bus contention between system-1 and system-2 when changing directions. VCC1 I/O-1 VCC1 PULL-UP/DOWN VCC2 VCC(A) 1A 2A GND 1 2 3 8 74AXP2T45 4 7 6 5 VCC(B) 1B VCC2 PULL-UP/DOWN I/O-2 2B DIR DIR CTRL DIR CTRL system-1 system-2 aaa-029974 System-1 and system-2 must use the same conditions, i.e., both pull-up or both pull-down. Fig. 16. Bidirectional logic level-shifting application Table 18 gives a sequence that will illustrate data transmission from system-1 to system-2 and then from system-2 to system-1. Table 18. Bidirectional logic level-shifting application [1] [2] State DIR CTRL I/O-1 I/O-2 Description 1 H output input system-1 data to system-2 2 H Z Z system-2 is getting ready to send data to system-1. I/O-1 and I/O-2 are disabled. The bus-line state depends on the pull-up or pull-down. 3 L Z Z DIR bit is set LOW. I/O-1 and I/O-2 still are disabled. The bus-line state depends on the pull-up or pull-down. 4 L input output system-2 data to system-1 [1] [2] System-1 and system-2 must use the same conditions, i.e., both pull-up or both pull-down. H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. 12.3. Enable times Calculate the enable times for the 74AXP2T45 using the following formulas: • • Direction A to B: • tPZL (DIR to B) = tPHL (A to B) + tPHZ (DIR to A) • tPZH (DIR to B) = tPLH (A to B) + tPLZ (DIR to A) Direction B to A: • tPZL (DIR to A) = tPHL (B to A) + tPHZ (DIR to B) • tPZH (DIR to A) = tPLH (B to A) + tPLZ (DIR to B) In a bidirectional application, these enable times provide the maximum delay from the time the DIR bit is switched until an output is expected. For example, if the 74AXP2T45 initially is transmitting from A to B, then the DIR bit is switched, the B port of the device must be disabled before presenting it with an input. After the B port has been disabled, an input signal applied to it appears on the corresponding A port after the specified propagation delay. 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 21 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state 13. Package outline VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D SOT765-1 E A X c y HE v A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 detail X 4 e L w bp 0 5 mm scale Dimensions (mm are the original dimensions) Unit mm A max. max nom min 1 A1 A2 0.15 0.85 0.00 0.60 A3 0.12 D(1) E(2) 0.27 0.23 2.1 2.4 0.17 0.08 1.9 2.2 bp c e HE 0.5 3.2 3.0 L 0.4 Lp Q 0.40 0.21 0.15 0.19 v w y 0.2 0.08 0.1 Z(1) θ 0.4 8° 0.1 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. Outline version SOT765-1 References IEC JEDEC JEITA sot765-1_po European projection Issue date 07-06-02 16-05-31 MO-187 Fig. 17. Package outline SOT765-1 (VSSOP8) 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 22 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state X2SON8: plastic thermal enhanced extremely thin small outline package; no leads; 8 terminals; body 1.35 x 0.8 x 0.35 mm SOT1233 X A B D A E A1 detail X pin 1 index area e e 1 b (6x) 2 pin 1 index area C 8 v w 3 C A B C y 4 Dh L (6x) 7 6 b1 (2x) 5 y1 C e1 0 1 mm scale Dimensions (mm are the original dimensions) Unit mm A A1 max 0.35 0.04 nom 0.32 min 0.30 0.00 b 0.25 0.20 0.15 b1 D Dh E 1.40 0.27 0.85 0.15 1.35 0.22 0.80 (ref) 1.30 0.17 0.75 e 0.5 e1 L 0.27 0.54 0.22 0.17 v 0.1 w y y1 0.05 0.05 0.05 sot1233_po Outline version SOT1233 References IEC JEDEC JEITA European projection Issue date 16-04-21 17-01-05 --- Fig. 18. Package outline SOT1233 (X2SON8) 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 23 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state 14. Abbreviations Table 19. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model 15. Revision history Table 20. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AXP2T45 v.1 Product data sheet - - 74AXP2T45 Product data sheet 20200319 All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 24 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state 16. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74AXP2T45 Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 25 / 26 74AXP2T45 Nexperia 2-bit dual supply translating transceiver; 3-state Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Marking.......................................................................... 2 5. Functional diagram.......................................................2 6. Pinning information......................................................3 6.1. Pinning.........................................................................3 6.2. Pin description............................................................. 3 7. Functional description................................................. 3 8. Limiting values............................................................. 4 9. Recommended operating conditions..........................4 10. Static characteristics..................................................5 11. Dynamic characteristics.............................................9 11.1. Waveforms and test circuit.......................................16 11.2. Additional propagation delay versus load capacitance graphs............................................................ 18 12. Application information........................................... 20 12.1. Unidirectional logic level-shifting application............20 12.2. Bidirectional logic level-shifting application.............. 21 12.3. Enable times............................................................21 13. Package outline........................................................ 22 14. Abbreviations............................................................ 24 15. Revision history........................................................24 16. Legal information......................................................25 © Nexperia B.V. 2020. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 19 March 2020 74AXP2T45 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 March 2020 © Nexperia B.V. 2020. All rights reserved 26 / 26