74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
Rev. 5 — 11 November 2016
Product data sheet
1. General description
The 74CBTLV3257 provides a quad 1-of-2 high-speed multiplexer/demultiplexer with
common select (S) and output enable (OE) inputs. The low ON resistance of the switch
allows inputs to be connected to outputs without adding propagation delay or generating
additional ground bounce noise. When pin OE = LOW, one of the two switches is selected
(low-impedance ON-state) with pin S. When pin OE = HIGH, all switches are in the
high-impedance OFF-state, independent of pin S.
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 2.3 V to 3.6 V.
To ensure the high-impedance OFF-state during power-up or power-down, OE should be
tied to the VCC through a pull-up resistor. The minimum value of the resistor is determined
by the current-sinking capability of the driver.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features and benefits
Supply voltage range from 2.3 V to 3.6 V
High noise immunity
Complies with JEDEC standard:
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM AEC-Q100-011 revision B exceeds 1000 V
5 switch connection between two ports
Rail to rail switching on data I/O ports
CMOS low power consumption
Latch-up performance exceeds 250 mA per JESD78B Class I level A
IOFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
3. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature range Name
Description
Version
74CBTLV3257D
40 C to +125 C
SO16
plastic small outline package; 16 leads; body width
3.9 mm
SOT109-1
74CBTLV3257DS
40 C to +125 C
SSOP16[1]
plastic shrink small outline package; 16 leads;
body width 3.9 mm; lead pitch 0.635 mm
SOT519-1
74CBTLV3257PW
40 C to +125 C
TSSOP16
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74CBTLV3257BQ
40 C to +125 C
DHVQFN16 plastic dual-in-line compatible thermal enhanced very
thin quad flat package; no leads; 16 terminals; body
2.5 3.5 0.85 mm
[1]
SOT763-1
Also known as QSOP16.
4. Functional diagram
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Fig 1.
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Logic diagram
74CBTLV3257
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
2 of 20
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
5. Pinning information
5.1 Pinning
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(1) This is not a supply pin. The
substrate is attached to this pad
using conductive die attach
material. There is no electrical or
mechanical requirement to
solder this pad. However, if it is
soldered, the solder land should
remain floating or be connected
to GND.
Fig 2.
Pin configuration
SOT109-1 (SO16) and
SOT519-1 (SSOP16)
Fig 3.
Pin configuration
SOT403-1 (TSSOP16)
Fig 4.
Pin configuration
SOT763-1 (DHVQFN16)
5.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
S
1
select input
1B1 to 4B1
2, 5, 11, 14
B1 input/output
1B2 to 4B2
3, 6, 10, 13
B2 input/output
1A to 4A
4, 7, 9, 12
A input/output
GND
8
ground (0 V)
OE
15
output enable input (active LOW)
VCC
16
supply voltage
74CBTLV3257
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
3 of 20
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
6. Functional description
Table 3.
Function table[1]
Inputs
Function switch
OE
S
L
L
nA = nB1
L
H
nA = nB2
H
X
disconnect nA and nBn
[1]
H = HIGH voltage level; L = LOW voltage level.
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
VCC
supply voltage
Conditions
Min
Max
Unit
0.5
+4.6
V
0.5
+4.6
V
0.5
VCC + 0.5
V
VI
input voltage
control inputs
[1]
VSW
switch voltage
enable and disable mode
[2]
IIK
input clamping current
VI < 0.5 V
50
-
mA
ISK
switch clamping current
VI < 0.5 V
50
-
mA
VSW = 0 V to VCC
ISW
switch current
-
128
mA
ICC
supply current
-
+100
mA
IGND
ground current
100
-
mA
Tstg
storage temperature
65
+150
C
-
500
mW
total power dissipation
Ptot
Tamb = 40 C to +125 C
[3]
[1]
The minimum input voltage rating may be exceeded if the input clamping current ratings are observed.
[2]
The switch voltage ratings may be exceeded if switch clamping current ratings are observed
[3]
For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
For DHVQFN16 packages: Ptot derates linearly with 4.5 mW/K above 60 C.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Symbol
Parameter
VCC
supply voltage
VI
input voltage
VSW
switch voltage
Conditions
enable and disable mode
Tamb
ambient temperature
t/V
input transition rise and fall rate
[1]
VCC = 2.3 V to 3.6 V
[1]
Min
Max
Unit
2.3
3.6
V
0
3.6
V
0
VCC
V
40
+125
C
0
200
ns/V
Applies to control signal levels.
74CBTLV3257
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
4 of 20
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Tamb = 40 C to +85 C
Conditions
Tamb = 40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
VCC = 2.3 V to 2.7 V
1.7
-
-
1.7
-
V
VCC = 3.0 V to 3.6 V
2.0
-
-
2.0
-
V
LOW-level input VCC = 2.3 V to 2.7 V
voltage
VCC = 3.0 V to 3.6 V
-
-
0.7
-
0.7
V
-
-
0.9
-
0.9
V
II
input leakage
current
-
-
1
-
20
A
IS(OFF)
OFF-state
VCC = 3.6 V; see Figure 5
leakage current
-
-
1
-
20
A
IS(ON)
ON-state
VCC = 3.6 V; see Figure 6
leakage current
-
-
1
-
20
A
IOFF
power-off
VI or VO = 0 V to 3.6 V;
leakage current VCC = 0 V
-
-
10
-
50
A
ICC
supply current
VI = GND or VCC; IO = 0 A;
VSW = GND or VCC;
VCC = 3.6 V
-
-
10
-
50
A
ICC
additional
supply current
pin OE, S; VI = VCC 0.6 V;
VSW = GND or VCC;
VCC = 3.6 V
-
-
300
-
2000
A
CI
input
capacitance
pin OE, S; VCC = 3.3 V;
VI = 0 V to 3.3 V
-
0.9
-
-
-
pF
CS(OFF)
OFF-state
capacitance
VCC = 3.3 V; VI = 0 V to 3.3 V
-
5.2
-
-
-
pF
CS(ON)
ON-state
capacitance
VCC = 3.3 V; VI = 0 V to 3.3 V
-
14.3
-
-
-
pF
HIGH-level
input voltage
VIH
VIL
pin OE, S; VI = GND to VCC;
VCC = 3.6 V
[1]
All typical values are measured at Tamb = 25 C.
[2]
One input at 3 V, other inputs at VCC or GND.
[2]
9.1 Test circuits
9&&
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Product data sheet
*1'
92
VI = VCC or GND and VO = open circuit.
Test circuit for measuring OFF-state leakage
current (one switch)
74CBTLV3257
Q%Q
DDL
VI = VCC or GND and VO = GND or VCC.
Fig 5.
Q$
Fig 6.
Test circuit for measuring ON-state leakage
current (one switch)
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Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
9.2 ON resistance
Table 7.
Resistance RON
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7.
Symbol Parameter
RON
Tamb = 40 C to +85 C
Conditions
Tamb = 40 C to +125 C
Unit
Min
Typ[1]
Max
Min
Max
ISW = 64 mA; VI = 0 V
-
4.2
8.0
-
15.0
ISW = 24 mA; VI = 0 V
-
4.2
8.0
-
15.0
ISW = 15 mA; VI = 1.7 V
-
8.4
40.0
-
60.0
ISW = 64 mA; VI = 0 V
-
4.0
7.0
-
11.0
ISW = 24 mA; VI = 0 V
-
4.0
7.0
-
11.0
ISW = 15 mA; VI = 2.4 V
-
6.2
15.0
-
25.5
ON resistance VCC = 2.3 V to 2.7 V;
see Figure 8 to Figure 10
[2]
VCC = 3.0 V to 3.6 V;
see Figure 11 to Figure 13
[1]
Typical values are measured at Tamb = 25 C and nominal VCC.
[2]
Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
9.3 ON resistance test circuit and graphs
DDL
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(1) Tamb = 125 C.
RON = VSW / ISW.
(2) Tamb = 85 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
Fig 7.
Test circuit for measuring ON resistance
(one switch)
74CBTLV3257
Product data sheet
Fig 8.
ON resistance as a function of input voltage;
VCC = 2.5 V; ISW = 15 mA
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Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
DDL
521
ȍ
DDL
521
ȍ
9,9
(1) Tamb = 125 C.
(1) Tamb = 125 C.
(2) Tamb = 85 C.
(2) Tamb = 85 C.
(3) Tamb = 25 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
(4) Tamb = 40 C.
Fig 9.
ON resistance as a function of input voltage;
VCC = 2.5 V; ISW = 24 mA
DDL
9,9
521
ȍ
Fig 10. ON resistance as a function of input voltage;
VCC = 2.5 V; ISW = 64 mA
DDL
521
ȍ
9,9
(1) Tamb = 125 C.
(2) Tamb = 85 C.
(2) Tamb = 85 C.
(3) Tamb = 25 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
(4) Tamb = 40 C.
Fig 11. ON resistance as a function of input voltage;
VCC = 3.3 V; ISW = 15 mA
Product data sheet
9,9
(1) Tamb = 125 C.
74CBTLV3257
Fig 12. ON resistance as a function of input voltage;
VCC = 3.3 V; ISW = 24 mA
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Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
DDL
521
ȍ
9,9
(1) Tamb = 125 C.
(2) Tamb = 85 C.
(3) Tamb = 25 C.
(4) Tamb = 40 C.
Fig 13. ON resistance as a function of input voltage; VCC = 3.3 V; ISW = 64 mA
74CBTLV3257
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
8 of 20
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
10. Dynamic characteristics
Table 8.
Dynamic characteristics
GND = 0 V; for test circuit see Figure 16
Symbol Parameter
Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit
Conditions
Min
Typ[1]
Max
Min
Max
-
-
0.15
-
0.25
ns
-
-
0.15
-
0.25
ns
1.0
3.8
6.1
1.0
6.7
ns
1.0
3.2
5.3
1.0
5.8
ns
VCC = 2.3 V to 2.7 V
1.0
2.2
5.6
1.0
6.2
ns
VCC = 3.0 V to 3.6 V
1.0
2.0
5.0
1.0
5.5
ns
VCC = 2.3 V to 2.7 V
1.0
3.5
6.1
1.0
6.7
ns
VCC = 3.0 V to 3.6 V
1.0
3.0
5.3
1.0
5.8
ns
VCC = 2.3 V to 2.7 V
1.0
2.6
5.5
1.0
6.1
ns
VCC = 3.0 V to 3.6 V
1.0
3.1
5.5
1.0
6.1
ns
VCC = 2.3 V to 2.7 V
1.0
2.6
4.8
1.0
5.3
ns
VCC = 3.0 V to 3.6 V
1.0
3.2
4.5
1.0
5.0
ns
propagation delay nA to nBn or nBn to nA;
see Figure 14
tpd
[2][3]
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
S to nA; see Figure 14
[3]
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
enable time
ten
[4]
OE to nA or nBn;
see Figure 15
S to nBn; see Figure 15
disable time
tdis
[5]
OE to nA or nBn;
see Figure 15
S to nBn; see Figure 15
[1]
All typical values are measured at Tamb = 25 C and at nominal VCC.
[2]
The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and the load capacitance, when
driven by an ideal voltage source (zero output impedance).
[3]
tpd is the same as tPLH and tPHL.
[4]
ten is the same as tPZH and tPZL.
[5]
tdis is the same as tPHZ and tPLZ.
74CBTLV3257
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
9 of 20
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
11. Waveforms
9,
LQSXW
90
90
9
W3+/
W3/+
92+
90
RXWSXW
90
92/
DDL
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 14. The data input (nA or nBn) to output (nBn or nA) propagation delays
Table 9.
Measurement points
Supply voltage
Input
Output
VCC
VM
VI
tr = tf
VM
VX
VY
2.3 V to 2.7 V
0.5VCC
VCC
2.0 ns
0.5VCC
VOL + 0.15 V
VOH 0.15 V
3.0 V to 3.6 V
0.5VCC
VCC
2.0 ns
0.5VCC
VOL + 0.3 V
VOH 0.3 V
9,
90
2(6LQSXW
90
*1'
W3=/
W3/=
9&&
RXWSXW
/2:WR2))
2))WR/2:
90
9;
92/
W3=+
W3+=
92+
RXWSXW
+,*+WR2))
2))WR+,*+
9<
90
*1'
VZLWFK
HQDEOHG
VZLWFK
GLVDEOHG
VZLWFK
HQDEOHG
DDO
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.
Fig 15. Enable and disable times
74CBTLV3257
Product data sheet
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Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
10 of 20
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
W:
9,
QHJDWLYH
SXOVH
90
90
9
WI
WU
WU
WI
9,
SRVLWLYH
SXOVH
90
90
9
W:
9(;7
9&&
*
9,
5/
92
'87
57
5/
&/
DDH
Test data is given in Table 10.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 16. Test circuit for measuring switching times
Table 10.
Test data
Supply voltage
Load
VCC
CL
RL
tPLH, tPHL
tPZH, tPHZ
tPZL, tPLZ
2.3 V to 2.7 V
30 pF
500
open
GND
2VCC
3.0 V to 3.6 V
50 pF
500
open
GND
2VCC
74CBTLV3257
Product data sheet
VEXT
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
11 of 20
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
11.1 Additional dynamic characteristics
Table 11. Additional dynamic characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise
specified); tr = tf 2.5 ns.
Symbol Parameter
f(3dB)
[1]
Tamb = 25 C
Conditions
3 dB frequency response VCC = 3.3 V; RL = 50 ; see Figure 17
[1]
Unit
Min
Typ
Max
-
398
-
MHz
fi is biased at 0.5VCC.
11.2 Test circuits
9&&
9&&
6
9,/RU9,+
5/
Q%Q
2(
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*1'
9,/
G%
IL
DDD
OE connected to GND; Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads 3 dB.
Fig 17. Test circuit for measuring the frequency response when channel is in ON-state
74CBTLV3257
Product data sheet
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Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
12. Package outline
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Fig 18. Package outline SOT109-1 (SO16)
74CBTLV3257
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
13 of 20
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
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Fig 19. Package outline SOT519-1 (SSOP16)
74CBTLV3257
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
14 of 20
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
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74CBTLV3257
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
15 of 20
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
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74CBTLV3257
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
16 of 20
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
13. Abbreviations
Table 12.
Abbreviations
Acronym
Description
CDM
Charged Device Model
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
14. Revision history
Table 13.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74CBTLV3257 v.5
20161111
Product data sheet
-
74CBTLV3257 v.4
-
74CBTLV3257 v.3
Modifications:
74CBTLV3257 v.4
Modifications:
•
Section 11.1 and Section 11.2 added.
20111216
•
Product data sheet
Legal pages updated.
74CBTLV3257 v.3
20110106
Product data sheet
-
74CBTLV3257 v.2
74CBTLV3257 v.2
20101126
Product data sheet
-
74CBTLV3257 v.1
74CBTLV3257 v.1
20100112
Product data sheet
-
-
74CBTLV3257
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
17 of 20
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
74CBTLV3257
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
18 of 20
74CBTLV3257
NXP Semiconductors
Quad 1-of-2 multiplexer/demultiplexer
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74CBTLV3257
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 11 November 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
19 of 20
NXP Semiconductors
74CBTLV3257
Quad 1-of-2 multiplexer/demultiplexer
17. Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
9.1
9.2
9.3
10
11
11.1
11.2
12
13
14
15
15.1
15.2
15.3
15.4
16
17
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6
ON resistance test circuit and graphs. . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . . 9
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Additional dynamic characteristics . . . . . . . . . 12
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17
Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Contact information. . . . . . . . . . . . . . . . . . . . . 19
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2016.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 11 November 2016
Document identifier: 74CBTLV3257