74HC86
Quad 2−Input Exclusive OR Gate
High−Performance Silicon−Gate CMOS
PACKAGE REFERENCE
The 74HC86 is identical in pinout to the LS86. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they
are compatible with LSTTL outputs.
SOIC−14
D SUFFIX
Features
•
•
•
•
•
•
•
•
•
14
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 A
High Noise Immunity Characteristic of CMOS Devices
In Compliance with JEDEC Standard No. 7A Requirements
ESD Performance: HBM 2000 V; Machine Model 200 V
Chip Complexity: 56 FETs or 14 Equivalent Gates
These are Pb−Free Devices
1
TSSOP−14
DT SUFFIX
14
1
PIN ASSIGNMENT
LOGIC DIAGRAM
A1
1
14
VCC
A1
B1
2
13
B4
B1
Y1
3
12
A4
A2
4
11
Y4
B2
5
10
B3
Y2
6
9
A3
GND
7
8
Y3
A2
B2
A3
B3
A4
B4
FUNCTION TABLE
Inputs
B
Y
L
L
H
H
L
H
L
H
L
H
H
L
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2
4
5
9
10
12
13
Y= A⊕B
Output
A
1
= AB + AB
1
3
6
8
11
Y1
Y2
Y3
Y4
PIN 14 = VCC
PIN 7 = GND
2019 AUG
74HC86
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
– 0.5 to + 7.0
V
DC Input Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
DC Output Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
VCC
DC Supply Voltage (Referenced to GND)
Vin
Vout
Iin
DC Input Current, per Pin
±20
mA
Iout
DC Output Current, per Pin
±25
mA
ICC
DC Supply Current, VCC and GND Pins
±50
mA
PD
Power Dissipation in Still Air,
500
450
mW
Tstg
Storage Temperature
– 65 to + 150
_C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
(SOIC or TSSOP Package)
SOIC Package†
TSSOP Package†
_C
260
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance circuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect device
reliability.
†Derating — SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: − 6.1 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Vin, Vout
Parameter
Min
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to
GND)
TA
Operating Temperature, All Package Types
tr, tf
Input Rise and Fall Time
(Figure 1)
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VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
2
Max
Unit
2.0
6.0
V
0
VCC
V
– 55
+ 125
_C
0
0
0
1000
500
400
ns
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74HC86
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
VCC
(V)
– 55 to
25_C
v 85_C
v 125_C
Unit
VIH
Minimum High−Level Input
Voltage
Vout = 0.1 V or VCC – 0.1 V
|Iout| v 20 A
2.0
3.0
4.5
6.0
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
V
VIL
Maximum Low−Level Input
Voltage
Vout = 0.1 V or VCC – 0.1 V
|Iout| v 20 A
2.0
3.0
4.5
6.0
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
V
VOH
Minimum High−Level Output
Voltage
Vin = VIH or VIL
|Iout| v 20 A
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.20
3.70
5.20
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.40
0.40
0.40
Symbol
Parameter
Test Conditions
Vin = VIH or VIL
VOL
Maximum Low−Level Output
Voltage
|Iout| v 2.4 mA
|Iout| v 4.0 mA
|Iout| v 5.2 mA
Vin = VIH or VIL
|Iout| v 20 A
Vin = VIH or VIL
|Iout| v 2.4 mA
|Iout| v 4.0 mA
|Iout| v 5.2 mA
V
Iin
Maximum Input Leakage Current
Vin = VCC or GND
6.0
±0.1
±1.0
±1.0
A
ICC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Iout = 0 A
6.0
2.0
20
40
A
NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book
(DL129/D).
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input t, = tf = 6 ns)
Guaranteed Limit
Parameter
Symbol
VCC
(V)
– 55 to
25_C
v 85_C
v 125_C
Unit
tPLH,
tPHL
Maximum Propagation Delay, Input A or B to Output Y
(Figures 1 and 2)
2.0
3.0
4.5
6.0
100
80
20
17
125
90
25
21
150
110
31
26
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
2.0
3.0
4.5
6.0
75
30
15
13
95
40
19
16
110
55
22
19
ns
Maximum Input Capacitance
—
10
10
10
pF
Cin
NOTES:
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
Typical @ 25°C, VCC = 5.0 V
CPD
33
Power Dissipation Capacitance (Per Gate)*
pF
* Used to determine the no−load dynamic power consumption: PD = CPD VCC2 f + ICC VCC . For load considerations, see Chapter 2 of the
ON Semiconductor High−Speed CMOS Data Book (DL129/D).
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3
2019 AUG
74HC86
tr
tf
VCC
90%
50%
INPUT
A OR B
10%
tPLH
tPHL
90%
OUTPUT Y
TEST POINT
GND
50%
10%
tTLH
tTHL
Figure 1. Switching Waveforms
OUTPUT
DEVICE
UNDER
TEST
C L*
*Includes all probe and jig capacitance
Figure 2. Test Circuit
A
Y
B
Figure 3. Expanded Logic Diagram
(1/4 of Device)
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2019 AUG
74HC86
Important statement:
Huaguan Semiconductor Co,Ltd. reserves the right to change
the products and services provided without notice. Customers
should obtain the latest relevant information before ordering,
and verify the timeliness and accuracy of this information.
Customers are responsible for complying with safety
standards and taking safety measures when using our
products for system design and machine manufacturing to
avoid potential risks that may result in personal injury or
property damage.
Our products are not licensed for applications in life support,
military, aerospace, etc., so we do not bear the consequences
of the application of these products in these fields.
Our documentation is only permitted to be copied without
any tampering with the content, so we do not accept any
responsibility or liability for the altered documents.
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2019 AUG
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