AW5025LGR

AW5025 产品手册 2014 年 5 月 V0.8 极低噪声系数，应用于全球导航卫星系统的低噪声放大器 特性 描述 采用专利的智能线性度增强技术（SLT）以  AW5025 是一款适用于 GPS， 格洛纳斯， 减轻射频环境干扰； 伽利略和北斗等全球导航卫星系统(GNSS)  极低的噪声系数：0.60dB； 的低噪声放大器。在射频端口内置隔直电容，  高功率增益：18.5dB； 所以输入端口无需另加电容，芯片可以尽量  高线性度 IIP3oob：+3.6dBm； 靠近天线，减少了线路损耗。其外围元器件  高输入 1dB 压缩点：-9.4dBm； 简单，只需要一个外置输入匹配电感,节省占  简单的 PCB 应用，只需一个外置的匹配电 板面积,是一款经济高效的解决方案。 感； AW5025 采用专利的智能线性度增强技  输出内部匹配到 50 欧姆;  工作电压：1.5V~3.6V;  工作频率：1550~1615MHz;  纤小的 1.1mmX0.7mmX 0.42mm LGA 6L 术（SLT）,具有极低噪声系数，高线性度， 高增益等特性，可支持低至 1.5V，高至 3.6V 的供电电压。所有这些特性使得 AW5025 成 为 GNSS 低噪声放大器的最佳选择，极低的 封装 噪声系数大大地改善了灵敏度，高线性度使 HBM 静电保护（包括 RFIN 和 RFOUT 引  得系统能更好地抵抗带外干扰，并且降低了 脚） 前级的滤波要求，进而降低了 GNSS 接收机 的总成本。 应用 AW5025 采用纤小的 1.1mm x 0.7mm  手机、平板电脑、数码相机  个人导航设备、射频前端模组  完整的 GPS 芯片模组  防盗保护设备 x 0.42 mm LGA-6L 封装，额定的工作温度 范围为-40℃至 85℃。 引脚分布及标记图 底视图 顶视图 1 3 AX 2 6 5 4 6 1 5 2 4 3 Pin No. Pin Name 1 GND 2 VCC 3 RFOUT 4 GNDRF 5 RFIN 6 EN A---AW5025LGR；X---生产跟踪码. 图 1. AW5025 引脚分布及标识图 版权所有© 2014 上海艾为电子技术有限公司 第 1 页 共 13 页 AW5025 datasheet May 2014 V0.8 Ultra-Low Noise Amplifier for Global Navigation Satellite Systems (GNSS) FEATURES INTRODUCTION  The AW5025 is a Low Noise Amplifier designed for Global Navigation Satellite Systems (GNSS) as GPS, GLONASS, Galileo and Compass. With on-chip DC blocking capacitors at RFIN and RFOUT, The AW5025 can be close to the antenna, requires only one external input matching inductor, and reduces assembly complexity and the PCB area, enabling a cost-effective solution.           Reduce RF environment Interference with patented Smart-Linearity-Technology (SLT); Ultra low noise figure(NF)=0.60dB; High power gain=18.5dB; High linearity IIP3oob=+3.6dBm; High input 1dB-compression point= -9.4dBm ; Requires only one input matching inductor; RF output internally matched to 50 ohm; Supply voltage: 1.5V to 3.6V; Operating frequencies: 1550~1615MHz; Slim LGA-6L package:1.1mmX0.7mmX 0.42mm HBM ESD protection (including RFIN and RFOUT pin) The AW5025 with patented Smart Linearity Technology (SLT) achieves ultra low noise figure, high linearity, high gain, over a wide range of supply voltages from 1.5V up to 3.6V. All these features make AW5025 an excellent choice for GNSS LNA as it improves sensitivity with low noise figure and high gain, provide better immunity against out-of-band jammer signals with high linearity, reduces filtering requirement of preceding stage and hence reduces the overall cost of the GNSS receiver. APPLICATIONS        Smart phones, feature phones, Tablet PCs, Personal Navigation Devices, Digital Still Cameras, Digital Video Cameras; RF Front End modules; Complete GPS chipset modules; Theft protection(laptop, ATM); The AW5025 is available in a small lead-free, RoHS-Compliant, 1.1mm x 0.7mm x 0.42mm 6-pin LGA package。 PIN CONFIGURATION AND MARKING Bottom View Top View 1 3 AX 2 6 5 4 6 5 4 1 2 3 Pin No. Pin Name 1 GND 2 VCC 3 RFOUT 4 GNDRF 5 RFIN 6 EN A---AW5025LGR；X---Manufactory trace No. Figure 1. AW5025 Pin Configuration and Marking Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD Page 2 of 15 AW5025 datasheet May 2014 V0.8 TYPICAL APPLICATION AW5025 GND 4 3 5 2 VCC RFIN RF INPUT RF OUTPUT RFOUT SUPPLY VOLTAGE L1 C1 (optional) EN LOGIC CONTROL 6 1 BIAS GND L1=9.1nH C1=1nF Figure 2. Application Schematic AW5025 For a list of components see Table 6 and Table 7. ORDER INFORMATION Table 1． Order Information Part Number Temperature Package RoHS Mark SPQ AW5025LGR -40℃～85℃ 1.1mm x 0.7 mm x 0.42mm LGA-6L Yes A Tape and Reel 3000pcs/Reel AW 5025 R : Tape& Reel LG: LGA Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD Page 3 of 15 AW5025 datasheet May 2014 V0.8 ABSOLUTE MAXIMUM RATINGS 1) Table 2 . Limiting Values Values Parameter Symbol Unit Min. Typ. Max. VCC -0.3 - 5.0 V Voltage at pin EN VEN -0.3 - 5.0 V Current into pin VCC ICC - - 30 mA PIN - - 10 dBm Package thermal resistance θJA - TBD Junction temperature TJ - - 150 ℃ Storage temperature range TSTG -65 - 150 ℃ Ambient temperature range Tamb -40 - 85 ℃ - 260 - ℃ Supply Voltage at pin VCC 2) RF input power 3) Solder temperature(10s) ℃/W ESD range HBM 4) TBD V Latch-up +IT: TBD mA -IT: TBD mA Note1: Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. Standard：JEDEC STANDARD NO.78D NOVEMBER 2011 Note2: Warning: due to internal ESD diode protection, the applied DC voltage should not exceed 5.0V in order to avoid excess current. Note3: The RF input and RF output are AC coupled through internal DC blocking capacitor. Note4: HBM standard: MIL-STD-883H Method 3015.8. Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD Page 4 of 15 AW5025 datasheet May 2014 V0.8 ELECTRICAL CHARACTERISTICS Table 3 . Electrical Characteristics （AW5025 EVB 1） ; VCC=1.5 to 3.6V, TA=-40~+85℃, f=1550MHz to 1615MHz; Typical values are at VCC=2.8V and TA=+25℃, f=1575.42MHz, unless otherwise noted.） PARAMETER CONDITIONS MIN TYP MAX UNITS 1.5 - 3.6 V 1.0 μA 15.0 mA DC ELECTRICAL CHARACTERISTICS VCC Supply Voltage ISD Shut-Down Current EN=Low ICC Supply Current EN=High VEN Digital Input-Logic High VEN Digital Input-Logic Low 6.9 0.80 V 0.45 V AC ELECTRICAL CHARACTERISTICS Gp Power Gain 18.5 dB RLin Input Return Loss 7.0 dB ISL Reverse Isolation 31.0 dB RLout Output Return Loss 11.0 dB NF Noise Figure 0.60 dB Kf Stability factor Pjam=-20dBm; fjam=850MHz TBD dB Pjam=-20dBm; fjam= 1850MHz TBD dB Pjam=-30dBm; fjam=850MHz TBD dB Pjam=-30dBm; fjam= 1850MHz TBD dB NFj Zs=50 ohm; No jammer 2) f=20MHz…10GHz Noise Figure with jammer 1 IP1dB Inband input 1dB-compression point f=1575.42MHz; -9.4 dBm IIP3oob Out-of-band input rd 3 -order intercept point f1= 1712.7MHz; f2=1850MHz; Pin=-20dBm 3.4 dBm IIP3oob Out-of-band input rd 3 -order intercept point f1= 1712.7MHz; f2=1850MHz; Pin=-30dBm 3.6 dBm IIP2oob Out-of-band input rd 2 -order intercept point f1= 2400MHz; f2=824.6MHz; Pin=-20dBm 8.4 dBm IIP2oob Out-of-band input rd 2 -order intercept point f1= 2400MHz; f2=824.6MHz; Pin=-30dBm 8.7 dBm H2-input referred LTE band-13 2 monic TBD dBm nd Har- f=787.76MHz; Pin=-25dBm; fH2=1575.52MHz Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD Page 5 of 15 AW5025 datasheet May 2014 V0.8 Table 3 . Characteristics……continued 1） （AW5025 EVB ; VCC=1.5 to 3.6V, TA=-40~+85℃, f=1550MHz to 1615MHz; Typical values are at VCC=2.8V and TA=+25℃, f=1575.42MHz, unless otherwise noted.） PARAMETER CONDITIONS MIN TYP MAX UNITS AC ELECTRICAL CHARACTERISTICS ton Turn-on time toff Turn-off time 3) 3) Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD Page 6 of 15 2.2 µs 1.7 µs AW5025 datasheet May 2014 V0.8 Table 4 . (AW5025 EVB Electrical Characteristics 1） ;VCC=1.5 to 3.6V, TA=-40~+85℃, f=1550MHz to 1615MHz; Typical values are at VCC=1.8V and TA=+25℃, f=1575.42MHz, unless otherwise noted.） PARAMETER CONDITIONS MIN TYP MAX UNITS 1.5 - 3.6 V 1.0 μA 15.0 mA DC ELECTRICAL CHARACTERISTICS VCC Supply Voltage ISD Shut-Down Current EN=Low ICC Supply Current EN=High VEN Digital Input-Logic High VEN Digital Input-Logic Low 6.2 0.80 V 0.45 V AC ELECTRICAL CHARACTERISTICS Gp Power Gain 18.0 dB RLin Input Return Loss 6.5 dB ISL Reverse Isolation 30.0 dB RLout Output Return Loss 14.0 dB NF Noise Figure Kf Stability factor NFj Zs=50 ohm; No jammer 2） f=20MHz…10GHz Noise Figure with jammer dB 1 Pjam=-20dBm; fjam=850MHz TBD dB Pjam=-20dBm; fjam= 1850MHz TBD dB Pjam=-30dBm; fjam=850MHz TBD dB Pjam=-30dBm; fjam= 1850MHz TBD dB IP1dB Inband input 1dB-compression point f=1575.42MHz -15.0 dBm IIP3oob Out-of-band input rd 3 -order intercept point f1= 1712.7MHz; f2=1850MHz; Pin=-20dBm; -4.6 dBm IIP3oob Out-of-band input rd 3 -order intercept point f1= 1712.7MHz; f2=1850MHz; Pin=-30dBm; -1.1 dBm IIP2oob Out-of-band input rd 2 -order intercept point f1= 824.6MHz; f2=2400MHz; Pin=-20dBm 7.0 dBm IIP2oob Out-of-band input rd 2 -order intercept point f1= 824.6MHz; f2=2400MHz; Pin=-30dBm 7.3 dBm H2-input referred LTE band-13 2 monic TBD dBm nd Har- f=787.76MHz; Pin=-25dBm; fH2=1575.52MHz Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD Page 7 of 15 AW5025 datasheet May 2014 V0.8 Table 4 . Characteristics……continued 1） (AW5025 EVB ;VCC=1.5 to 3.6V, TA=-40~+85℃, f=1550MHz to 1615MHz; Typical values are at VCC=1.8V and TA=+25℃, f=1575.42MHz, unless otherwise noted.） PARAMETER CONDITIONS MIN TYP MAX UNITS AC ELECTRICAL CHARACTERISTICS ton Turn-on time toff Turn-off time 3) 3) Note1: input matched to 50 ohm using a high quality-factor 9.1nH inductor. Note2: 0.08dB PCB losses are subtracted. Note3: Within 10% of the final gain. Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD Page 8 of 15 2.2 µs 1.7 µs AW5025 datasheet May 2014 V0.8 TEST CIRCUITS 1. DC Characteristics test: including power supply, pin voltage, supply current, standby current AW5025 GND RF INPUT 4 3 5 2 RF OUTPUT RFOUT SUPPLY A VOLTAGE VCC RFIN L1 C1 (optional) LOGIC CONTROL EN 6 1 BIAS V GND L1=9.1nH C1=1nF Figure 5. Circuit for DC test 2. S Parameter test: including input return loss, output return loss, reverse isolation, forward gain, 1dB gain compression. RF INPUT AW5025 EVB RF OUTPUT NetWork Analyzer Figure 6. Circuit for S Parameter test 3. Noise Figure test: including noise figure, power gain. RF INPUT AW5025 EVB Noise Source Figure 7. RF OUTPUT NF Analyzer Circuit for Noise Figure test Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD Page 9 of 15 AW5025 datasheet May 2014 V0.8 4. Intermodulation distortion test: including third-order intercept point. Signal Generator Power Combiner RF AW5025 EVB INPUT RF OUTPUT Signal Analyzer Signal Generator Figure 8. Circuit for intermodulation distortion test Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD Page 10 of 15 AW5025 datasheet May 2014 V0.8 APPLICATION INFORMATIONS 2. The output of AW5025 is internally matched to 50 ohm and a DC blocking capacitor is integrated on-chip, thus no external component is required at the output. 1.1 EN control The AW5025 includes an internal switch to turn off the entire chip: apply logic high to EN to turn on, and a logic low to shut down. 1.2 List of components 1. The AW5025 requires only one external inductor for input matching. If the device/phone manufacturers implement very good power supply filtering on their boards, the bypass capacitor mentioned in this application circuit may be optional. With the capacitor we can get better performance like a little higher gain etc. The value is optimized for the best gain, noise figure, return loss performance. Typical value of inductor is 9.1nH, capacitor is 1nF. For schematics see Figure2. 3. The AW5025 should be placed close to the GPS antenna with the input-matching inductor. Use 50ohm microstrip lines to connect RF INPUT and RF OUTPUT. Bypass capacitor should be located close to the device. For long Vcc lines, it may be necessary to add more decoupling capacitors. Proper grounding of the GND pins is very important. Table6 lists the recommended inductor types and values; Table 7 lists the recommended capacitor types and values. Table6: list of inductor Part Number Inductance Q(min) Units nH LQW15A 9.1 25 SDWL1005C 9.1 24 Q Test Frequency Supplier Size 250 Murata 0402 250 Sunlord 0402 MHz Table7: list of capacitor Part Number Capacitance Rated Voltage Units pF V GRM155 1000 50 Supplier Size Murata 0402 Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD Page 11 of 15 AW5025 datasheet May 2014 V0.8 PACKAGE INFORMATION A 0.42±0.08 Figure 9. B 0.20±0.035 0.123±0.035 A A A A 0.20±0.035 0.05 0.30±0.05 SIDE VIEW 0.12±0.03 0.123±0.035 0.20±0.035 1.10±0.05 PIN 1 TOP VIEW 0.20±0.035 0.05 0.40±0.05 0.70±0.05 BOTTOM VIEW 1) mm are the original dimensions Package Outline FOOTPRINT INFORMATION NSMD: Non-Solder Mask Defined pads 0.4mm 0.4mm 0.4mm 0.4mm 0.25mm 0.25mm 0.25mm 0.25mm (stencil thickness 100um) Copper Stencil apertures Solder mask Figure 10. Footprint Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD Page 12 of 15 AW5025 datasheet May 2014 V0.8 REVISION HISTORY Table 8. Document ID Release date AW5025_V0.8 2014-05 Revision history Change notice Preliminary data sheet Supersedes - Notice：Shanghai Awinic Technology Co. ltd cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in an Awinic product. No circuit patent licenses are implied. Awinic reserves the right to change the circuitry and specifications without notice at any time. Copyright © 2014 SHANGHAI AWINIC TECHNOLOGY CO., LTD Page 13 of 15