AW32001ECSR

AW32001E Mar. 2022 V1.2 AW32001E Single Cell Li-ion Battery Charger with Power Path Management and Full USB Compliance Features Charge Voltage Regulation Accuracy: Charge Current Accuracy: ±5% ⚫ Maximum 28V Input Voltage Rating with OverVoltage Protection ⚫ Minimum -5V Input Voltage Protection ⚫ Complete Charge Process with Pre-Charge, Fast Charge and Constant Voltage Regulation ⚫ Programmable Charge Parameters Through I2C Compatible Interface ⚫ Programmable Charge Autonomous Recharge Termination ⚫ Wide Range 2mA~500mA Charge ⚫ Strong and Robust Protection: VIN OVP, Battery OVP, OCP, Reverse Leakage Protection, Short Protection, Thermal Protection, PCB Over Temperature Protection ⚫ BATFET Control to Support Shipping Mode ⚫ System Reset Function ⚫ Fully Integrated Power Path Management ⚫ Ultra-low Battery Leakage Current to Support Shipping Mode ⚫ WLCSP 1.68mm×1.68mm×0.63mm-9B, 0.5mm Pitch Package ⚫ 7-bit slave address binary(0x49H) ⚫ IEC62368-1 Approved-File No.BE-37454 (A7~A1) ⚫ Smart Handheld Devices ⚫ Wearable Devices ⚫ Smart Watches ⚫ Fitness Accessories The AW32001E is targeted at space limited portable applications. The chip can take input power from either an AC adaptor or a USB port to supply the system load and charge the battery. Meanwhile, the chip provides system short circuit protection function by limiting the current from the input to the system and the battery to the system. These features are effective to protect the battery or chip from damage. The parameters of input current limit, the discharge current limit and safety timer can be programmed by the I2C interface. Additionally, input over voltage protection, input under voltage lockout and input headroom voltage are integrated for good input source detection. on Current: is 1001001 Applications www.awinic.com and cC Fast aw ini of fid ⚫ tia l ±0.5% ( 0°C to 50°C ) The AW32001E is a highly-integrated Li-Ion/LiPolymer battery linear charger with system power path management. The charge process of AW32001E includes: Pre-Charge, Fast Charge and Constant Voltage Regulation. The charge parameters and operating modes are programmable through I2C interface. The charge process runs automatically and recharging occurs when the battery voltage drops below VBAT_REGVRCH after the charge done status. en ⚫ General Description 1 AW32001E separates the charging route from the system power supply to fulfill the power management function. The system power supply is at first priority with no dependency on battery existence. Once a bad power-limited adapter appears at the input, AW32001E would reduce the charging current firstly. If the system load is still too heavy for input source, AW32001E will reduce the input-system current to prevent the input source from being pulled down. Under this circumstance, if the system voltage drops 30mV below the battery voltage, the battery to system supply route will be fully turned on to power the system load, which is supplement mode. Copyright © 2021 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW32001E Mar. 2022 V1.2 Typical Application Circuit CIN1 CSYS 50V 4.7mF 4.7mF CVDD VDD BAT CBAT 4.7mF 1mF VDD AW32001E VDD 10kΩ RT1 VIO 10kΩ l TVS System Load SYS IN tia USB Port 10kΩ NTC en INT Host SCL SDA RT2 BATTERY RNTC fid GND Figure 1 Typical Application Circuit of AW32001E aw ini cC on All trademarks are the property of their respective owners. www.awinic.com 2 Copyright © 2021 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW32001E Mar. 2022 V1.2 Pin Configuration and Top Mark AW32001ECSR PIN Configuration AW32001ECSR Marking (Top View) (Top View) 1 2 3 A IN SYS BAT A B NTC INT VDD B C SDA SCL GND C 1 2 fid en 3GP4 XXXX YYYY YYYY tia l 3 on 3GP4 - AW32001ECSR Marking XXXX - Production Tracing Code YYYY YYYY - Die Location Figure 2 Pin Configuration and Top Mark cC Pin Definition Pin Name IN SYS BAT B1 NTC Description Input power pin. Bypass with a 4.7μF capacitor to GND. System power supply pin. Bypass with a 4.7μF capacitor to GND. Battery pin. Bypass with a 4.7μF capacitor to GND. Temperature sense input. Connect a negative temperature coefficient thermistor. Program the hot and cold temperature window with resistor dividers from VDD to GND, and NTC is the middle node. Pull NTC to VDD if NTC function is not used. If NTC function is unused, it is suggested to disable the NTC function and tie the NTC port to VDD for decreasing leakage current of battery, because PCB_OTP is default. Interrupt output. The INT pin can send charge status and fault interrupt to the host. This pin is also used to disconnect the system from battery, and awake the chip from shipping mode. If INT is unused, it is suggested to tie INT to VDD by resistor. Internal power supply pin. Bypass with a 1μF capacitor to GND. No external load is allowed. I2C Interface serial date. I2C Interface clock. Ground. B2 aw ini Pin No. A1 A2 A3 B3 VDD C1 C2 C3 SDA SCL GND www.awinic.com INT 3 Copyright © 2021 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW32001E Mar. 2022 V1.2 Ordering Information Part Number Temperature Package Marking Moisture Sensitivity Level Environmental Information AW32001ECSR -40°C～85°C WLCSP 1.68mm×1.68mm-9B 3GP4 MSL1 ROHS+HF Delivery Form 3000 units/ aw ini cC on fid en tia l Tape and Reel www.awinic.com 4 Copyright © 2021 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW32001E Mar. 2022 V1.2 Absolute Maximum Ratings(NOTE1) PARAMETERS MIN MAX UNIT -5 28 V IN NTC voltage range VNTC (with respect to GND) NTC -0.3 VVDD+0.3 V Other pins voltage range (with respect to GND) SYS, BAT (NOTE 2), INT, VDD, SCL, SDA -0.3 6 V -40 85 °C -40 150 °C -65 150 °C 260 °C l Input voltage range VIN (with respect to GND) tia Operating free-air temperature range Operating junction temperature TJ Storage temperature TSTG en Lead temperature (Soldering 10 seconds) fid NOTE1: Conditions out of those ranges listed in "absolute maximum ratings" may cause permanent damages to the device. In spite of the limits above, functional operation conditions of the device should within the ranges listed in "recommended operating conditions". Exposure to absolute-maximum-rated conditions for prolonged periods may affect device reliability. ESD Rating and Latch Up on NOTE2: BAT pin can handle 8.9V transients for less than 10us VALUE UNIT HBM (Human Body Model) (NOTE 3) ±2 kV CDM(NOTE 4) ±1.5 kV cC PARAMETERS Latch-Up(NOTE 5) +IT：200 -IT：-200 mA aw ini NOTE3: The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. Test method: ESDA/JEDEC JS-001-2017 NOTE4: Test method: ESDA/JEDEC JS-002-2018 NOTE5: Test method: JESD78E www.awinic.com 5 Copyright © 2021 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW32001E Mar. 2022 V1.2 Recommended Operating Conditions PARAMETERS MIN MAX UNIT 5.5 V Supply current IIN 550 mA Discharge current IBAT 3.2 A 512 mA 4.545 V 125 °C VALUE UNIT 122 °C/W Supply voltage range VIN NORM 4 Battery regulated voltage VBAT_REG 3.6 Operating junction temperature TJ -40 l 2 tia Charge current ICHG en Thermal Information PARAMETERS aw ini cC on fid Junction-to-ambient thermal resistance θJA www.awinic.com 6 Copyright © 2021 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW32001E Mar. 2022 V1.2 Electrical Characteristics VIN=5V, VBAT=3.5V, TJ=25°C for typical values (unless otherwise noted). TEST CONDITIONS PARAMETER MIN TYP MAX UNIT 3.5 3.6 3.7 V INPUT SOURCE AND BATTERY PROTECTION UVLO threshold voltage, entry UVLO VIN falling Hysteresis for UVLO VIN rising Exit Deglitch time for VIN_UVLO Exits UVLO VIN OVP threshold voltage VIN rising VIN OVP hysteresis VIN falling from above VIN_OVP TDGL_OVP Exit deglitch time for VIN_OVP Exits VIN OVP VBAT BAT input voltage VBAT_UVLO UVLO threshold voltage for BAT voltage, VBAT falling, entry UVLO Hysteresis voltage CHARGE PROCESS VBAT_REG VRECH Deglitch time for VRCH VBAT_OVP Battery OVP threshold voltage VBAT_OVP hysteresis www.awinic.com 7 l tia 30 ms REG01H[2:0]=100 2.64 2.76 2.88 V REG01H[2:0]=111 2.93 3.03 3.13 V 4.6 V 190 80 130 mV 170 60 mV mV REG04H[1]=1, VBAT rising 2.9 3.0 3.1 V REG04H[1]=0, VBAT rising 2.7 2.8 2.9 V 200 REG04H[7:2]=000000, VBAT_REG=3.6V REG04H[7:2]=101000, VBAT_REG=4.2V REG04H[7:2]=110100, VBAT_REG=4.38V REG04H[7:2]=111110, VBAT_REG=4.53V REG04H[0]=0, VBAT_REG=4.2V, below VBAT_REG REG04H[0]=1, VBAT_REG=4.2V, below VBAT_REG VBAT falling below VRECH after charge termination VBAT threshold over VBAT_REG to turn off charger during charging Recharge threshold voltage mV V VBAT falling Battery charge voltage regulation voltage 350 2.53 VIN falling Fast charge to pre-charge threshold V 2.43 VIN rising aw ini VBAT_PRE 6.15 2.33 VBAT_UVLO =2.76V Pre-charge to fast charge threshold 6 ms REG01H[2:0]=000 cC VHDRM Input vs. battery voltage headroom threshold Input vs. battery voltage headroom threshold hysteresis 5.85 mV en VIN_OVP 30 fid TDGL_UVLO 300 on VIN_UVLO mV 3.585 3.600 3.615 V 4.180 4.200 4.220 V 4.360 4.380 4.400 V 4.507 4.530 4.553 V 60 100 140 mV 160 200 240 mV 130 ms 130 mV 50 mV Copyright © 2021 SHANGHAI AWINIC TECHNOLOGY CO., LTD AW32001E Mar. 2022 V1.2 Electrical Characteristics (Continued) VIN=5V, VBAT=3.5V, TJ=25°C for typical values (unless otherwise noted). TEST CONDITIONS PARAMETER MIN TYP MAX UNIT 4.11 4.20 4.29 V RON_Q1 RON_Q2 IIN_Q IBAT_Q V 4.85 4.95 5.05 V REG00H[3:0]=0000, IIN_LIM=50mA 30 45 60 mA REG00H[3:0]=0011, IIN_LIM=140mA 112 125 140 mA REG00H[3:0]=1001, IIN_LIM=320mA 275 296 320 mA REG00H[3:0]=1111, IIN_LIM=500mA 440 460 500 mA REG00H[7:4]=0000, VIN_DPM=3.88V 3.68 3.88 4.18 V REG00H[7:4]=1000, VIN_DPM=4.52V 4.32 4.52 4.82 V REG00H[7:4]=1111, VIN_DPM=5.08V 4.88 5.08 5.35 V en tia 4.69 Dynamic input power management clamp voltage fid Input current limit IN to SYS switches on resistance BAT to SYS switch on resistance VIN_DPM=3.88V, VIN=4.5V, ISYS=100mA 300 350 mΩ VIN